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EC1354 – VLSI DESIGN SEMESTER VI EEE
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EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

Dec 23, 2015

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Page 1: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

EC1354 – VLSI DESIGNSEMESTER VI EEE

Page 2: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors into a single chip.

Page 3: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

AIM

• To introduce the technology, design concepts and testing of Very Large Scale Integrated Circuits (VLSI).

Page 4: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

• To learn the basic CMOS circuits & CMOS process technology.

• To learn CMOS design & characteristics. • To learn the concepts of performance estimation. • To learn the concepts of VLSI system components &

physical design.• To learn the various testing techniques at system level.• To learn the concepts of modeling a digital system

using Hardware Description Language.

OBJECTIVES

Page 5: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.
Page 6: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY

• NMOS and PMOS transistors – Threshold voltage – Body effect – Design equations– Second order effects – MOS models – Small signal AC characteristics – Basic CMOS technology

Page 7: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

UNIT II INVERTERS AND LOGIC GATES

• NMOS and CMOS Inverters – Stick diagram – Inverter ratio – DC and transient characteristics –Switching times – Super buffers – Driving large Capacitance loads – CMOS logic structures –Transmission gates – Static CMOS design – Dynamic CMOS design

Page 8: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

UNIT III CIRCUIT CHARACTERISATION AND PERFORMANCE ESTIMATION

• Resistance estimation–Capacitance estimation –Inductance– Switching characteristics–Transistor sizing–Power dissipation and design margining – Charge sharing – Scaling

Page 9: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

UNIT IV VLSI SYSTEM COMPONENTS CIRCUITS AND SYSTEM LEVEL PHYSICAL DESIGN

• Multiplexers – Decoders – Comparators – Priority Encoders – Shift Registers – Arithmetic Circuits– Ripple Carry Adders – Carry Look Ahead Adders – High-Speed Adders –Multipliers – Physical design – Delay modeling – Cross Talk – Floor planning – Power distribution – Clock distribution – Basics of CMOS testing

Page 10: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

UNIT V FPGA and VERILOG HARDWARE DESCRIPTION LANGUAGE

• Introduction to FPGA –Xilinx FPGA–Xilinx 2000 –Xilinx 3000– Overview of Digital Design with Verilog HDL–Hierarchical modeling concepts–Modules and Port definitions – Gate level modeling–Data flow modeling– Behavioral modeling

Page 11: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

FPGA

• The field-programmable gate array (FPGA) is a semiconductor device that can be programmed after manufacturing.

• Instead of being restricted to any predetermined hardware function, an FPGA allows you to program product features and functions, adapt to new standards, and reconfigure hardware for specific applications even after the product has been installed in the field—hence the name "field-programmable".

Page 12: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

HDL

• A hardware description language or HDL is any language for formal description and design of electronic circuits and digital logic. It can describe the circuit's operation, its design and organization. It can verify its operation by means of simulation

Page 13: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

VERILOG

• Verilog HDL is a hardware description language used to design and document electronic systems. Verilog HDL allows designers to design at various levels of abstraction.

Page 14: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

EVOLUTION OF VERILOG

• Verilog was invented by Phil Moorby and Prabhu Goel during the winter of 1983/1984 at Automated Integrated Design Systems (renamed to Gateway Design Automation in 1985) as a hardware modeling language. Gateway Design Automation was purchased by Cadence Design Systems in 1990. Cadence now has full proprietary rights to Gateway's Verilog and the Verilog-XL simulator logic simulators.

Page 15: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

TEXT BOOKS

1. Neil, H. E. Weste and Kamran Eshraghian, “Principles of CMOS VLSI Design”, 2nd Edition, Pearson Education Asia, 2000.

2. John P. Uyemura “Introduction to VLSI Circuits and Systems”, John Wiley and Sons, Inc.,2002.

3. Samir Palnitkar, “Verilog HDL”, 2nd Edition, Pearson Education, 2004.

Page 16: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

REFERENCES

1. Eugene D. Fabricius, “Introduction to VLSI Design”, McGraw Hill International Editions, 1990.

2. Bhasker, J., “A Verilog HDL Primer”, 2nd Edition, B. S. Publications, 2001.

3. Pucknell, “Basic VLSI Design”, Prentice Hall of India, 1995.

4. Wayne Wolf, “Modern VLSI Design System on Chip”, Pearson Education, 2002.

Page 17: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

ASSIGNMENT TOPICS

• Basics of CMOS testing• Stick diagram• Switching characteristics• Basic CMOS technology

Page 18: EC1354 – VLSI DESIGN SEMESTER VI EEE. Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors.

SEMINAR TOPICS

• Multiplexers. • Decoders. • Comparators. • Priority Encoders. • Shift Registers. • Arithmetic Circuits