Dr.NNCE ECE / IV SEM EC II & S LAB - LM 1 EC 2257- ELECTRONIC CIRCUITS II AND SIMULATION LAB LABORATORY MANUAL FOR FOURTH SEMESTER B.E (ECE) (PRIVATE CIRCULATION ONLY) ACADEMIC YEAR 2013-2014 ANNA UNIVERSITY,CHENNAI-600025 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING DR.NAVALAR NEDUNCHEZHIYAN COLLEGE OF ENGINEERING, THOLUDUR 606 303, CUDDALORE DIST.
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EC 2257- ELECTRONIC CIRCUITS II AND SIMULATION LAB
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Dr.NNCE ECE / IV SEM EC II & S LAB - LM
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EC 2257- ELECTRONIC CIRCUITS II AND SIMULATION LAB
LABORATORY MANUAL
FOR FOURTH SEMESTER B.E (ECE)
(PRIVATE CIRCULATION ONLY)
ACADEMIC YEAR 2013-2014
ANNA UNIVERSITY,CHENNAI-600025
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
DR.NAVALAR NEDUNCHEZHIYAN COLLEGE OF ENGINEERING,
THOLUDUR 606 303, CUDDALORE DIST.
Dr.NNCE ECE / IV SEM EC II & S LAB - LM
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UNIVERSITY PRACTICAL EXAMINATION
Allotment of Marks
Internal assessment = 20 marks
Practical examination = 80 marks
----------------------
Total = 100 marks
----------------------
INTERNAL ASSESSMENT (20 MARKS)
Staff should maintain the assessment register and the Head of the Department should
monitor it.
Split up of internal marks
Record = 10 marks
Model exam = 5 marks
Attendance = 5 marks
----------------------
Total = 20 marks
----------------------
UNIVERSITY EXAMINATION
The exam will be conducted for 100 marks. Then the marks will be calculated to 80
marks
Split up of practical examination marks
Aim and Procedure = 25 marks
Program = 30 marks
Execution = 30 marks
Result = 05 marks
Viva voce = 10 marks
----------------------
Total = 100 marks
---------------------
Dr.NNCE ECE / IV SEM EC II & S LAB - LM
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GENERAL INSTRUCTIONS FOR LABORATORY CLASSES
o Enter the Lab with CLOSED FOOTWEAR.
o Boys should “TUCK IN” the shirts.
o Students should wear uniform only.
o LONG HAIR should be protected, let it not be loose especially near ROTATING
MACHINERY.
o Any other machines / equipments should not be operated other than the
prescribed one for that day.
o POWER SUPPLY to your test table should be obtained only through the LAB
TECHNICIAN.
o Do not LEAN and do not be CLOSE to the rotating components.
o TOOLS, APPARATUS and GUAGE sets are to be returned before leaving the
lab.
o HEADINGS and DETAILS should be neatly written
i. Aim of the experiment
ii. Apparatus / Tools / Instruments required
iii. Procedure / Theory / Algorithm / Program
iv. Model Calculations
v. Neat Diagram / Flow charts
vi. Specifications / Designs Details
vii. Tabulations
viii. Graph
ix. Result / discussions .
o Before doing the experiment, the student should get the Circuit / Program
approval by the FACULTY - IN - CHARGE.
o Experiment date should be written in the appropriate place.
o After completing the experiment, the answer to the viva-voce questions should be
neatly written in the workbook.
o Be PATIENT, STEADY, SYSTEMATIC AND REGULAR.
Dr.NNCE ECE / IV SEM EC II & S LAB - LM
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LIST OF EXPERIMENTS
DESIGN OF THE FOLLOWING CIRCUITS
1. Series and shunt feedback amplifiers:
Frequency response, input and output impedance calculation
2. RC phase shift oscillator, Wien bridge oscillator
3. Hartley oscillator, Colpitts oscillator
4. Tuned class C amplifier
5. Integrators, Differentiators, Clippers and Clampers
6. Astable, Monostable and Bistable multivibrators
SIMULATION USING PSPICE
1. Differential amplifier
2. Active filters : Butterworth 2 nd order LPF, HPF (Magnitude and Phase response)
3. Astable, Monostable and Bistable multivibrator - Transistor bias
4. D/A and A/D converters (Successive approximation)
Title of the exercise/experiment : Inverting, Non-inverting and Differential amplifiers
Date of the experiment :
AIM: To construct and test the performance of an Inverting, Non-inverting amplifier
and Differential amplifier using IC µA 741
APPARATUS REQUIRED:
DESIGN
:
INVERTING AMPLIFIER:
Let A = -5; R1 = 1KΩ
A = − Rf / R1
Rf = 5 KΩ
Rcomp = R1 Rf / R1 + Rf
= 833 Ω
NON-INVERTING AMPLIFIER:
Let A = 6; R1 = 1KΩ
A = 1 + (Rf / R1)
Rf = 5 KΩ
Rcomp = R1 Rf / R1 + Rf
= 833 Ω
NON-INVERTING AMPLIFIER:
Let A = 100; R1 = 1KΩ
A = R2 / R1
R2 = 100 KΩ
S. No. Name Range Quantity
1 Dual Power Supply (0-30)V 1
2 Resistors 1KΩ;5 KΩ;100 KΩ Each 2
3 Regulated Power Supply (0-30)V 1
4 IC µA 741 - 1
5 Voltmeter (0-50)V 1
6 Connecting Wires - -
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CIRCUIT DIAGRAM:
NON-INVERTING AMPLIFIER: MODEL GRAPH:
DIFFERENTIAL AMPLIFIER:
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THEORY:
INVERTING AMPLIFIER:
The fundamental component of any analog computer is the
operational amplifier or op-amp and the frequency configuration in which it is used as an
inverting amplifier. An input voltage Vin is applied to the input voltage. It receives and
inverts its polarity producing an output voltage. this same output voltage is also applied to a
feedback resistor Rf, which is connected to the amplifier input analog with R1. The amplifier
itself has a very high voltage gain.
If Rf = R1 then Vo=Vi
NON- INVERTING AMPLIFIER:
Although the standard op-amp configuration is as an inverting
amplifier, there are some applications where such inversion is not wanted. However, we
cannot just switch the inverting and non inverting inputs to the amplifier itself. We will still
need negative feedback to control the working gain of the circuit .Therefore, we will need to
leave the resistor structure around the op-amp intact and swap the input and ground
connections to the overall circuit.
VO/VI = (Rf / Ri) +1
From the calculations, we can see that the effective voltage
gain of the non-inverting amplifier is set by the resistance ratio. Thus, if the two resistors are
equal value, then the gain will be 2 rather than 1.
DIFFERENTIAL AMPLIFIER:
A circuit that amplifies the difference between two signals is
called as a differential amplifier. This type of amplifiers is very useful in instrumentation
circuits. From the experimental setup of a differential amplifier, the voltage at the output of
the operational amplifier is zero. The inverting and non-inverting terminals are at the same
potential. Such a circuit is very useful in detecting very small differences in signals. Since the
gain can be chosen to be very large. For example, if R2=100R1, then a small difference V1-
V2 is amplified 100 times.
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TABULATION:
INVERTING AMPLIFIER:
S.No Input Voltage (in volts) Output Voltage (in volts)
1
1
−9.93
NON- INVERTING AMPLIFIER:
S.No Input Voltage (in volts) Output Voltage (in volts)
1
1
11.2
DIFFERENTIAL AMPLIFIER:
S.No Input Voltage (in volts) Output Voltage (in volts)
1
2
V1 V2
9.74
9.80
3 2
2 3
PROCEDURE:
Connections are made as per the EXPERIMENTAL SETUP.
The supply is switched ON.
Output is connected to anyone channel of CRO.
The V1 and V2 voltages are fixed and measured from the other channel of CRO and
the corresponding output voltages are also noted from the CRO.
The above step is repeated for various values of V1 and V2.V1 and V2 may be AC or
DC voltages from function generator or DC power supply.
Dr.NNCE ECE / IV SEM EC II & S LAB - LM
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Readings are tabulated and gain was calculated and composed with designed values.
RESULT Thus the Inverting, Non-inverting and Differential amplifier using op-amp was designed and tested.
VIVA QUESTIONS:
1. Define an operational amplifier.
An operational amplifier is a direct-coupled, high gain amplifier consisting of one or more
differential amplifier. By properly selecting the external components, it can be used to
perform a variety of mathematical operations.
2. Mention the characteristics of an ideal op-amp.
* Open loop voltage gain is infinity. *Input impedance is infinity. *Output
impedance is zero. *Bandwidth is infinity. *Zero offset.
3. Define input offset voltage.
A small voltage applied to the input terminals to make the output voltage as zero when the
two input terminals are grounded is called input offset voltage.
4. Define input offset current.
The difference between the bias currents at the input terminals of the op-amp is called as
input offset current.
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Exercise/Experiment Number: 23
Title of the exercise/experiment : DIFFERENTIAL AMPLIFIER USINGBJT
Date of the experiment :
AIM:
To construct a differential amplifier using BJT and to determine the dc collector current of
individual transistors and also to calculate the CMRR.
APPARATUS REQUIRED:
S.No. Name Range Quantity
1. Transistor BC107 2
2. Resistor 4.7kΩ, 10kΩ 2,1
3. Regulated power supply (0-30)V 1
4. Function Generator (0-3) MHz 2
5. CRO 30 MHz 1
6. Bread Board 1
OBSERVATION
VIN = V1 – V2
V0 =
Ad = V0/ VIN
For the differential mode operation the input is taken from two different sources and the
common mode operation the applied signals are taken from the same source
Common Mode Rejection Ratio (CMRR) is an important parameter of the differential
amplifier. CMRR is defined as the ratio of the differential mode gain, Ad to the common
mode gain, Ac.
CMRR = Ad / Ac
In ideal cases, the value of CMRR is very high.
OBSERVATION
VIN =VO =AC = VO / VIN
FORMULA:
Common mode Gain (Ac) = VO / VIN
Differential mode Gain (Ad) = V0 / VIN
Where VIN = V1 – V2
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CIRCUIT DIAGRAM
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Common Mode Rejection Ratio (CMRR) = Ad/Ac
Where, Ad is the differential mode gain
Ac is the common mode gain.
THEORY:
The differential amplifier is a basic stage of an integrated operational amplifier.
It is used to amplify the difference between 2 signals.
It has excellent stability, high versatility and immunity to noise
. In a practical differential amplifier, the the common mode signal.
Transistor Q1 and Q2 have matched characteristics. The values of RC1 and RC2 are
equal. Re1 and Re2 are also equal and this differential amplifier is called emitter coupled
differential amplifier. The output is taken between the two output terminals
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. To determine the common mode gain, we set input signal with voltage Vin=2V
and determine Vo at the collector terminals. Calculate common mode gain, Ac=Vo/Vin. 3. To determine the differential mode gain, we set input signals with voltages V1 and
V2. Compute Vin=V1-V2 and find Vo at the collector terminals. Calculate differential mode
gain, Ad=Vo/Vin.
4. Calculate the CMRR=Ad/Ac. 5. Measure the dc collector current for the individual transistors.
RESULT:
Thus, the Differential amplifier was constructed and dc collector current for the
individual transistors is determined. The CMRR is calculated as
Viva questions 1.What is an amplifier?
An amplifier is a device which produces a large electrical output of similarcharacteristics to
that of the input parameters.
2.. How are amplifiers classified according to the input?
1. Small – signal amplifier 2. Large – signal amplifier
3.How are amplifiers classified according to the transistor configuration?
Common emitter amplifier 2. Common base amplifier 3. Common collector
amplifier
4. What is the different analysis available to analyze a transistor?
1. AC analysis 2. DC analysis
Dr.NNCE ECE / IV SEM EC II & S LAB - LM
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Exercise/Experiment Number: 24
Title of the exercise/experiment :CLASS B COMPLEMENTARY SYMMETRY
POWER AMPLIFIER
Date of the experiment :
AIM:
To construct a Class B complementary symmetry power amplifier and observe the
waveforms with and without cross-over distortion and to compute maximum output power
and efficiency.
APPARATUS REQUIRED:
S.No. Name Range Quantity
1. Transistor CL100, BC558 1,1
2. Resistor 4.7kΩ,15kΩ 2,1
3. Capacitor 100µF 2
4. Diode IN4007 2
5. Signal Generator (0-3)MHz 1
6. CRO 30MHz 1
7. Regulated power supply (0-30)V 1
8. Bread Board 1
FORMULA:
Input power, Pin=2VccIm/П
Output power, Pout=VmIm/2
Power Gain or efficiency, η=л/4(Vm/Vcc) 100
. THEORY: A power amplifier is said to be Class B amplifier if the Q-point and the input signal
are selected such that the output signal is obtained only for one half cycle for a full input
cycle. The Q-point is selected on the X-axis. Hence, the transistor remains in the active
region only for the positive half of the input signal.
There are two types of Class B power amplifiers: Push Pull amplifier and complementary
symmetry amplifier. In the complementary symmetry amplifier, one n-p-n and another p-n-p
transistor is used. The matched pair of transistor are used in the common collector
configuration. In the positive half cycle of the input signal, the n-p-n transistor is driven into
active region and starts conducting and in negative half cycle, the p-n-p transistor is driven
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into conduction. However there is a period between the crossing of the half cycles of the
input signals, for which none of the transistor is active and output, is zero.
MODEL GRAPH
f 1 f2 f (Hz)
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TABULATION:
FREQUENCY RESPONSE OF CASCODE AMPLIFIER
Keep the input voltage constant (Vin) =
Frequency (in Hz) Output Voltage (in volts) Gain = 20 log (Vo / Vin) (in dB)
RESULT:
Thus, the Class B amplifier was constructed and the gain was determined.
VIVA QUESTION:
1. What is feed back?
It is the process of injecting some energy from the output and then returns it back
tothe input.
2. What is the disadvantage of negative feed back?
Reduces amplifier gain.
3. Define sensitivity.
It is the ratio of percentage change in voltage gain with feedback to the percentage
change in voltage gain without feed back.
4. Define Desensitivity.
It is the ratio of percentage change in voltage gain without feedback to thepercentage
change in voltage
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Exercise/Experiment Number: 25
Title of the exercise/experiment :CASCADE AMPLIFIER
Date of the experiment :
AIM:
To construct a cascode amplifier circuit and to plot the frequency response
characteristics.
APPARATUS REQUIRED:
S.No. Name Range Quantity
1. Transistor BC107 2
2. Resistor
22kΩ,6 kΩ,700 Ω,470Ω
16 kΩ,6.2 kΩ,3.3 kΩ
1.1 kΩ
1,1,1,1,
1,1,1,
1
3. Regulated power supply (0-30)V 1
4. Signal Generator (0-3)MHz 1
5. CRO 30 MHz 1
6. Bread Board 1
7. Capacitor 0.01µF 3
THEORY:
A cascode amplifier consists of a common emitter amplifier stage in series with a common
base amplifier stage. It it one approach to solve the low impedance problem of a common
base circuit. Transistor Q1 and its associated components operate as a common emitter
amplifier, while the circuit of Q2 functions as a common base output stage. The cascade
amplifier gives the high input impedance of a common emitter amplifier, as well as the good
voltage gain and frequency performance of a common base circuit.
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. The waveforms at the input and output are observed for cascade operations varying the
input frequency.
3. The biasing resistances needed to locate the Q-point are determined.
Dr.NNCE ECE / IV SEM EC II & S LAB - LM
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4. Set the input voltage as 1V and by varying the frequency, note the output voltage.
5. Calculate gain=20 log (Vo / Vin.)
6. A graph is plotted between frequency and gain.
CIRCUIT DIAGRAM:
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TABULATION:
Keep the input voltage constant, Vin =
Frequency (in Hz) Output Voltage (in volts) Gain= 20 log(Vo/Vin) (in dB)
RESULT:
Thus, the Cascade amplifier was constructed and the gain was determined.
VIVA QUESTIONS:
1.What is biasing?
To use the transistor in any application it is necessary to provide sufficient voltage
and current to operate the transistor. This is called biasing. 2. What is the necessary of the coupling capacitor?
It is used to block the c signal to the transistor amplifier. It allows a c &blocks the d c.
3. What is reverse saturation current?
The current due to the minority carriers is called the reverse saturation current.
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LIST OF QUESTION SET
1. a) Design a differential amplifier circuit and calculate its CMRR.
b) Design and simulate a Monostable Multivibrator with frequency 2 KHz
using ORCAD.
2. a) Design a Wein bridge oscillator with frequency of oscillation 1 KHz.
b) Simulate a CMOS NAND using ORCAD.
3. a) Design a Colpitts oscillator with frequency of oscillation 12 KHz.
Specifications:
VCC=12V, S=6, ICQ=1.7mA, VRE=3V.
b) Simulate a CMOS Inverter using ORCAD.
4. a) Design a RC Phase shift oscillator with frequency of oscillation 1 KHz.
b) Design and simulate a Symmetrical Astable Multivibrator with frequency
2 KHz using ORCAD.
5. a) Design a differential amplifier circuit and calculate its CMRR.
b) Design and simulate a Asymmetrical Astable Multivibrator with frequency
2 KHz using ORCAD.
6. a) Design a single tuned Class C amplifier with resonant frequency 9KHz.
Specifications:
QL=1, RL= 1KΩ, L= 1mH.
b) Design and simulate a second order Butterworth low pass filter with
frequency 1 KHz using ORCAD.
7. a) Design a Class B amplifier with resonant frequency 9KHz.
b) Simulate a differentiator with sine wave input using ORCAD.
8. a) Design a Hartley oscillator with frequency of oscillation 12 KHz.
Specifications:
VCC=12V, S=6, ICQ=1.7mA, VRE=3V.
b) Simulate a CMOS NOR using ORCAD.
9. a) Design a Colpitts oscillator with frequency of oscillation 12 KHz.
Specifications:
VCC=12V, S=6, ICQ=1.7mA, VRE=3V.
b) Design and simulate a Bistable Multivibrator with frequency 2 KHz using
ORCAD.
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10. a) Design a Wein bridge oscillator with frequency of oscillation 1 KHz.
b) Simulate a differentiator with square wave input using ORCAD.
11. a) Design a RC Phase shift oscillator with frequency of oscillation 1 KHz.
b) Simulate a Digital to Analog converter using ORCAD.
12. a) Design a single tuned Class C amplifier with resonant frequency 9KHz.
Specifications:
QL=1, RL= 1KΩ, L= 1mH.
b) Simulate a CMOS Inverter using ORCAD.
13. a) Design a Hartley oscillator with frequency of oscillation 12 KHz.
Specifications:
VCC=12V, S=6, ICQ=1.7mA, VRE=3V.
b) Simulate a CMOS NAND using ORCAD.
14. a) Design a Class B amplifier with resonant frequency 9KHz.
b) Design and simulate a second order Butterworth low pass filter with frequency 1