KEEP DISTANCE WARNING SYSTEM CHAPTER 1 INTRODUCTION 1.1 INTRODUCTION: Most of the accidents in high-ways are happening due to the drowsiness of drivers, most often this symptom is found in long distance truck drivers, these drivers may take some time to recognize the opposite vehicle, which is running at low speed, resulting accident. This kind of accidents may happen due to the drunken drivers also. So to increase safety an electronic warning system is essential to alert the drivers. This kind of system can be installed in all types of vehicles, especially in commercial vehicles, so that accident rate can be minimized. The warning system designed here can be called as driver attention system, which raises an alarm and energizes the display board automatically when the following vehicle came near to the in-front running vehicle. The system is designed with 89S52 microcontroller, the task is quite simple, the following vehicle detection circuit is designed with infrared sensors, when the IR signal is interrupted due to the following vehicle, the circuit generates high signal and it is fed to microcontroller. It offers several advantages over conventional multi-chip systems. There is a cost and space advantage as extra chip costs and SRTIST, NALGONDA 1
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KEEP DISTANCE WARNING SYSTEM
CHAPTER 1
INTRODUCTION
1.1 INTRODUCTION:
Most of the accidents in high-ways are happening due to the drowsiness
of drivers, most often this symptom is found in long distance truck drivers, these
drivers may take some time to recognize the opposite vehicle, which is running at low
speed, resulting accident. This kind of accidents may happen due to the drunken
drivers also. So to increase safety an electronic warning system is essential to alert the
drivers. This kind of system can be installed in all types of vehicles, especially in
commercial vehicles, so that accident rate can be minimized. The warning system
designed here can be called as driver attention system, which raises an alarm and
energizes the display board automatically when the following vehicle came near to the
in-front running vehicle.
The system is designed with 89S52 microcontroller, the task is quite
simple, the following vehicle detection circuit is designed with infrared sensors, when
the IR signal is interrupted due to the following vehicle, the circuit generates high
signal and it is fed to microcontroller. It offers several advantages over conventional
multi-chip systems. There is a cost and space advantage as extra chip costs and
printed circuit board and connectors required to support multi-chip systems are
eliminated.
SOFTWARE REQUIREMENT:
1. KEIL MICRO VISION-3
2. MICRO FLASH
HARDWARE REQUIREMENT:
1. MICROCONTROLLER (89S52)
2. LM324.
3. ULTRASONIC SENSOR
4. LCD DISPLAY
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1.2 AIM:
The aim of this system is to alert the following vehicle whenever it
came very close to the ahead vehicle; thereby to some extent accidents can be
avoided .Many accidents at High-ways are taking place due to the close running of
vehicles, all of sudden, if the in front vehicle driver reduces the speed or applied
breaks, then it is quite difficult to the following vehicle driver to control his vehicle,
resulting accidents avoid this kind of accident, the warning system, which contains
alarm and display system can arrange at rear side of each and every vehicle.
1.3 BLOCK DIAGRAM:
FIG (1.3) BLOCK DIAGRAM
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AT 89S52MICRO -CONTROLLER
LCD DISPLAY
POWER SUPPLY
ULTRASONIC SENSOR
BUZZER
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1.4 FLOW CHART:
FIG (1.4) FLOWCHART
1.5 CONCLUSION:
Hence, the circuit is designed such that whenever the infrared signal is
interrupted, logic high signal is generated and it is fed to microcontroller, on receipt of
this signal, the controller activates the display board and alarm automatically.
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Object detection is displayed on LCD
START
Initialization of Microcontroller
Initialization of LCD
Initialization of ultrasonic
STOP STOP
If object is
detected
yes
NO
Buzzer on
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CHAPTER 2
DESCRIPTION OF MICROCONTROLLER
2.1 INTRODUCTION :
The 8051 is an original member of the 8051 family. There are two other
members in the 8051 family of microcontrollers. They are 8052 and 8031. All the
three microcontrollers will have the same internal architecture, but they differ in the
following aspects.
8031 has 128 bytes of RAM, two timers and 6 interrupts.
89S51 has 4KB ROM, 128 bytes of RAM, two timers and 6
interrupts.
89S52 has 8KB ROM, 128 bytes of RAM, three timers and
8 interrupts.
Of the three microcontrollers, 89S51 is the most preferable. Microcontroller
supports both serial and parallel communication.
In the concerned project 89S52 microcontroller is used. Here microcontroller
used is AT89S52, which is manufactured by ATMEL laboratories.
The AT89S52 provides the following standard features: 8Kbytes of Flash,
256 bytes of RAM, 32 I/O lines, three 16-bit timer/counters, six-vector two-level
interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry.
In addition, the AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt
system to continue functioning. The Power down Mode saves the RAM contents but
freezes the oscillator, disabling all other chip functions until the next hardware reset.
The Idle Mode stops the CPU while allowing the RAM, timer/counters,
serial port and interrupt system to continue functioning. The Power down Mode
saves the RAM contents but freezes the oscillator disabling all other chip functions
until the next hardware reset.
By combining a versatile 8-bit CPU with Flash on a monolithic chip, the
AT89C52 is a powerful microcomputer which provides a highly flexible and cost
effective solution to many embedded control applications.
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2.2 PIN CONFIGURATION:
FIG (2.2) PIN DIAGRAM OF 89S52 IC
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2.3 PIN DESCRIPTION:
VCC
Pin 40 provides Supply voltage to the chip. The voltage source is +5v
GND.
Pin 20 is the grounded
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port from pin 32 to 39. As an
output port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the
pins can be used as high-impedance inputs In this mode P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming, and outputs the
code bytes during program verification. External pull-ups are required during program
verification.
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups from pin 1 to 8.
The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to
Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As
inputs, Port 1 pins that are externally being pulled low will source current (IIL)
because of the internal pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external
count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively,
as shown in following table.
Port 1 also receives the low-order address bytes during Flash programming
and program verification.
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TABLE (2.3.1) PORT 1 FUNCTIONS
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups from pin 21 to
28. The Port 2 output buffers can sink / source four TTL inputs. When 1s are written
to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs.
As inputs, Port 2 pins that are externally being pulled low will source current (IIL)
because of the internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that uses 16-bit addresses
(MOVX @ DPTR). In this application it uses strong internal pull-ups when emitting
1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI),
Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the
high-order address bits and some control signals during Flash programming and
verification.
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups from pin 10 to
17. The Port 3 output buffers can sink / source four TTL inputs. When 1s are written
to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs.
As inputs, Port 3 pins that are externally being pulled low will source current (IIL)
because of the pull-ups.
TABLE (2.3.2) PORT 3 FUNCTIONS
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RST
Pin 9 is the Reset input. It is active high. Upon applying a high pulse to this
pin, the microcontroller will reset and terminate all activities. A high on this pin for
two machine cycles while the oscillator is running resets the device.
ALE/PROG
Address Latch is an output pin and is active high. Address Latch Enable
output pulse for latching the low byte of the address during accesses to external
memory. This pin is also the program pulse input (PROG) during Flash programming.
In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency,
and may be used for external timing or clocking purposes.
Note, however, that one ALE pulse is skipped during each access to external
Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR
location 8EH. With the bit set, ALE is active only during a MOVX or MOVC
instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has
no effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When
the AT89C52 is executing code from external program memory, PSEN is activated
twice each machine cycle, except that two PSEN activations are skipped during each
access to external data memory.
EA/VPP
External Access Enable EA must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H up to
FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched
on reset. EA should be strapped to VCC for internal program executions. This pin also
receives the 12-volt programming enable voltage (VPP) during Flash programming
when 12-volt programming is selected.
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XTAL1
Input to the inverting oscillator amplifier and input to the internal clock
operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively, of an inverting
amplifier which can be configured for use as an on chip oscillator, as shown in Figure
5.3. Either a quartz crystal or ceramic resonator may be used. To drive the device
from an external clock source, XTAL2 should be left unconnected while XTAL1 is
driven .
FIGURE (2.3.1) CRYSTAL CONNECTIONS
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FIGURE( 2.3.2) EXTERNAL CLOCK DRIVE CONFIGURATIONThere are no requirements on the duty cycle of the external clock signal, since the
input to the internal clocking circuitry is through a divide-by two flip-flop, but
minimum and maximum voltage high and low time specifications must be observed.
IDLE MODE
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals
remain active. The mode is invoked by software. The content of the on-chip RAM and
all the special functions registers remain unchanged during this mode. The idle mode
can be terminated by any enabled interrupt or by a hardware reset. It should be noted
that when idle is terminated by a hardware reset, the device normally resumes
program execution, from where it left off, up to two machine cycles before the
internal reset algorithm takes control.
On-chip hardware inhibits access to internal RAM in this event, but access to
the port pins is not inhibited. To eliminate the possibility of an unexpected write to a
port pin when Idle is terminated by reset, the instruction following the one that
invokes Idle should not be one that writes to a port pin or to external memory.
POWER DOWN MODE
In the power down mode the oscillator is stopped, and the instruction that
invokes power down is the last instruction executed. The on-chip RAM and Special
Function Registers retain their values until the power down mode is terminated. The
only exit from power down is a hardware reset. Reset redefines the SFRs but does not
change the on-chip RAM. The reset should not be activated before VCC is restored to
its normal operating level and must be held active long enough to allow the oscillator
to restart and stabilize.
Table (2.3.3) Status of External Pins During Idle and Power Down Mode
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2.4 TIMERS:
Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and
Timer 1 in the AT89S52. Register pairs (TH0, TL1), (TH1, TL1) are the 16-bit
counter registers for timer/counters 0 and 1.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event
counter. The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2
has three operating modes: capture, auto-reload (up or down counting), and baud rate
generator. The modes are selected by bits in T2CON, as shown in Table 5.2. Timer 2
consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register
is incremented every machine cycle. Since a machine cycle consists of 12 oscillator
periods, the count rate is 1/12 of the oscillator frequency.
Table (2.4) Timer 2 Operating Modes
In the Counter function, the register is incremented in response to a 1-to-0
transition at its corresponding external input pin, T2. In this function, the external
input is sampled during S5P2 of every machine cycle. When the samples show a high
in one cycle and a low in the next cycle, the count is incremented. The new count
value appears in the register during S3P1 of the cycle following the one in which the
transition was detected. Since two machine cycles (24 oscillator periods) are required
to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator
frequency. To ensure that a given level is sampled at least once before it changes, the
level should be held for at least one full machine cycle.
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There are no restrictions on the duty cycle of external input signal, but it
should for at least one full machine to ensure that a given level is sampled at least
once before it changes.
2.5 INTERRUPTS:
The AT89S52 has a total of six interrupt vectors: two external interrupts
(INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port
interrupt. These interrupts are all shown in Figure 2.5
FIGURE (2.5) INTERRUPTS SOURCE
Each of these interrupt sources can be individually enabled or disabled by
setting or clearing a bit in Special Function Register IE. IE also contains a global
disable bit, EA, which disables all interrupts at once.
Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in
register T2CON. Neither of these flags is cleared by hardware when the service
routine is vectored to. In fact, the service routine may have to determine whether it
was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in
software.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in
which the timers overflow.
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Table (2.5) Interrupts Enable Register
2.6 MEMORY ORGANIZATION :
The total memory of 89S52 system is logically divided in Program memory
and Data memory. Program memory stores the programs to be executed, while data
memory stores the data like intermediate results, variables and constants required for
the execution of the program. Program memory is invariably implemented using
EPROM, because it stores only program code which is to be executed and thus it need
not be written into. However, the data memory may be read from or written to and
thus it is implemented using RAM.
Further, the program memory and data memory both may be categorized as
on-chip (internal) and external memory, depending upon whether the memory
physically exists on the chip or it is externally interfaced. The 89S52 can address
8Kbytes on-chip memory whose map starts from 0000H and ends at 1FFFH. It can
address 64Kbytes of external program memory under the control of PSEN (low)
signal.
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CHAPTER-3
POWER SUPPLY
3.1 INTRODUCTION:
Power supplies are designed to convert high voltage AC mains electricity to a
suitable low voltage supply for electronics circuits and other devices.
Fig (3.1) Block Diagram of a Regulated Power Supply System
3.2 TRANSFORMER:
A transformer steps down high voltage AC mains to low voltage AC. Here we
are using a center-tap transformer whose output will be sinusoidal with 24V peak to
peak.
.
Fig( 3.2) Output Waveform of transformer
The low voltage AC output is suitable for lamps, heaters and special AC motors. It is
not suitable for electronic circuits unless they include a rectifier and a smoothing
capacitor. The transformer output is given to the rectifier circuit.
3.3 RECTIFIER:
A rectifier converts AC to DC, but the DC output is varying. There are several
types of rectifiers; here we use a bridge rectifier.
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The Bridge rectifier is a circuit, which converts an ac voltage to dc voltage
using both half cycles of the input ac voltage. The circuit has four diodes connected
to form a bridge. The ac input voltage is applied to the diagonally opposite ends of the
bridge. The load resistance is connected between the other two ends of the bridge.For
the positive half cycle of the input ac voltage, diodes D1 and D3 conduct. The
conducting diodes will be in series with the load resistance RL and hence the load
current flows through RL. For the negative half cycle of the input ac voltage, diodes
D2 and D4 conduct.The conducting diodes D2 and D4 will be in series with the load
resistance RL and hence the current flows through RL in the same direction as in the
previous half cycle. Thus a bi-directional wave is converted into unidirectional.
FIG (3.3.1) Rectifier circuit
FIG (3.3.2) Rectifier output
Smoothing:
The smoothing block smoothes the DC from varying greatly to a small ripple
and the ripple voltage is defined as the deviation of the load voltage from its DC
value. Smoothing is also named as filtering. Filtering is frequently effected by
shunting the load with a capacitor. The action of this system depends on the fact that
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the capacitor stores energy during the conduction period and delivers this energy to
the loads during the no conducting period. In this way, the time during which the
current passes through the load is prolonging Ted, and the ripple is considerably
decreased. The action of the capacitor is shown with the help of waveform.
Figure (3.3.3) Smoothing action of capacitor
Figure (3.3.4) Waveform of the rectified output smoothing
3.4 Voltage Regulator:
Voltage Regulator eliminates ripple by setting DC output to a fixed voltage.
Voltage regulator ICs are available with fixed (typically 5V, 12V and 15V) or
variable output voltages.Many of the fixed voltage regulator ICs has 3 leads (input,
output and high impedance). Zener diode is an example of fixed regulator which is
shown here.
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Figure (3.4) Voltage Regulator
3.5 POWER SUPPLY CIRCUIT:
Fig (3.5) POWER SUPPLY CIRCUIT
3.5 CONCLUSION:
We here by conclude that most of the digital logic circuits and processors need
a 5 volt power supply. To use these parts we include a regulated 5 volt source.
Unregulated power supply will be ranging from 9 volts to 24 volts DC . So,to make a
5 volt power supply, we use a LM7805 voltage regulator IC .
CHAPTER 4
ULTRASONIC SENSOR
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4.1 INTRODUCTION :
Parallax's PING)))™ ultrasonic sensor provides a very low-cost and easy
method of distance measurement. This sensor is perfect for any number of
applications that require you to perform measurements between moving or stationary
objects. Naturally, robotics applications are very popular but you'll also find this
product to be useful in security systems or as an infrared replacement if so desired.
FIG (4.1) ULTRASONIC SENSOR
This measures distance using sonar; an ultrasonic (well above human hearing) pulse is
transmitted from the unit and distance-to-target is determined by measuring the time
required for the echo return. Output from the PING))) sensor is a variable-width pulse
that corresponds to the distance to the target.
PING)))™ Sensor Features:
The PING))) has only has 3 connections, which include Vdd, Vss, and 1 I/O
pin.
The 3-pin header makes it easy to connect using a servo extension cable, no
soldering required.
Several sample codes are available using the Ping))) sensor.
List of technical specifications:
Range - 2cm to 3m (~.75" to 10')
Supply Voltage: 5V +/-10% (Absolute: Minimum 4.5V, Maximum 6V)