Digital Integrated Circuits Digital Integrated Circuits Introduction: Issues in digital design The CMOS inverter Combinational logic structures Sequential logic gates Design methodologies Interconnect: R, L and C Timing Arithmetic building blocks Memories and array structures
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Digital Integrated Circuits Introduction: Issues in digital design The CMOS inverter Combinational logic structures Sequential logic gates Design.
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Digital Integrated CircuitsDigital Integrated Circuits Introduction: Issues in digital design The CMOS inverter Combinational logic structures Sequential logic gates Design methodologies Interconnect: R, L and C Timing Arithmetic building blocks Memories and array structures
IntroductionIntroduction
Why is designing digital ICs different today than it was before?
Will it change in future?
Moore’s LawMoore’s Law
In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months
Moore’s LawMoore’s Law
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G 2 O
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PE
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Electronics, April 19, 1965.
Evolution in ComplexityEvolution in Complexity
Transistor CountsTransistor Counts
1,000,000
100,000
10,000
1,000
10
100
11975 1980 1985 1990 1995 2000 2005 2010
8086
80286i386
i486Pentium®
Pentium® Pro
K1 Billion 1 Billion
TransistorsTransistors
Source: IntelSource: Intel
ProjectedProjected
Pentium® IIPentium® III
Courtesy, Intel
Moore’s law in MicroprocessorsMoore’s law in Microprocessors
40048008
80808085 8086
286386
486Pentium® proc
P6
0.001
0.01
0.1
1
10
100
1000
1970 1980 1990 2000 2010Year
Tra
nsi
sto
rs (
MT
)
2X growth in 1.96 years!
Transistors on Lead Microprocessors double every 2 yearsTransistors on Lead Microprocessors double every 2 years
Courtesy, Intel
Die Size GrowthDie Size Growth
40048008
80808085
8086286
386486 Pentium ® proc
P6
1
10
100
1970 1980 1990 2000 2010Year
Die
siz
e (m
m)
~7% growth per year~2X growth in 10 years
Die size grows by 14% to satisfy Moore’s LawDie size grows by 14% to satisfy Moore’s Law
Courtesy, Intel
FrequencyFrequency
P6Pentium ® proc
486386
28680868085
8080
80084004
0.1
1
10
100
1000
10000
1970 1980 1990 2000 2010Year
Fre
qu
ency
(M
hz)
Lead Microprocessors frequency doubles every 2 yearsLead Microprocessors frequency doubles every 2 years
Doubles every2 years
Courtesy, Intel
Power DissipationPower Dissipation
P6Pentium ® proc
486
3862868086
80858080
80084004
0.1
1
10
100
1971 1974 1978 1985 1992 2000Year
Po
wer
(W
atts
)
Lead Microprocessors power continues to increaseLead Microprocessors power continues to increase
Courtesy, Intel
Power will be a major problemPower will be a major problem
5KW 18KW
1.5KW 500W
40048008
80808085
8086286
386486
Pentium® proc
0.1
1
10
100
1000
10000
100000
1971 1974 1978 1985 1992 2000 2004 2008Year
Po
wer
(W
atts
)
Power delivery and dissipation will be prohibitivePower delivery and dissipation will be prohibitive
Courtesy, Intel
Power densityPower density
400480088080
8085
8086
286386
486Pentium® proc
P6
1
10
100
1000
10000
1970 1980 1990 2000 2010Year
Po
wer
Den
sity
(W
/cm
2)
Hot Plate
NuclearReactor
RocketNozzle
Power density too high to keep junctions at low tempPower density too high to keep junctions at low temp
Courtesy, Intel
Not Only MicroprocessorsNot Only Microprocessors
Digital Cellular Market(Phones Shipped)
1996 1997 1998 1999 2000
Units 48M 86M 162M 260M 435M Analog Baseband
Digital Baseband
(DSP + MCU)
PowerManagement
Small Signal RF
PowerRF
(data from Texas Instruments)(data from Texas Instruments)
CellPhone
Challenges in Digital DesignChallenges in Digital Design
How to evaluate performance of a digital circuit (gate, block, …)? Cost Reliability Scalability Speed (delay, operating frequency) Power dissipation Energy to perform a function
Cost of Integrated CircuitsCost of Integrated Circuits
NRE (non-recurrent engineering) costs design time and effort, mask generation one-time cost factor
Recurrent costs silicon processing, packaging, test proportional to volume proportional to chip area