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Univ. of Bonn: M.Karagounis, R.Kohrs, H.Krüger, M. Mathes, L.Reuen, C.Sandow, E.von Törne, M.Trimpl, J.Velthuis, N.Wermes
Univ. of Mannheim: P.Fischer, F.Giesen, I.Peric
Politecnico di Milano:M. Porro
MPI Halbleiterlabor Munich:O Hälker, S. Herrmann, L.Andricek, G.Lutz, H.G. Moser, R.H.Richter, M.Schnecke, L.Strüder, J.Treis, P.Lechner, S. Wölfel
THCA of Tsinghua Univ.:C. Zhang, S.N. Zhang
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
DEPFET Principle
• A p-FET transistor is integrated in every pixel.• By sidewards depletion potential minimum created below
internal gate.• Electrons, collected at internal gate, modulate transistor current
~1µm
p+
p+ n+
rear contact
drain bulksource
p
sym
met
ry a
xis
n+
ninternal gate
top gate clear
n -
n+p+
--
++
++
- 50
µm
------
MIP
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
DEPFET Principle
• Advantages:– Fast signal collection due to fully depleted bulk– Low noise due to small capacitance and amplification in
pixel– Transistor can be switched off by external gate – charge
collection is then still active !– Non-destructive readout
• Disadvantages:– Need to clear internal gate. This still requires high
voltages.
• 2 readout modes:– Source follower mode readout. Signal is voltage (XEUS)– Drain readout. Signal is current (WIMS&ILC)
required
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
SOURCE FOLLOWER
• Constant bias current IBias provided• Charge at internal gate translates into source voltage node change• Speed depends on overall load capacitance• Slow (t≈CL/gm≈3µs), but excellent noise
Clear
Clear-gate
Drain Source
GateDEPMOSdevice
Ibias
Buffer /amplifierIbias
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
DRAIN readout
• Measure Idrain directly• Fast response: limited by RC time of input resistance CURO and
Cload (~ns)
Clear
Clear-gate
Source Drain
GateDEPMOSdevice
Vout
CURO: currentamplifier
transimpedenceamplifier
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
DEPFET Applications
• DEPFET under study for:– XEUS
• Exploring the early universe by imaging spectroscopy in the X-ray band
• Need noise < 4e-
• Source follower mode
– WIMS• Wide-band Imaging and Multi-band Spectrometer, part of
China’s spacelab mission• Drain readout
– ILC• Need row rates of 20MHz• Drain readout
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
XEUS
• Exploring the early universe by imaging spectroscopy in the X-ray band
• Detector:– Device active area 7.68 x 7.68
cm2
– Monolithic sensor integrated onto a single 6“ wafer
– Device thickness 450 µm– Pixel size 75 x 75 µm2
– Position resolution ca. 30 µm– Total 1024 x 1024 pixel cells– Total readout time / frame
1.25 ms– Processing time per detector
row 2.5 µs
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
Excellent noise
• Single pixel device • 10 µs shaping• Room
temperature (22° C)
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
Excellent noise
• Large structure (64x64):– 75 x 75 µm2 pixel size – 45 µm gate circumference
/ 5 µm gate length– Drain in center of pixel– Cut gate geometry– Curved edge– Double metal
• Operated at:– Pixel current 30 µA– Line processing time 25 µs
0 1 2 3 4 5 6 71
10
100
1000
10000
Si-KAl-K
Mn-KMn-K
Cou
nts
Energy (keV)
Escape Peak
Energy resolution: 126 eV FWHM @ Mn-Ka Line
corresponding to 4.9 e- ENC
-60 -40 -20 0 20
10
20
30
40
50
60
70
2.78
5.56
8.33
11.11
13.89
16.67
19.44
Normal cycles (tInt
= 3 ms)
Reference cycles (tInt
= 5 s)
Pix
el r
ea
do
ut n
ois
e (
e-
EN
C)
Pix
el r
ea
do
ut n
ois
e (
eV
)
Temperature (°C)
Noise dependence
Pixel readout noise: 63 – 14eV (17 – 3.6 e- ENC)
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
WIMS
• Wide-band Imaging and Multi-band Spectrometer (WIMS) is part of China’s spacelab mission .
• Observe high-energy bursts, transients and fast-varying sources over a broad spectral range simultaneously
• Using Macro pixels– Pixel size 0.5x0.5 mm2
– “Si-drift chamber readout using DEPFET”
0 1000 2000 3000 4000 5000 6000 70000
100
200
300
400
500
600
700
800
FWHM = 209 eV
ENC = 19.1 el r.m.s
Room temperatureBack side illuminates, fast drain readoutShaping time: 3μsClear pulse period 1 ms with width 3 μs
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
DEPFET for ILC
• Basic system • Clearing• ILC requirements• Ladder proposal• Power consumption• Thinning• Radiation hardness• Testbeam results
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
Basic system
• Select and Clear signals provided by SWITCHER – 64 x 2 outputs– Max ΔV = 25V
• Read out row-wise: CURO– current based read out– 128 channels– CDS – real time hit finding
& zero-suppression– row rate up to 24 MHz
n x mpixel
IDRAIN
DEPFET- matrix
VGATE, OFF
off
off
on
off
VGATE, ON
gate
drain VCLEAR, OFF
off
off
reset
off
VCLEAR, ON
reset
output
0 suppression
VCLEAR-Control
Gate Switche
r
ClearSwitche
r
Current Readout CUROII
DEPFET Matrix64x128 pixels, 36 x
28.5µm2
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
HighE vs non-HighE
• HighE extra n-type implant– Moves internal gate
deeper into bulk– Clearing takes places
deeper in the bulk– Lower signals, but
easier clearing
clear
Internal gate
channel
Optional HighE implant
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
Clearing
• CURO measures: Isig,i+Iped,i & Iped,i+1
• Need to remove all charge such that Iped,i+1=Iped,i
• COMPLETE CLEAR possible for HighE with low voltages (~7V)⇒ possible to make radhard SWITCHER in standard CMOS
HighE
Vertex05, 8/11/05 Jaap Velthuis, Bonn University
ILC requirements
• Time structure: 1 train of 2820 crossings in ~1 ms every ~200ms– Hit density: for r = 15 mm: ~ 100 tracks / mm2 / train– Row readout rate: > 20 MHz – Occupany < 0.5 %
• Radiation length: ~0.1% X0 per layer– thinned sensors (50 μm) – low power consumption
• Radiation tolerance: 200 krad (for 5 years operation)