CSC 3650 Introduction to Computer Architecture Time: 3:30 to 6:30Meeting Days: WLocation: Oxendine 1237B Textbook: Essentials of Computer Architecture,

CSC 3650 Introduction to Computer Architecture

Time: 3:30 to 6:30 Meeting Days: W Location: Oxendine 1237B

Textbook: Essentials of Computer Architecture, Author: Douglas E. Comer, 2005, Pearson Prentice Hall

Spring 2011

Chapter SevenCPUs: Microcode, Protection, and

Processor Modes

Dr. Chuck Lillie

Instruction Code Formats

opcode operands

OpcodesAdd = 1010Move = 1000Load = 0000Store = 0001Push B = 0101Push C = 0110Pop A = 1100

Less complex with fewer operands, but more difficult to program

Instruction Set Architecture (ISA) Design

• What should the ISA and its processor be able to do?– Completeness: does the instruction set hall all the instructions a

program needs to perform its required tasks• PC needs rich set

• Microwave oven needs limited set

– Orthogonality: no overlap of instructions• Minimize overlap – provides necessary functions with minimum instructions

– Register set: more registers speeds up CPU operations, but unused registers take up needed space

• Does the processor have to be backward compatible with others?

• What types and size of data will microprocessor deal with?– Need floating point instructions?

– Need character instructions?

– Are interrupts necessary?

– Are conditional instructions necessary?

A Relatively Simple Instruction Set Architecture

• Memory Module– 64K (= 216) bytes of memory with each byte having 8 bits (64K X

8)

– I/O is treated as memory access (Memory Mapped I/O)

• 3 Registers– Accumulator AC

• 8 bit register used as on of the operands

• Data loaded from memory to AC and AC to memory

– R• 8 bit general purpose register

– 1-bit zero flag Z• Set when arithmetic or logic instruction is executed

• 0 results sets flag to 1

Instruction Set for Relatively Simple CPU

• Γ = 16 bit memory address• An instruction with a memory reference requires 3-bytes• Instruction with 3-bytes stores address bytes with low order bytes first and high order bytes next

• 25: JUMP 1234H• 25: 0000 0101 (JUMP)• 26: 0011 0100 (34H)• 27: 0001 0010 (12H)

M[Γ] is memory location at Γ

Instruction Format for Relatively Simple CPU

3-byte Format 1-byte Format

Data Movement Instruction for 8085 Microprocessor

Instruction Format for 8085 Processor

Data Operation Instruction for 8085 Microprocessor

Program Control Instruction for 8085 Microprocessor

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.