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BEHAVIOR IS GIVEN. THIS BEHAVIOR IS CONVERTED INTO
SWITCHING (BOOLEAN) FUNTIONS WHICH LOGICLY RELATE INPUTS TO OUTPUTS.
THESE FUNCTIONS ARE MINIMIZED TO OBTAIN A TWO-LEVEL CIRCUIT REALIZATION, USING STANDARD GATES FROM A COMPLETE SET, I.E. EITHER {AND,OR,NOT}, {NAND} OR {NOR} SETS.
FACTORIZATIONBy finding common factors in the terms of the sum-of-products expression, it is possible to use gates with less fan-in. However, the resulting circuit has more propagation delay than the two-level-logic equivalent. For example: Consider the SUM function. If only two-input gates are available, then SUM = A B Cin = (A !B + !A B) !Cin + (!A !B + A B) Cin = (A B) Cin which produces the circuit
SHARING BUILDING BLOCKS AMONG OUTPUTFUNCTIONS (Continues) The canonical sum-of-products expression of Cout is COUT = A B CIN + A B !CIN + A !B CIN + !A B CIN [1] The Shannon expansion of COUT with respect to A,B is COUT =[R0] !A!B +[R1] !AB+[R2] A!B +[R3] AB [2] FOR Z = A B TO EXIST IN [2], R1 MUST BE IDENTICAL TO R2 AND TO CIN
FOR [1] TO BE IDENTICAL TO [2], WE MUST HAVE R3 = 1 AND R0=0 THE SOLUTION IS COUT = CIN Z + A B OR COUT = CIN (A B) + A B
DESIGNING WITH MULTIPLEXERS An m x 1 multiplexer, or m x 1 MUX, is a circuit with m
= 2n input lines, called data lines, one output line and n select input lines. Each combination of the select lines connects one and only one input data line to the output.
The Shannon expansion is used to synthesize with multiplexers
S1
S4
D
C2C1 ENB
Multiplexer
inputs
select lines
Enable signal used to activate, ENB = 1,or desactivate, ENB = 0,the circuit.
DESIGNING WITH MULTIPLEXERS (Continues) EXAMPLE: DESIGN A FULL ADDER WITH TWO 4 X 1 MUX’s The Shannon expansion of SUM and Cout with respect to A,B are:
SUM = [Cin] !A !B + [!Cin]!A B + [!Cin] A !B + [Cin]A B
Cout = [0] !A !B + [Cin]!A B + [Cin] A !B + [1] A B
DECODERS A DECODER IS A CIRCUIT WITH N INPUTS AND 2N
OUPTUTS. FOR EACH COMBINATION OF THE INPUTS, ONE AND ONLY ONE OUTPUTS IS ACTIVE. THE DEVICE CAN BE THOUGHT OF GENERATION ALL THE MINTEMS OF A BOOLEAN FUNCTION OF N VARIABLES. FOR N=3 IT IS REPRESENTED AS FOLLOWS
LOOK-UP-TABLE LOGIC BLOCKS A LOOK-UP-TABLE CIRCUIT, OR LUT, IS A MULTIPLEXER WITH ONE
STORAGE CELL AT EACH INPUT DATA LINE. THESE STORAGE CELL ARE USED TO IMPLEMENT SMALL LOGIC FUNTIONS. EACH CELL HOLDS EITHER A 0 OR A 1. THE SIZE OF A LUT IS DEFINED BY THE NUMBER OF INPUTS, WHICH ARE THE SELECT LINES OF THE MULTIPLEXER.
EXAMPLE: A 3-LUT BUILT WITH AN 8 x 1 MUX
THE CONTENTS OF THE STORAGE CELLS ARE WRITTEN INSIDE THE RETANGLE. THIS CONTENTS IS THE TRUTH TABLE OF THE FUNCTION TO BE PRODUCED BY THE 3-LUT.
LOOK-UP-TABLE LOGIC BLOCKS (continues) ANY 4-VARIABLE FUNCTION CAN BE PRODUCED WITH AT MOST THREE 3-LUTS. EXAMPLE: Produce the function F = !BC+!AB!C+B!CD+A!B!D The Shannon expansion with respect to A gives F = !A R!A + A RA = !A(!BC + B!C) + A(!BC+ B!CD + !B!D) NOTICE THAT F = !A R!A + A RA is of the form F = !a b + a c and should be produced by the output LUT. THE RESULTING CIRCUIT IS
LOOK-UP-TABLE LOGIC BLOCKS (example continues) EXAMPLE: Produce the function F = !BC+!AB!C+B!CD+A!B!D The Shannon expansion with respect to B gives F = !B R!B + B RB = !B(C + A!D) + B(!A!C+ !CD) NOTICE THAT !R!B = RB AND, THEREFORE, ONLY TWO 3-LUTS ARE NEEDED. THE RESULTING CIRCUIT IS
REMARK: AT THE PRESENT TIME, WE DO NOT KNOW ‘A PRIORI’ WHICH EXPANSION VARIABLE WILL PRODUCE THE MOST ECONOMICAL CIRCUIT. TRIAL AND ERROR METHOD IS THE BEST WE CAN DO.
IF F IS NOT ANY OF THE INPUT VARIABLES A,B,C,…,T,R, THEIR COMPLEMENTS OR CONSTANT 0 OR CONSTANT 1, THEN THE OUTPUT F MUST COME FROM THE OUTPUT OF A BUILDING BLOCK G. SOLVING F = G FOR X, Y,…,Z AS FUNCTIONS OF A,B,C,…T,R WILL DETERMINE THE INPUTS TO THE OUTPUT BLOCK. THE METHOD IS ITERATED UNTIL THE INPUT VARIABLES, THEIR COMPLEMENTS OR CONSTANTS 0, 1 ARE FOUND.
THIS METHOD IS INTENDED TO BE COMPUTERIZED AND USED AS PART OF A CAD SYSTEM