1 All rights reserved. Duplication or copying is not permitted without written permission by author Prof. Sam Ben-Yaakov Control Design of PWM Converters: The User Friendly Approach Email: [email protected]; Web: http://www.ee.bgu.ac.il/~pel/ Seminar material download: PET06 Power Electronics Technologies Conference Long Beach CA, October 2006 Prof. S. Ben-Yaakov , Control Design of PWM Converters [2] Motivation Most switch mode systems need to operated in closed loop Performance largely dependent on the Compensator (feedback) design Loop control design is conceived as “black magic” OR requiring tedious analytical derivations Digital control is becoming relevant
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1
All rights reserved. Duplication or copying is not permitted
without written permission by author
Prof. Sam Ben-Yaakov
Control Design of PWM Converters: The User Friendly Approach
Prof. S. Ben-Yaakov , Control Design of PWM Converters [81]
Working with PSPICE
Prof. S. Ben-Yaakov , Control Design of PWM Converters [82]
PSPICE Convergence Problems
• Very common in switched circuits simulation
42
Prof. S. Ben-Yaakov , Control Design of PWM Converters [83]
AEi Power IC Library
• PWM controllers are not included in PSPICE libraries• AEi’s library supports Power Electronics
150 SPICE Models for Popular Power ICs
Regulators, Controllers, Switchers
FET Drivers
Support for Capture and Schematics
Symbols
Example Applications schematics/simulations
Documentation
Prof. S. Ben-Yaakov , Control Design of PWM Converters [84]
PSIM -The Switching Circuit Simulator
• Disregards switching instances• Fast and effective time domain algorithm • Constant time step approach • Transient (time domain) based AC analysis
• User friendly intuitive interface• Generic models: passive, switchers, motors• Analog Behavior Models library• Simulink interface• Interface to magnetics program
• Prone to errors in simulation results• Simple output graphics utility
43
Prof. S. Ben-Yaakov , Control Design of PWM Converters [85]
PSIM AC Model
Excitationsource
• Multiple time-domain runs are used to obtain AC response
Prof. S. Ben-Yaakov , Control Design of PWM Converters [86]
PLECS – The MATLAB Plug-In
• Power tool-kit for SIMULINK • Allows the simulation of power stage as integrated
part of MATLAB (SIMULINK) simulation without introducing extra delays
• Ideal for investigating digital control loops in power systems
• Only generic models• Simulink interface for both schematic and
graphics
44
Prof. S. Ben-Yaakov , Control Design of PWM Converters [87]
V_dc
V: 300
I IIMutual
Ind. 2
V Vm2
D
4MOSFET1
R3
R: 10e3
C2
C: 10e-9
Ground1
GateOut1
5
Gate
1
C1
C: 22e-6
D1
R1
R: 23Vout
1VVm1
Ground
AAm2
I_L2
3Llkg
AAm1
I_L1
2
D2
PLECS Circuit
PLECS Circuit as a Simulink Block
num(s)
s+2.564e5
Transfer Fcn
Secondary
Current
m s
Sawtooth PWM
Saturation1
Saturation
Primary
Current
Output
Voltage
-K-
Gain Drain
Voltage
0.724 Constant1
5 Constant
Gate
Vout
I_L1
I_L2
D
GateOut1
PLECS
Circui t
Circui t
Prof. S. Ben-Yaakov , Control Design of PWM Converters [88]
PSPICE cycle-by-cycle model
• Uses physical level models of “real” devices
Vin
V5
5Vdc
0
C5
10n
R11
10k
R12
1.2k
0
R6
20K
gate
eaout
C4
3.9n
OUT+OUT-
IN+IN-
E1
V(%IN+, %IN-)*100k
ETABLE(0,0) (15,15)
PWMSnubber
EA
K K1
COUPLING = 1K_Linear
L1 = L1
L2 = L2
1
2
L1
0.5m
secondary
0
0
V4
300Vdc
C2
22u
IC = 48R2
23
0
1
2
L2
0.5m
OUT+OUT-
IN+IN-
E2
V(%IN+, %IN-)*100k
ETABLE
(4.36,4.36) (9.2,9.2)
out
R3
10k
R7
10m
C3
10n
M3
IRF830
Vref
D3
MBR360
R9
10k
D5
MUR160
V6
4.3105Vdc
R13
80
V7
TD = 0
TF = 0.0009u
PW = 0.1n
PER = 10u
V1 = 0
TR = 9.999u
V2 = 5
0
Vd
1
2
L3
0.002m
R14
10
45
Prof. S. Ben-Yaakov , Control Design of PWM Converters [89]
PSIM Flyback cycle-by-cycle model(Time Domain)
DemoReal time: 3 ms
Prof. S. Ben-Yaakov , Control Design of PWM Converters [90]
PSIM DCM cycle-by-cycle simulation results
Rload=220Ω
• Textbook waveforms
46
Prof. S. Ben-Yaakov , Control Design of PWM Converters [91]
PSPICE vs. PSIM Flybackcycle-by-cycle simulation results
Prof. S. Ben-Yaakov , Control Design of PWM Converters [92]
PSPICE vs. PSIM Flybackcycle-by-cycle simulation results
Time, [ms]
2.96 2.982.95 3.002.97 2.99
Secondary current
Primary current
-2.0A
0A
2.0A
4.0A
-2.0A
0A
2.0A
4.0A
47.5V
47.7V
47.8V
47.6V
Output voltage
PSPICE PSIM
47
Prof. S. Ben-Yaakov , Control Design of PWM Converters [93]
Small Signal (AC) Analysis(Needed for Control Design)
Two Alternatives:
1. Full switched circuit: Injection of a sinusoidal perturbations
PSPICE manuallyPSIM automatic
2. Average Model
PSPICE AC analysis(linearization by simulator)
PSIM automatic transient injection
Prof. S. Ben-Yaakov , Control Design of PWM Converters [94]
Small signal response by injection of sinusoidal perturbations ( time domain)
MOD
Io
RL
CD
LS Vo
ESR
vo
io
D d
VD
vex
Transient simulation – any simulator
48
Prof. S. Ben-Yaakov , Control Design of PWM Converters [95]
PSIM Realization (Buck)
Prof. S. Ben-Yaakov , Control Design of PWM Converters [96]
-20
-10
0
10
20
30
40
50
60
100 1K 10K
Gain
, [d
B]
PSPICEPSIM
40K
-250
-200
-150
-50
0
100 1K 10K 40K
Frequency, [Hz]
-100
PSPICEPSIM
Pha
se,
[deg]
Frequency, [Hz]
dB3V
20mV
257µS*1.5kHz*3600
Power-Stage small signal transfer functionBy injection of sinusoidal perturbation - PSIM & PSPICE
Time, [ms]
4.00 5.00 6.003.61 6.75-20
0
20
45.0
47.5
50.0
[mV
][V
]
Output voltage
Vpk-pk: 3V
Sinus excitation
Vpk-pk: 20mV
257µS
PSPICE
Boost
49
Prof. S. Ben-Yaakov , Control Design of PWM Converters [97]
The Behavioral ApproachAverage Model of Flyback - PSPICE
300.0V
outR3
0.001
47.99V
Duty cycle generator
0V
G1
I(L1)*V(doff)/n
GVALUE
OUT+OUT-
IN+IN-
d
47.99V
0V
C1
22u
in
E2
min(1-V(d),(2*Lmain*fs*I(L1)/(V(in)*V(d))-V(d)))
ETABLE
OUT+OUT-
IN+IN-
V5
0.01Vac
R4
10m
862.1mVdoff
0
PARAMETERS:
n = 1Vin = 300Vfs = 100kHzLmain = 0.5m
E1
Vin*V(d)-V(out)*V(doff)/n
EVALUE
OUT+OUT-
IN+IN-
47.99VL1
Lmain
1
2
0
V2
0.1379
0
137.9mV
V4
Vin
R2
23
• Average models can be applied to obtain frequency response – AC analysis (to be discussed later)
Prof. S. Ben-Yaakov , Control Design of PWM Converters [98]
Signal injection versus Average model
Signal injection
Applies the switching schematics as is
Takes a long time to run
Noisy at high frequency
Average model
Runs very fast
Need to built a behavioral equivalent
Some topologies/controllers are not easy to convert to average circuits
50
Prof. S. Ben-Yaakov , Control Design of PWM Converters [99]
PSIM vs. PSPICE AC Comparison
100 1k 10kG
ain
, [d
B]
100k
100 1k 10k 100k
Frequency, [Hz]
Phase,
[de
g]
Frequency, [Hz]
-30-20
-10
0
10
20
30
40
50
0
-50
-100
-150
-200
-250
PSIMPSPICE
PSIMPSPICE
doutv
Prof. S. Ben-Yaakov , Control Design of PWM Converters [100]
Applications:• DC transfer functions • Transient (large signal, time domain) phenomena • Small signal (AC, time domain) transfer functions
Not applicable to:• Switching details, rise and fall times, spikes• Device characteristics and losses • Subharmonic oscillations
• Conduction losses can be accounted for• HF ripple can be estimated
Behavioral average modeling of switch mode systems
51
Prof. S. Ben-Yaakov , Control Design of PWM Converters [101]
Identify the switched assembly Replace the switching part by a continuous
behavioral (analog) equivalent circuit Leave the analog part as-is Run the combined circuit on a general purpose
simulator
The modeling methodology presented in this seminar is highly ‘portable’, independent of simulator
Demonstration by PSPICE Ver. 10.5 (Demo Edition)
7. Average ModelsThe Switched Inductor Model (SIM) Strategy
Prof. S. Ben-Yaakov , Control Design of PWM Converters [102]
Modulator ControlEVD
inV
AssemblySwitched
oV
++++−−−−
• The problematic part : Switched Assembly• Rest of the circuit continuous - SPICE compatible• The objective : translate the Switched Assembly into an equivalent circuit which is SPICE compatible
The switched inductor model
52
Prof. S. Ben-Yaakov , Control Design of PWM Converters [103]
Average Simulation of PWM Converters
++++−−−−
++++−−−−
++++−−−−
ontb d c
a
fC LoadR
outV
inVLI
bI CI
outV outV
LoadR LoadRfCfC
L
a d c
b
CILIbI
inVinV
b ont L
bI LI
CI
d
c
L
Buck Boost
BoostBuck −−−−
Prof. S. Ben-Yaakov , Control Design of PWM Converters [104]
TON - switch conduction time TOFF - diode conduction timeTDCM - no current time (in DCM)
L ab
c
b ONT
DCMTOFFT
L
c
a
Possible switch modes
53
Prof. S. Ben-Yaakov , Control Design of PWM Converters [105]
The Switched Inductor Model (SIM) (CCM)
The concept of average signals
t
t
t
aI
bI
cI
bI
aI
cI
b bI
cIcaI a L ONT
OFFT
Prof. S. Ben-Yaakov , Control Design of PWM Converters [106]
b bI
cIcaI a L ONT
OFFT
b
caI a
bI
cI?
⇓⇓⇓⇓
Objective : To replace the switched part by a continuous network
54
Prof. S. Ben-Yaakov , Control Design of PWM Converters [107]
b
c
a L ONTaI
bI
cILI
Average current
IbI
LI
bI
ONT
ST
onLS
ONLb DI
T
TII ========
S
ONon
T
TD =
offLS
OFFLc DI
T
TII ========
La II ====
Similarly :
Prof. S. Ben-Yaakov , Control Design of PWM Converters [108]
b
c
bI
cI
a aG
bG
cG
aI
Toward a continuous model
b
caLa II ====
onLb DII ⋅⋅⋅⋅====
offLc DII ⋅⋅⋅⋅====
⇓⇓⇓⇓Ga, Gb,Cc - currentdependent sources
offLc
onLb
La
DIG
DIG
IG
⋅⋅⋅⋅≡≡≡≡
⋅⋅⋅⋅≡≡≡≡
≡≡≡≡
55
Prof. S. Ben-Yaakov , Control Design of PWM Converters [109]
LV
LIV
t
LV
LV
LI
LI
valueAverageXX
L
V
dt
Id
L
V
dt
dI LL
========
====⇒⇒⇒⇒====
IL derivation
Prof. S. Ben-Yaakov , Control Design of PWM Converters [110]
LV (((( ))))b,aV
(((( ))))c,aV
onT offT
sT
offon
S
offonL
D)c,a(VD)b,a(V
T
T)c,a(VT)b,a(VV
⋅⋅⋅⋅++++⋅⋅⋅⋅====
====⋅⋅⋅⋅++++⋅⋅⋅⋅
====
b
c
a L
)b,a(V
)c,a(V
Average inductor voltage
56
Prof. S. Ben-Yaakov , Control Design of PWM Converters [111]
The Generalized Switched Inductor Model (GSIM) Model
b
c
aaG
bG
cG
offonL
offLc
onLb
La
D)c,a(VD)b,a(VV
DIG
DIG
IG
⋅⋅⋅⋅++++⋅⋅⋅⋅====
⋅⋅⋅⋅====
⋅⋅⋅⋅====
====
b
ca
LL
Lr
LI
LE
Topology independent !
Prof. S. Ben-Yaakov , Control Design of PWM Converters [112]
Example: Implementation in Buck Topology
1. The formal approach
off0onin0L
offconba
D]0V[D]VV[E
D)L(IGD)L(IG)L(IG
⋅⋅⋅⋅−−−−++++⋅⋅⋅⋅−−−−====
⋅⋅⋅⋅====⋅⋅⋅⋅========
b
c
a
aGbG
cG
oRoC
inV
oV
LELI
L
)b,a(V
)c,a(VLr
S L
oC oRinV
ab
c
57
Prof. S. Ben-Yaakov , Control Design of PWM Converters [113]
Implementation in Buck Topology
2. The intuitive approach - by inspection
L
oCoRinV
oV
LI
inE
bG
S L
oC oRinV D
oV
Loin
onLb
oninin
VVE
DIG
DVE
→→→→++++
⋅⋅⋅⋅====
⋅⋅⋅⋅====
Polarity: (voltage and current sources) selected by inspection
Prof. S. Ben-Yaakov , Control Design of PWM Converters [114]
Boost
S
L
oC oRinV
DoV
L
oCoRinV
oV
ooff VD ⋅⋅⋅⋅
offL DI ⋅⋅⋅⋅
• Emulate average voltage on inductor• Create IL dependent current sources
58
Prof. S. Ben-Yaakov , Control Design of PWM Converters [115]
Making the model SPICE compatible
lL
IL and DON are time dependent Variables IL(t), DON (t)
DON is not an electrical variable
onDLIbG
Prof. S. Ben-Yaakov , Control Design of PWM Converters [116]
⇓⇓⇓⇓In SPICE environment
Don is coded into voltage
++++−−−−
Source
onD"D":nodeofName on
)L(I)D(V lon ∗∗∗∗ lL
Gvalue
59
Prof. S. Ben-Yaakov , Control Design of PWM Converters [117]
DC (steady state points) - as is
TRAN (time domain) - as is
AC ( small signal) - as is
• Linearization is carried out by simulator !
Running SPICE simulation
Prof. S. Ben-Yaakov , Control Design of PWM Converters [118]
Discontinuous Model (DCM)
b
cLIa L ONT
OFFT
onT offT
offT
sT
t
pkILI
ons
Nsoff
onsoff
D1T
TT'D
TT'T
−−−−====−−−−
====
−−−−====
Doff ≠≠≠≠ 1 - Don
60
Prof. S. Ben-Yaakov , Control Design of PWM Converters [119]
The combined DCM / CCM model
b
ca
L
b
c
aaG
bG
cG
L
Lr
LI
−−=
+=
+≡
+≡
≡
onon
sLonoff
offonL
offon
offLc
offon
onLb
La
DD)b,a(V
LfI2),D1(minD
D)c,a(VD)b,a(VV
DD
DIG
DD
DIG
IG
Prof. S. Ben-Yaakov , Control Design of PWM Converters [120]
Synchronous Power Stages(diode replaced by switch)
Only two stated for switched inductor:
open and closed
No third state as in DCM
Use CCM model
61
Prof. S. Ben-Yaakov , Control Design of PWM Converters [121]
LResrR
outC
oVoutL
1D
MODPWM
onDV
exV
D
inV
pulsinV
Buck ConverterExample:
Prof. S. Ben-Yaakov , Control Design of PWM Converters [122]
File: Buck_cy_by_cy.OPJ
Lout
Lout
a
PARAMETERS:
VIN = 10v
out
in RLoad
RLoad
Rinductor
Rinductor
PARAMETERS:
LOUT = 75uCOUT = 220uRLOAD = 10
Vin
Vin+
-
CoutCout
PARAMETERS:FS = 100kTS = 1/fs
0
buck_cy_by_cy.sch
Dbreak
D1
Cycle by Cycle simulationof PWM Buck converter
+ -
+ -
Sbreak-XS1
VD
PW = 5u
PER = 10u
+-
Resr
Resr
PARAMETERS:RESR = 0.07RINDUCTOR = 0.1
62
Prof. S. Ben-Yaakov , Control Design of PWM Converters [123]
Time
0s 2.0ms 4.0ms 6.0ms
-I(Lout)
-10A
0A
10A
V(out)
0V
10V
Power Start-Up at Constant Don
DCM to CCM
Prof. S. Ben-Yaakov , Control Design of PWM Converters [124]
Time
1.625ms 1.750ms1.535ms 1.862ms
-I(Lout)
0A
250mA
500mA
Zooming up
63
Prof. S. Ben-Yaakov , Control Design of PWM Converters [125]
L
oCoR
inV
oVLr
cr
dsonR
b c
a
SIM
inV
dsonR b
c
aG
bG
cG
oC
oRcr
a
Lr
L
LI
LE
Average model
Prof. S. Ben-Yaakov , Control Design of PWM Converters [126]
File: Buck.OPJ
PARAMETERS:
FS = 100kTS = 1/fs
Average simulation by SIM-Model of PWM Buck converter
Prof. S. Ben-Yaakov , Control Design of PWM Converters [227]
Time
640.0ms 650.0ms 660.0ms 670.0ms 679.7ms
v(out)
10V
15V
20V
25V
SEL>>
I(L1)
0A
250mA
500mA
Vin=230V, Pout=70W, 50W
Behavior at Different Power Levels
Inductor Current
Output Voltage
Prof. S. Ben-Yaakov , Control Design of PWM Converters [228]
PSpice simulation
PFC_DCM - CBCPFC_DCM - avg
115
Prof. S. Ben-Yaakov , Control Design of PWM Converters [229]
Prof. S. Ben-Yaakov , Control Design of PWM Converters [230]
9. Digital Control
( ) ( ) ( )sBsPSMKtKsLG =
Analog/continuous control
116
Prof. S. Ben-Yaakov , Control Design of PWM Converters [231]
Digital/discrete control
( ) ( )zBsPSeKKKLG Ts-A/DMt
∆=
• Sampling and computation delay
• Additional gain – KA/D
z
1⇔∆Ts-e
A/D
N
V
2 A/D
PWMN2
1
Prof. S. Ben-Yaakov , Control Design of PWM Converters [232]
Time
T∆∆∆∆
Sampling IssuesZOH
117
Prof. S. Ben-Yaakov , Control Design of PWM Converters [233]
ZOH fs=10KHz
500Hz
1.5KHz
2.5KHz
Prof. S. Ben-Yaakov , Control Design of PWM Converters [234]
Time
sample (n)
computationA/D
output
PWM (n+1)
sample (n+2)(result of sample (n))
D (n) D (n+1)
S
Sf
1T ====
sample (n+1)
Sampling rate = fs
Sampling Delays
118
Prof. S. Ben-Yaakov , Control Design of PWM Converters [235]
Time
sample (n)
computationA/D
outputPWM (n+1)
sample (n+1)
(result of sample (n-1))
D (n) D (n+1)
S
Sf
1T ====
D (n)
Slow Sampling Rate
Sampling rate = 2
fs
Prof. S. Ben-Yaakov , Control Design of PWM Converters [236]
Compensation network, continuous
( ) ( ) ( )tcVdt
tcdVteKV +=− τ
( ) ( ) ( )∫∫∫ +=− dttcVtcdVdtteVK τ
( ) ( ) ( )scVs
1scVseV
s
K+=− τ
( )( ) 1s
K
sV
sV
e
c
+−=
τ
Differential equation:
Integral equation:
Laplace transform:
Transfer function:
2R1R
K =
C1R=τ
+
-Ve(t)
Vc(t)
R2
C
R1
( ) ( ) ( )1
cc
2
e
R
tV
dt
tdVC
R
tV−−=
119
Prof. S. Ben-Yaakov , Control Design of PWM Converters [237]
Discretization rules
Differential equations transforms to difference equations
Integral equations transforms to summations
( ) [ ] [ ]∆T
1nVnV
dt
tdV −−⇒
( ) [ ]∑∫∞=
⇒1-n
-k
kV∆TdttV
Z-transform is the discrete time dual of the Laplace transform
( ) ( ) ( ) [ ] kz
-k
kVzVdtste
-
tVsV −∞
∞==⇔−
∞
∞= ∑∫
Transfer functions are represented in Z
Prof. S. Ben-Yaakov , Control Design of PWM Converters [238]
ωωωωj
σσσσ
S plane]zIm[
-1 ]zRe[
Z plane
-1
1
1
stable unstable
unstable
stable
1
1
e
o
az1
z
az
1
v
v−−−−
−−−−
++++====
++++====
1
e
1
o zv)az1(v −−−−−−−− ====++++)1n()1n( eoo vavv −−−−−−−− ++++⋅⋅⋅⋅====
Unstable if a>1
120
Prof. S. Ben-Yaakov , Control Design of PWM Converters [239]
1z
z)z(
v
v2
in
o
−−−−====
2
1
in
o
z1
z)z(
v
v−−−−
−−−−
−−−−====
1in
2o zv)z1(v −−−−−−−− ====−−−−
1in
2oo zvzvv −−−−−−−− ++++====
)1n()2n( inoo vvv −−−−−−−− ++++====
The intuitive meaning of the z operators ⇒⇒⇒⇒ derivative operator; z ⇒⇒⇒⇒ Delay operator
Prof. S. Ben-Yaakov , Control Design of PWM Converters [240]
Continuous to discrete transformation
• Pole-Zero matching
• Zero Order Hold (ZOH)
• Trapezoid (bilinear) transformation
121
Prof. S. Ben-Yaakov , Control Design of PWM Converters [241]
Pole-Zero matching
• Map discrete poles/zeros by
• For complex s-domain roots
• Maintain same DC gain
T∆isi ez =
T∆ijbT∆iaiiii eezjbas =→+=
( ) ( ) 1z0s zGsG == =
( )( )
( )nz
m
ez
e1K
zV
zV
τ∆T
τ∆T
e
c
−=
−
−=
−
−
( )( )( )( )
( )( )
τ
ττ
∆T
e
c
e
c
∆Te
c
e1PzV
zV
sV
sV
ez
PK
1s
K
sV
sV
−
==
−
−=→=
−→
+=
1|0| zs
Z
== 0b;τ
1a ii
m, n - constants
Prof. S. Ben-Yaakov , Control Design of PWM Converters [242]
Zero Order Hold (ZOH)
Transfer function:
( )( ) nz
m
∆Tz∆T
∆TK
zV
zV
e
c
−=
+−+
=
τττ
1
∆T
1zs
−⇔
∆T
∆TK
+τ
∆T+ττ
Hold equivalent = sampled area
( )( ) 1s
K
sV
sV
e
c
+=
τ
( )( )
1∆T
1z
K
zV
zV
e
c
+−
=τ
122
Prof. S. Ben-Yaakov , Control Design of PWM Converters [243]
Trapezoid (bilinear) transformation
1z
1z
∆T
2s
+−
⇔
Transfer function:
( )( )
−+
+=
1z
1z
2∆T
2∆TK
zV
zV
e
c
τ
2
2
∆T
∆TK
+τ
Hold equivalent = sampled area
( )( ) 1s
K
sV
sV
e
c
+=
τ
( )( )
11z
1z
∆T
2
K
zV
zV
e
c
++−
=τ
Prof. S. Ben-Yaakov , Control Design of PWM Converters [244]
Comparison of hold types
fs=50KHz
( )( ) 1.1s
10
sV
sV
e
c
+=
0
123
Prof. S. Ben-Yaakov , Control Design of PWM Converters [245]
Effects of sampling rate
Hold Type: ZOH
Discretization: Inherent Phase-lag
Prof. S. Ben-Yaakov , Control Design of PWM Converters [246]
A/D and PWM ResolutionThe Limit Cycle Problem
Oscillatory output Stable output[mV/bit]
duty/Vc
124
Prof. S. Ben-Yaakov , Control Design of PWM Converters [247]
No Limit cycle rules
One bit of the DPWM should change Vo
by less than 1 bit of the A/D
Compensator must include integral action (included in PID)
System must satisfy Nyquist criterion
Taking into account the system gains
A/DDPWMtPS qqKK <
0A(s)B(s)10A(s)B(s)1 ≠+>+
Stability Oscillations
Prof. S. Ben-Yaakov , Control Design of PWM Converters [248]
Digital Compensator Design Methods
Frequency domain based
Pole location in z plane
Time domain design
125
Prof. S. Ben-Yaakov , Control Design of PWM Converters [249]
Frequency domain design
1. Design a frequency domain controller (Bode, Nichols, etc.)
2. Refinement: take into account the sampling and computational delays
3. Translate the analog controller into a Z equivalent
4. Simulate by numerical simulator (e. g. MATLAB)
Prof. S. Ben-Yaakov , Control Design of PWM Converters [250]
Frequency domain design References
[1]V. Yousefzadeh, W. Narisi, Z. Popovic, and D. Maksimovic, “A digitally controlled DC/DC converter for an RF power amplifier”, IEEE Trans. on PE, Vol. 21, 1, 164-172, 2006.
[2]G. F. Franklin, J. D. Powell, M. L. Workman, Digital control of dynamic systems, 3rd edition, Prentice Hall, 1998.
[3] B. J. Patella, A. Prodic, A. Zirger, and D. Maksimovic, “High-frequency digital PWM controller IC for DC-DC converters”, IEEE Trans. on PE, Vol. 18, 1, 2, 438-446, 2003.
126
Prof. S. Ben-Yaakov , Control Design of PWM Converters [251]
Z Plane DesignUsing the MATLAB SISO tool
1. Define the system structure
2. Define the Plant response
3. Define the compensator template
4. Select the analysis view (Root Locus, Bode, Nichols)
6. You can use the GUI to change pole/zero locations (either in S or Z and observe the resulting closed loop response
• Trial and error procedure
Prof. S. Ben-Yaakov , Control Design of PWM Converters [252]
MATLAB SISO tool References
[1] O. Garcia, A. de Castro, A. Soto, J. A. Oliver, J. A. Cobos, J Cezon, “Digital control for power supply of a transmitter with variable reference”, IEEE Applied Power Electronics conference APEC-2006, 1411-1416, Dallas, 2006.
[2] The Mathworks, Matlab control toolbox user guide, available at www.mathworks.com.
127
Prof. S. Ben-Yaakov , Control Design of PWM Converters [253]
Time domain Discrete Controller Design
Digital compensator operates in the sampled-data domain
Direct controller design - does not involve errors related to approximations (s to z)
When working in the time domain, system attributes such as bandwidth and phase margin seem artificial
Relevant parameters are: rise time, overshoot etc.
Improved performance of the closed loop system compared to other discrete design approaches
Does not involve trial and error procedure
Prof. S. Ben-Yaakov , Control Design of PWM Converters [254]
Time domain Discrete Controller DesignReferences
[1] G. F. Franklin, J. D. Powell, M. L. Workman, Digital control of dynamic systems, 3rd edition, Prentice Hall, 1998.
[2] J. R. Ragazzini and G. F. Franklin, Sampled-data control systems, McGraw-Hill, 1958.
[3] J. G. Truxal, Automatic feedback control systems synthesis, McGraw-Hill, 1955.
[4] B. Miao, R. Zane, and D. Maksimovic, “Automated Digital Controller
[5] Design for Switching Converters”, IEEE Power Electronics Specialists Conference, PESC-2005, 2729-2735, Recife, 2005.
[6] M. M. Peretz and S. Ben-Yaakov, Time domain design of digital compensators for PWM DC-DC converters, IEEE Applied Power Electronics conference APEC-2007, In Press.
NEW
128
Prof. S. Ben-Yaakov , Control Design of PWM Converters [255]
Time domain Discrete Controller Design
• Plant transfer function (continuous): A(s)
• S to Z transformation: A(s) -> A(z)
• Defining the desired closed loop response: ACL(s)
• S to Z transformation: ACL(s) -> ACL(z)
• Ideal controller:
( ) ( ) ( )( ) ( )
( ) ( )( ) ( )zAzA
zAzB
zBzA1
zBzAzA
CL
CLCL
1
1 −=→
+=
Prof. S. Ben-Yaakov , Control Design of PWM Converters [256]
Closed-loop response
oo 90m45 <<ϕ
1Qω
s
ω
s
n2
n
2++
1
2nd order system Design constraint:
System will have the characteristic equation
129
Prof. S. Ben-Yaakov , Control Design of PWM Converters [257]
Describing the closed-loop response by time domain characteristics
( )( )
1Qω
s
ω
s
1
sd
sV
n2
n
2o
++
=
2nd order system
( )
( )π
Mln2
π
Mln1
QeM
t
1.8ω
ω
1.8t
p
2p
24Q
11
2Q
π
p
rn
nr
+
−=⇒=
≈⇒≈
−−
Rise time:
Overshoot
0 5 10 15 20 25 30 350
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6Step Response
Time (sec)
Prof. S. Ben-Yaakov , Control Design of PWM Converters [258]
Describing the desired ACL in Z
212
0
212
0
n2
n
2 azaza
bzbzb
1Qω
s
ω
s ++
++→
++
Z
• Second order characteristic equation sets the ACL(z)
denominator (a0, a1, a2)
• To derive the complete ACL equation (i. e. numerator) additional constraints are to be satisfied: