A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of LA-2791 0.6 Cover Sheet 1 63 Tuesday, February 07, 2006 Compal Electronics, Inc. 2006-01-20 COMPAL P/N : PCB NO : COMPAL CONFIDENTIAL MODEL NAME : HAL00 Travis (UMA) Schematics Document uFCPGA Mobile Yonah Intel Calistoga + ICH7M REV : 1.0 (DELL: A00) DELL CONFIDENTIAL/PROPRIETARY PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-2791 PCB P/N: DA800002L1L BOM NO. 45135631L01 45135631L01 Part Number Description DAA0000040L PCB ZJX LA-2791 REV0 M/B UMA MB PCB
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Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Cover Sheet
1 63Tuesday, February 07, 2006
Compal Electronics, Inc.
2006-01-20
COMPAL P/N :PCB NO :
COMPAL CONFIDENTIALMODEL NAME : HAL00
Travis (UMA) Schematics DocumentuFCPGA Mobile YonahIntel Calistoga + ICH7M
REV : 1.0 (DELL: A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-2791
PCB P/N: DA800002L1L BOM NO. 45135631L01
45135631L01
Part Number Description
DAA0000040L PCB ZJX LA-2791 REV0 M/B UMA
MB PCB
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3 3
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Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Block Diagram
2 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Clock GeneratoruFCPGA CPU
INTEL
DMI
H_D#(0..63)H_A#(3..31)
Compal confidentialModel : HAL00
Pentium-M
Block Diagram
Azalia Codec
Power On/OffSW & LED
System Bus
INTEL
Memory BUS(DDR2)
FSB 533/667 MHz
+1.5V_RUN 100MHz
+1.8V_SUS 533 / 667MHz
ATA100
MDC
1466pin BGA
SLG84450VTR
STAC9200
Azalia I/F
Calistoga
ICH7-M
LVDS
RJ11D Moudle+5VMOD
+VDDA
+3.3V_RUN
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8DDRII-DIMM X2
+0.9V_DDR_VTT
+1.8V_SUS
Cable
+3.3V_SUS
478pin
DC/DC Interface
CPU ITP Port
LVDS CONNon M/B Board
FAN1_VOUT Yonah-2M
SATA
+3.3V_RUN
VCORE (IMVP-6)
1.5V/1.05V
CHARGER
1.8V/0.9V
BATT IN
DC IN
3V/5V/15V
GUARDIAN IIEMC4000
Thermal
+3.3V_SUS
FAN
S-HDD+5VHDD
Power Sequence
DELL CONFIDENTIAL/PROPRIETARY
652pin BGA
page 7,8,9
page 18
page 18
page6page 7
page 10,11,12,13,14,15
page 19
page 21,22,23,24
page 47
page 25 page 25 page 26
page 33
page 48
page 49
page 50
page 44
page 45
page 46
page 42
page 43
page 41
page 16,17
CRT CONNpage 20
LPC BUS+3VRUN33MHz
SMSC SIO
+3VALW
ECE5018page 38
HUB USB[1]
HUB USB[2]
BATT SELECTpage 51
RGB
page 19DVODVI Bridge
SI1362DVI
RGB
TV
HUB USB[3]
DOCKINGBUFFER
PAGE 35
DOCKINGPORT
PAGE 36 page 30
PCI BUS
CardBusOZ601 TQFP
+3.3V_RUN 33MHz
IDSEL:AD17(PIRQC,D#,GNT#1,REQ#1)
+3VRUN
Mini Card2WLAN
+3.3V_RUN
Mini Card 1
PCI Express BUS
+1.5VRUN+1.5VRUN page 28,29
GIGA Enthernet
+3VLAN
RJ45
+3.3V_RUN/ +1.5V_RUN 100MHz
BCM5752WWANpage 34page 34
USB Ports X2
Bluetooth
HUB USB[4]
Smart Card+3.3V_RUN page 31
OZ77C6
IO/B
SLOT
48MHz
+5V_SUS
USB[5,6]
HUB USB[2]USB[0]
HUB USB[1]USB[7]
USB[2]
USB Ports X2+5V_SUS page 32
HUB USB[3]
USB[3,4] SIDE
REAR
+3.3V_RUN
page 39
page 37COM
+3.3V_ALWST M25P80
+3.3V_ALW
+RTC_CELLMEC5004
page 39
SPI
Stick
page 40
Int.KBD &Stick
page 33+5V_RUN
Touch Pad
AMP & INT.Speaker
HeadPhone &MIC Jack
+5V_SUS +3.3V_RUNpage 27 page 27
INT MIC+5V_SUS
USB0 on the top of connector,USB2 on the bottom
USB[1]
page 33
SPI
+5V_RUN
+5VRUN
USB4 on right side ofconnector, USB6 on left side
IO/BIO/B
+1.05V_VCCP (1.05V)
+VCC_CORE
+1.5V_RUN
+1.8V_SUS
+1.05V_VCCP (1.05V)
+3.3V_RUN
+2.5V_RUN
+1.05V_VCCP
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+1.5V_RUN
+1.05V_VCCP
+3.3V_RUN page 37FIR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Index and Config.
3 63Tuesday, February 07, 2006
Compal Electronics, Inc.
PIRQ
C
PM TABLE
ON
ON
AD17
OFF
PCI DEVICE
CARD BUS
IDSEL
S0
TABLE
1
PCI
ON
ON
S3
ON
OFF
ON
OFF
S1
S5 S4/AC don't exist
+VCC_CORE
REQ#/GNT#
ON
powerplane
S5 S4/AC
ON
ON
State
OFFOFF
OFF
+3.3V_RUN_R
Tolerance0.1U_0402_6.3VXX
Ceramic Capacitors :
Temperature CharacteristicsRated VoltagePackage SizeValue
CH
A
Capacitor Spec Guide:
1
SL
CODE
COG SJ
9
B
+-3%
CODE
Symbol F
+40,-20%+-20%
4
G
+20,-10%
X
UK
5
B
Z
C
+-0.05PF
Y5V
Temperature Characteristics:
Y5P
CK
V
+-0.1PF
X5R
A
Z5U
BJ
+100,-0%
Y5U X7R
P
+-30%
C
SH
8
H
CJ
+30,-10%
K
+-5%
7
Q
+80,-20%
6
+-0.5PF +-1PF
Z5V
+-10%
J
+-0.25PF
Tolerance:
+-2%
N
D
Z5P
2
UJ
D E F G
H I J
30Symbol
X6SNPO
K
X5S
M
ValuePackage SizeRated VoltageToleranceLow ESR Mark : 45 m ohm
10U_D2_10VX_R45
Tantalum or Polymer Capacitors :+0.9V_DDR_VTT
@XX : Depop component
NOTE1:DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+1.5V_RUN
+3.3V_SRC
+2.5V_RUN+1.05V_VCCP
+3.3V_SUS+5V_SUS+5V_ALW +1.8V_RUN
+5V_RUN+3.3V_RUN
+3.3V_ALW+1.8V_SUS
+15V_SUS
1
2
USB HUB DESTINATION
4
3
PC Card Bay
Mini 1(WWAN)
Mini 2(WLAN)
Smart Card --> BIO
3,4
TABLEUSB
0
1
7
USB PORT# DESTINATION
5,6 REAR
2
USB Hub (5018)
Docking
SIDE Blue tooth
D Moudle
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Power Rail
4 63Tuesday, February 07, 2006
Compal Electronics, Inc.
BATTERY
+PWR_SRC
ADAPTER
SU
S_O
N
RU
N_O
N
AUD
IO_A
VD
D_O
N
(Opt
ion)
+2.5V_RUN
MAX8734
EMC4000
RU
N_O
N
L47
793475
FDS4435 +INV_PWR_SRCRUN_ON
SI4800
SI3456
SI3456
HD
DC
_EN
#
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_SUS
2N7002
2N7002
+3.3V_RUN
2.2K 2.2K 2.2K 2.2K
CLK_SCLK
CLK_SDATA
+3.3V_ALW
10K 10K
SMBUS Address [A0]
SMBUS Address [A2]
195
195
197
197
B22
C22
17
16
5
6
7
8
SMBUS Address [D2]
SMBUS Address [2F]
+3.3V_ALW
8.2K8.2K
100
100
SMBUS Address [16]
SMBUS Address [12]
3
4
9
10
8
7
WWANSMBUS Address [TBD]
3032
WLAN
3032
SMBUS Address [TBD]
SBAT_SMBDAT111
112
+3.3V_ALW
+3.3V_ALW
2'ndBATTERY
SMBUS Address [58]5
6
3
4
SBAT_SMBCLKInverter INV
4.7K 4.7K
8.2K 8.2K
SMBUS Address [C4, 72, 70, 48]+3.3V_ALW10
+3.3V_ALW
DOCKING9 DOCK_SMB_DAT
39
40
100
100
SMBUS Address [16]
5752MLOM
C8C7
SMBUS Address [C8]
DOCK_SMB_CLK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_ITP#
CLK_CPU_ITP
CLK_CPU_ITP#
CPU_ITP
H_STP_CPU#
H_STP_PCI#
DOT96_SSC
DOT96_SSC#
CLK_MCH_BCLK#MCH_BCLK#
CPU_BCLK
CLK_CPU_BCLK#CPU_BCLK#
CLK_CPU_BCLK
+CK_VDD_A
+CK_VDD_MAIN
CLK_XTAL_IN
FSC
DREF_SSCLK#
DREF_SSCLK
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_ITP#
CLK_CPU_ITP
CLK_PCIE_LOM#
CLK_PCIE_LOM
DREFCLK#
DREFCLK
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_ICH#
CLK_PCIE_ICH
ICH_SMBDATA
ICH_SMBCLK
CLK_SDATA
CLK_SCLK
FSB
FSC
CLKREFCLK_ICH_14MCLK_SIO_14M
DREFCLK# DOT96#
DOT96DREFCLK
CLK_ENABLE#
CLKIREF
CLK_SDATA
CLK_SCLK
FCTSEL1
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
CLK_MCH_BCLKMCH_BCLK
PCIE_MINI2
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
PCIE_MINI2#
CLK_PCI_ICH PCI_ICH
CLK_SMC_48M
CLK_ICH_48M FSA
FCTSEL1
CLK_PCI_LOM PCI_LOM
DOCKPCI_33MCLK_DOCKPCI_33M
CLK_PCI_PCM PCI_PCM
CLK_PCI_5018
CLK_PCI_5004
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
MCH_3GPLL#
MCH_3GPLL
PCIE_SATA
PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_LOMPCIE_LOM
CLK_PCIE_LOM#PCIE_LOM#
PCIE_ICH
PCIE_ICH#
CLK_PCIE_ICH
CLK_PCIE_ICH#
FSB
PCIE_MINI1
PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#+CK_VDD_REF
+CK_VDD_48
+CK_VDD_48+CK_VDD_A +CK_VDD_REF
CLK_XTAL_OUT
FSA
+CK_VDD_MAIN
+CK_VDD_MAIN2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
H_STP_CPU# 23
H_STP_PCI# 23
CLK_MCH_BCLK# 10
CLK_MCH_BCLK 10
CLK_CPU_BCLK# 7
CLK_CPU_BCLK 7
DREF_SSCLK 10
DREF_SSCLK# 10
CLK_CPU_ITP 7
CLK_CPU_ITP# 7
MCH_CLKSEL2 10 MCH_CLKSEL1 10
CPU_BSEL28 CPU_BSEL18
ICH_SMBCLK23,28,34
ICH_SMBDATA23,28,34 CLK_SDATA 16,17
CLK_SCLK 16,17
CLK_ICH_14M23CLK_SIO_14M38
DREFCLK10
DREFCLK#10
CLK_PCIE_MINI2 34
CLK_PCIE_MINI2# 34
CLK_PCI_ICH21
CLK_SMC_48M31
CLK_ICH_48M23
CLK_PCI_LOM28
CLK_DOCKPCI_33M36
CLK_PCI_PCM30
CLK_PCI_501838
CLK_PCI_500439
CLK_MCH_3GPLL 10
CLK_MCH_3GPLL# 10
CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22
CLK_PCIE_LOM 28
CLK_PCIE_LOM# 28
CLK_PCIE_ICH# 23
CLK_PCIE_ICH 23
CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34
MINI1CLK_REQ# 34
SATA_CLKREQ# 23
CLK_3GPLLREQ# 10
LOM_CLKREQ# 28
CLK_ENABLE#49
MINI2CLK_REQ# 34
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Clock Generator
6 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Place crystal within500 mils of CK410
31
G S
2N7002
2
D
Table : ICS954305AK
1
*
CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU
MHzSRCMHz
PCIMHz
266
133
200
166
333
100
400
100
100
100
100
100
100
100
33.3
33.3
33.3
33.3
33.3
33.3
33.3
0 0 0
00
0
0
0
00
0
0
1
1
1 1
1
1
1
1 1
1
1
CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)
133
166
0
0
0
1
Place near each pinW>40 mil
Place near CK410+
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Reserve
FCTSEL1 PIN43 PIN44 PIN47 PIN48
0
1
DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
*
NOTE: Place Decoupling as close as physically possilble to the VDD pins
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
This shall place near CPU
Pop R1378 required byIntel for B0 Yonah. Backward compatible forA0 and A1 Yonah
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.
R_B
R_A
Layout close CPU PIN AD26
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these insidesocket cavity on L8(North sideSecondary)
Place these insidesocket cavity on L8(Sorth sideSecondary)
Place these insidesocket cavity on L8(North sidePrimary)
Place these insidesocket cavity on L8(Sorth sidePrimary)
South Side Secondary
Place these insidesocket cavity on L8(North sideSecondary)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Low = NormalOperation (Default):Lane number in Order
00 = Reserved01 = XOR Mode Enabled10 = All Z Mode Enabled11 = Normal Operation
High = Reverse Lane
Low = 1.05V (Default)
High = 1.5V
High = Enabled
Low = Disabled
Low = Reverse LaneCFG9
High = Normal Operation *
(DMI Lane Reversal)
SDVO_CTRLDATALow = No SDVO Device Present
High = SDVO Device Present
(Default)
(Default)*
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Strap Pin Table
LVREF for Alviso N.C for Calistoga to GND
CFG20
(PCIE/SDVO select)High = PCIE/SDVO are operatingsimu.
Route +2.5VRUN from GMCH pinG41 todecoupling cap (C345)<200mil to the edge.
W=30 mils
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRTDAC: Route caps within250mil of Alviso. Route FBwithin 3" of Calistoga
Route VSSACRTDAC gnd from GMCH todecoupling cap ground lead and thenconnect to the gnd plane.
Route VSSA_TVBG GND from GMCH todecoupling cap ground lead and thenconnect to the GND plane.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Compal Electronics, Inc.Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
RESERVEDIMMA
Layout Note:Place near JDIM1
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place near JDIM2
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
DIMMBSTANDARD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SMBUS ADDRESS : 2FPlace cap close to theGuardian pins as possible.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
M'07 inverter support - Depop D2.D'05 inverter support - Populate D2
M'07 inverter support - Populate R520,R1767 Depop U7.D'05 inverter support - Populate U7, Depop R520,R1767
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
K1
Evaluate Package
A2
A1 K2
DA204U
C14
120.
01U
_040
2_16
V7K~
D
1
2
C141010P_0402_50V8J~D@
1
2
JCRT
SUYIN_070915FR015S201CU~D
611
17
1228
1339
144
1015
5
1617
C141110P_0402_50V8J~D@
1
2
D2005SDM10U45-7_SOD523-2~D
2 1
L81BLM18AG121SN1D_0603~D
1 2
T46 PAD~D
U191SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
C14130.1U_0402_16V4Z~D
1
2
C14
06
22P
_040
2_50
V8J~
D
@
1
2
R13
9715
0_04
02_1
%~D
12
R1230_0402_5%~D
1 2R1405
39_0402_5%~D
1 2
D31DA204U_SOT323~D@
2 31
C14
1422
P_0
402_
50V8
J~D
1
2
R14
001K
_040
2_5%
~D@
1
2
R13
9815
0_04
02_1
%~D
12
L78BLM18BB600SN1D_0603~D
1 2
D30DA204U_SOT323~D@
2 31
L79BLM18BB600SN1D_0603~D
1 2
D29DA204U_SOT323~D@
2 31
R13
991K
_040
2_5%
~D@
12
C140910P_0402_50V8J~D@
1
2
D32SDM10U45-7_SOD523-2~D
21
R14
012.
2K_0
402_
5%~D
12
U190
SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
R14022.2K_0402_5%~D
12
R13
9615
0_04
02_1
%~D
12
R14031K_0402_5%~D 1 2
L80BLM18BB600SN1D_0603~D
1 2
C14
07
22P
_040
2_50
V8J~
D
@
1
2
C14
1522
P_0
402_
50V8
J~D
1
2
L82BLM18AG121SN1D_0603~D
1 2
R1020_0402_5%~D
1 2R1404
39_0402_5%~D
1 2
C14
08
22P
_040
2_50
V8J~
D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_SERR#
PCI_DEVSEL#PCI_PCIRST#
PCI_C_BE0#
PCI_REQ4#
PCI_PERR#
PCI_GNT4#
PCI_GNT1#
ICH_GPIO4_PIRQG#PCI_PIRQB#
PCI_REQ5#
PCI_STOP#
PCI_C_BE1#
PCI_C_BE3#
ICH_GPIO3_PIRQF#PCI_PIRQC#
PCI_REQ2#
ICH_GPIO2_PIRQE#
PCI_FRAME#
PCI_REQ3#
PCI_PLOCK#
PCI_IRDY#
PCI_C_BE2#
PCI_REQ1#
PCI_REQ0#
PCI_PIRQD#
PCI_PIRQA#
PCI_PAR
PCI_TRDY#
ICH_GPIO5_PIRQH#
PCI_PCIRST#PCI_RST#
PCI_PLTRST#CLK_PCI_ICHICH_PME#
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PCI_IRDY#
PCI_PLOCK#
PCI_SERR#
PCI_PERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
ICH_GPIO5_PIRQH#
ICH_GPIO4_PIRQG#
ICH_GPIO3_PIRQF#
ICH_GPIO2_PIRQE#
PCI_REQ0#
PCI_REQ2#
PCI_REQ3#
PCI_REQ4#
PCI_REQ5#
PCI_REQ1#PCI_GNT5#
PCI_GNT5#
PCI_GNT4#
PCI_GNT0#
PLTRST2#
PCI_PLTRST#PLTRST#
CLK_PCI_ICH
+3.3V_RUN_R
+3.3V_RUN_R +3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
PCI_C_BE1# 30,35
PCI_SERR# 35
PCI_PAR 30,35PCI_IRDY# 30,35,36
PCI_PERR# 30,35
PCI_GNT1# 30
PCI_PIRQC#30
PCI_C_BE3# 30,35
PCI_FRAME# 30,35,36
PCI_REQ1# 30
PCI_C_BE2# 30,35
PCI_DEVSEL# 30,35
PCI_TRDY# 30,35
PCI_C_BE0# 30,35
PCI_STOP# 30,35
PCI_AD[0..31]30,35
CLK_PCI_ICH 6ICH_PME# 38
PCI_RST# 30,31,35
MCH_ICH_SYNC# 10
PCI_PIRQA#35
PCI_REQ0# 36
PCI_PLOCK# 35
PCI_GNT0# 35,36
PLTRST# 10,23,28,34,52
PLTRST2# 38,39
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
ICH7(1/4)
21 63Tuesday, February 07, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+VDDA=4.75V
Close to U10.20
Close to U10.5
W=30 mil
Close to U10.3
STAC9200 Rev.
CA1
B1
R22 R109
5.11K 10K
39.2K 20K
Close to U10.18
TRACE>15 mil
45
2
single gate TTL
31
From SIO
Default POP the LDO U22When U22 is popped, no pop L47.
Note:U28,R496,R162,C529 place as close as U19
C49
80.
1U_0
402_
16V4
Z~D
1
2
G
D
SQ442N7002W-7-F_SOT323~D
2
13
R49610K_0402_5%~D
1 2
C179
0.1U_0402_16V4Z~D
1 2
C48
61U
_060
3_10
V4Z~
D
1
2
C49
20.
047U
_040
2_16
V4Z~
D
1
2
C17
61U
_060
3_10
V4Z~
D
1
2
C18
2610
U_0
805_
10V4
Z~D
1
2
C16
90.
1U_0
402_
16V4
Z~D
1
2
R36122_0402_5%~D @
12
C18
11U
_060
3_10
V4Z~
D
1
2
R160 33_0402_5%~D
1 2
C48
72.
2U_0
603_
6.3V
6K~D
1
2
R22
39.2
K_0
402_
1%~D
12
R17685.1K_0402 _1%~D
12
R89 2.2K_0402_5%~D
1 2
R109
20K_0402_1%~D
12
C18
250.
1U_0
402_
16V4
Z~D
1
2
C189 0.1U_0402_16V4Z~D 1 2
C36222P_0402_50V8J~D@
1
2
C1780 1000P_0402_50V7K~D
1 2
STAC9200
U10
STAC9200X5NAEB1XR_QFN32~D
SDATA_OUT2
BIT_CLK3
SYNC7
RESET#8
SPDIF _OUT32
CAP220
VREF_OUT19
VREF_IN18
AVD
D26
AVSS
117
AVSS
229
SPDIF _ IN/EAPD /GPIO331
SENSE_A 9
SDATA_IN5
LINE_IN_L 15
LINE_IN_R 16
CD_L 10
CD_R 12
HP_L 27
HP_R 28
LOUT_L 23
LOUT_R 24
MONO_OUT 25
DVD
D6
DVS
S4
GPIO021
GPIO122
GPIO230
MIC1 13
MIC2 14
NC11NC211
PAD
_GN
D33
R1622.2K_0402_5%~D
12
U22
TPS793475DBVRG4_SOT23-5~D
OUT 5
BYPASS 4
GND2
EN3
IN1
C1781 1000P_0402_50V7K~D
1 2
C50
02.
2U_0
603_
6.3V
6K~D
1
2
R48847_0402_5%~D@
12
C51
00.
1U_0
402_
16V4
Z~D
1
2
C49
11U
_060
3_10
V4Z~
D
1
2
L47
BLM18AG601SN1D_0603~D
@ 1 2
U28
SN74AHCT1G86DCKR_SC70-5~D
A1
B2 Y 4
P5
G3
C50
50.
047U
_040
2_16
V4Z~
D
1
2
C50
60.
1U_0
402_
16V4
Z~D
1
2
C49522P_0402_50V8J~D@
1
2
C5390.1U_0402_16V4Z~D
1
2
G
D
S Q542N7002W-7-F_SOT323~D
2
13
C5290.1U_0402_16V4Z~D
1 2
C52
30.
1U_0
402_
16V4
Z~D
1
2
R480_0402_5%~D
@
1 2
R96 2.2K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_GAIN0
AUD_GAIN1
HP_NB_SENSE
C1P
C1N
HP_SPK_L1
PVSS
HP_SPK_R1
INT_SPK_R2
+5VAMPVCC
BYPASS
PC_BEEP
RIN-
AUD_GAIN0
AUD_GAIN1
INT_SPK_R1
INT_SPK_R2
HP_SPK_R2
AUD_LINE_IN_L
HP_SPK_R1
HP_SPK_L1 HP_SPK_L2
MIC_L1
MIC_R1 MIC_R2
MIC_L2MIC_BIAS
INT_MIC+
INT_MIC-
MIC_BIAS
INT_SPK_R1
AUD_LINE_IN_R
SPK_SHUTDOWN#
+5VAMPVCC
+3.3V_RUN
+5V_SUS +5VAMPVCC
+3VRUN_4411
+3.3V_RUN
VREFOUT
+3.3V_RUN
+VDDA
+VDDA
+VDDA
+VDDA
+3.3V_RUN
HP_OUT_L26
HP_OUT_R26
AUD_LINE_OUT26
HP_NB_SENSE26,38
MIC_SWITCH26
NB_MICIN_R26
NB_MICIN_L26
INT_MIC 26INT_MIC+32
INT_MIC-32
PC_BEEP26
NB_MUTE38 EAPD26
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
AMP and PHONE JACK
27 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Gain Setting
GAIN0 INPUTAV(inv)GAIN1
21.6dB
15.6dB
6dB
1
0
10dB
25K ohm
45K ohm
70K ohm
90K ohm
IMPEDANCE
11
0
0
0
*
1
Speaker Connector
15 mils trace
W=40mils
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NOTE: SPEAKER TRACE WIDTHSHOULD BE MINIMUM 10 MILS
C56
510
00P_
0402
_50V
7K~D
@
1
2C48510U_0805_10V4Z~D
1
2
C53
60.
047U
_040
2_16
V4Z~
D
1
2
C1132.2U_0603_6.3V6K~D
1
2
R1784100K_0402_5%~D
1 2
C17
9347
P_0
402_
50V8
J~D
1
2
R1775100K_0402_5%~D
12
L16BLM18AG121SN1D_0603~D
12
R17811K_0402_5%~D
12
R17
7610
0K_0
402_
5%~D
12
R17
714.
7K_0
402_
5%~D
12
C56
610
00P_
0402
_50V
7K~D
@
1
2
U19
TPA6017A2PWP_TSSOP20~D
GN
D4
1G
ND
311
GN
D2
13G
ND
120
VDD
16PV
DD
115
RIN-17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+7
LIN-5
LIN+9
GAIN0 2
GAIN1 3
PVD
D2
6
SHUTDOWN19
PAD_GND 21
R17831K_0402_5%~D
12
R1711K_0402_5%~D@
12
C17752.2U_0603_6.3V6K~D
1 2
L17BLM18AG121SN1D_0603~D
12
C537
0.47U_0402_16V4Z~D
1
2
L108BLM18AG121SN1D_0603~D
12
L45
BLM21PG600SN1D_0805~D
1 2
R1779100K_0402_5%~D
1 2
L52BLM18AG601SN1D_0603~D
1 2
G
D
S
Q112N7002W-7-F_SOT323~D@2
13
C29
347
P_0
402_
50V8
J~D
1
2
C1794
2.2U_0603_6.3V6K~D
1 2
C199
0.022U_0402_16V7K~D
12
G
D
S Q432N7002W-7-F_SOT323~D
2
13
C1792
0.047U_0402_16V4Z~D
12
JAUDIO
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
R17
6910
0K_0
402_
5%~D
12
R1641K_0402_5%~D
12
R132100K_0402_5%~D
12
C49
347
P_0
402_
50V8
J~D
1
2
R17801K_0402_5%~D
12
C1471U_0603_10V4Z~D
1 2
R17704.99_0402_1%~D
12
R21404.99_0402_1%~D
12
R1701K_0402_5%~D @
12
C15
310
0P_0
402_
50V8
J~D
1
2
C1142.2U_0603_6.3V6K~D
1
2
R17
7420
K_04
02_1
%~D
12
R177810K_0402_5%~D
1 2
R17
724.
7K_0
402_
5%~D
12
C148 1U_0603_10V4Z~D
1 2
C10
9
100P
_040
2_50
V8J~
D
1
2
C4940.1U_0402_16V4Z~D
1
2
R156
100K_0402_5%~D
12
C1795
1U_0603_10V4Z~D
1 2
R17821K_0402_5%~D
12
C17962.2U_0603_6.3V6K~D
1
2
C18002.2U_0603_6.3V6K~D
12
U9BLM358DR2G_SOIC8~D
P8
IN+ 5
IN- 6G4
O7
C5020.1U_0402_16V4Z~D
1
2
C50
147
P_0
402_
50V8
J~D
1
2
C1791
0.047U_0402_16V4Z~D
12
C17990.1U_0402_16V4Z~D
1 2
C17980.1U_0402_16V4Z~D
1 2
U5
MAX4411ETP+_TQFN20~D
C1P1
PGN
D2
C1N3
NC-4 4
PVss
5
NC-6 6
SVss
7
NC-8 8
OUTL 9
SVD
D10
INR15
SHDNR#14
INL13
NC-12 12
OUTR 11
NC-20 20
PVD
D19
SHDNL#18
SGN
D17
NC-16 16
JSPK
MOLEX_53398-0271~D
1122
C5341U_0603_10V4Z~D
1
2
JMIC
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
L15BLM18AG121SN1D_0603~D
12
R17
7320
K_04
02_1
%~D
12
C1462.2U_0603_6.3V6K~D
1
2
R1651K_0402_5%~D
12
U9ALM358DR2G_SOIC8~D
P8
IN+3
IN-2 G4
O 1
C18012.2U_0603_6.3V6K~D
12
R177710K_0402_5%~D
1 2
C17
710
0P_0
402_
50V8
J~D
1
2
C10
810
0P_0
402_
50V8
J~D
1
2
C17970.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_LOM
CLK_PCIE_LOM#
LAN_TX3+
PLTRST#
LAN_TX3-
LOM_CS#
LOM_SI
LPC_LAD1
LAN_ACT#
XTALI
PCIE_IRX_LOMTX_P3_C
LPC_LAD0
LOM_SO
IRQ_SERIRQ
LAN_TX1-
LAN_TX2+
LPC_LFRAME#
PCIE_IRX_LOMTX_N3_C
REGCTL_PNP25
REGCTL_PNP12
LOM_SCLK
LAN_TX0-
LAN_TX1+
XTALO
LPC_LAD3
REGCTL_PNP12
CLK_PCIE_LOM
LINK_100#
LAN_TX2-
PCIE_WAKE#
LINK_10#
LAN_TX0+
PLTRST#
LPC_LAD2
CLK_PCI_LOM
LOM_SI
LOM_CS#
LOM_SCLKLOM_SO
LOM_CABLE_DETECT
TPM_GPIO1TPM_GPIO2
TPM_GPIO0
LOM_CLKREQ#
REGCTL_PNP25
+3VLAN
+3.3V_SRC
+2.5VLAN
PCIE_PLLVDD
XTALVDD
AVDD
+3VLAN
+1.2VLAN
GPHY_PLLVDDAVDDL
GPHY_PLLVDD
PCIE_PLLVDD
PCIE_SDS_VDD
+1.2VLAN
BIASVDD
XTALVDD
+2.5VLAN
AVDD
+2.5VLAN
+1.2VLAN
+3VLAN
+3VLAN
+3VLAN
+2.5VLAN
AVDDL
PCIE_SDS_VDD
BIASVDD
+1.2VLAN
+1.2VLAN
+3VLAN
+3VLAN
+3.3V_RUN_R
+3VLAN
+3VLAN
+3VLAN
+2.5VLAN
+3VLAN
PCIE_WAKE# 34,38CLK_PCIE_LOM# 6CLK_PCIE_LOM 6
LAN_TX3- 29
LAN_TX1- 29
LAN_TX3+ 29
LAN_TX2- 29LAN_TX1+ 29
LAN_TX0- 29LAN_TX0+ 29
ENAB_3VLAN41
PCIE_IRX_LOMTX_P3 23
PCIE_ITX_LOMRX_N3_C 23
PCIE_IRX_LOMTX_N3 23
PCIE_ITX_LOMRX_P3_C 23
LAN_TX2+ 29
LAN_ACT#29
LINK_10#29LINK_100#29
CLK_PCI_LOM6
ICH_SMBCLK6,23,34ICH_SMBDATA6,23,34
PLTRST# 10,21,23,34,52
LPC_LFRAME#22,38,39
IRQ_SERIRQ23,30,38,39PLTRST#10,21,23,34,52
LPC_LAD[0..3]22,38,39
LOM_CABLE_DETECT38
LAN_TPM_EN#38
LAN_LOW_PWR 38
LAN_LOW_PWR38
LOM_CLKREQ#6
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
BCM5751M
28 63Tuesday, February 07, 2006
1C4
MMJT9435
B
C2
3
E
Layout Notice : 1.2V filter. Place as closechip as possible.
Layout Notice : Place as closechip as possible.
Layout Notice : No highspeed signal should berouted near RDAC or onadjacent layer to RDAC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Notice : Place bead asclose PI3L500 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Layout Notice : Placetermination as close asASIC as possible
22K TO 47K PULL-UP & PULL-DOWN RESISTORS AREREQUIRED TO BE CONNECTED TO PINS 123 & 124 TO
THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.
IDSEL SELECT POWER-ON-STRAPPING(SEE NOTE & TABLE FOR OPTIONS)
NOTE: IDSEL SELECTION!THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME.IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREEPCI AD LINES OR EXTERNAL IDSEL SIGNAL.
SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS.
CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWSFOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLYCONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUSTBE CONNECTED TO VPP_PGM TO CREATE VPP_VCC.
22K TO 47K PULL-UPS MUST BE PLACEDON INTA#, PME#, SERIRQ# & CLKRUN#.
NOTE:
EXTERNAL IDSEL AND WITHOUT 12V VPP SUPPORT.THIS PAGE SHOWS THE OZ601B CONFIGURED WITH
VCC5# VPP_PGM IDSEL SELECT (124) (123)
UP UP PIN 127
DOWN DOWN AD18
DOWN UP AD20
UP DOWN AD25
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB SMARTCARD READER.
& USB SMARTCARDS ARE SUPPORTED.TYPE A (5V), B (3V), AB (5V/3V)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
COIN RTC Battery
For EMI
U26D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
U26C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R4711K_0402_5%~D
12
R1383100K_0402_5%~D
12
C1814
0.047U_0402_25V4Z~D
@1 2
R4630_0402_5%~D
1 2
C1811
0.047U_0402_25V4Z~D
@1 2
R31
30_
0402
_5%
~D
12
R31
90_
0402
_5%
~D
12
C5281U_0603_10V4Z~D
1
2
C4800.1U_0402_16V4Z~D 1 2
C1809
0.047U_0402_16V4Z~D
@1 2
U24C
74LVC3G14DC_VSSOP8~D
P8
A3 Y 5
G4
U24B
74LVC3G14DC_VSSOP8~D
P8
A6 Y 2
G4C520
0.01U_0402_16V7K~D
1
2
C18160.1U_0402_16V4Z~D
1
2
C1812
0.047U_0402_25V4Z~D
@1 2
U26A74VHC08MTCX_NL_TSSOP14~DIN11
IN22 OUT 3
P14
G7
R453100K_0402_5%~D
12
R49420K_0402_5%~D
12
U26B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
C1806
0.047U_0402_16V4Z~D
@1 2
G
D
S
Q72N7002W-7-F_SOT323~D
2
13
C1815
0.047U_0402_25V4Z~D
@1 2
G
D
S
Q412N7002W-7-F_SOT323~D
2
13
R138610K_0402_5%~D
12
U24A
74LVC3G14DC_VSSOP8~D
P8
A1 Y 7
G4
C1808
0.047U_0402_16V4Z~D
@1 2
C1813
0.047U_0402_16V4Z~D
@1 2
JCOIN
MOLEX_53398-0271~D
1122
C1810
0.047U_0402_25V4Z~D
@1 2
D15BAT54CW_SOT323~D
32
1
R49
0_04
02_5
%~D
12
C1807
0.047U_0402_16V4Z~D
@1 2
C4830.1U_0402_16V4Z~D 1 2
R33
40_
0402
_5%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT_GREEN_LED
BREATH_LED_B
BAT1_LED#
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
BAT2_LED#
BATT_AMBER_LED
BREATH_GREEN_LED
SNIFFER_WIRELESS_ON/OFF#
SNIFFER_GREEN#
R_BT_ACT
SNIFFER_YELLOW#
SNIFFER_G
SNIFFER_Y
SNIFFER#
BT_ACTIVE
SATA_ACT# SATA_ACT#_R
R_MPCI_ACT
+3.3V_ALW
+3.3V_SUS
+3.3V_RUN_R
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+5V_RUN
+3.3V_SUS
+3.3V_RUN_R +3.3V_RUN_R
+3.3V_ALW
BREATH_LED39
BAT1_LED#39
SCRL_LED#39
CAP_LED#39
NUM_LED#39
LED_WLAN_OUT#34
BAT2_LED#39
BATT_GREEN_LED 32
BATT_AMBER_LED 32
R_MPCI_ACT 32
SNIFFER_WIRELESS_ON/OFF#38
SNIFFER#39
BREATH_GREEN_LED 32
R_SCRL_LED# 40
R_NUM_LED# 40
R_CAP_LED# 40
SNIFFER_GREEN#18
R_BT_ACT 32
SNIFFER_YELLOW#18
BT_ACTIVE34,40
R_PIDEACT 36
R_SATA_ACT 32
SNIFFER_LED_OFF#39
SATA_ACT#22
SNIFFER_LED_OFF#39
Title
Size Document Number R ev
Date: Sheet o fLA-2791 0.6
PAD and Standoff
43 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Fiducial Mark
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI CLIP
Disable HDD LED
FD11
FIDUCIAL MARK~D
1
R2
330_0402_5%~D
1 2
CLIP6EMI_CLIP
@
GND1
H31@H_C24D24N
1H8
@H_T217B315D98
1
FD8
FIDUCIAL MARK~D
1H19
@H_C217D91
1
FD12
FIDUCIAL MARK~D
1H16@H_T217B315D98
1
R265
330_0402_5%~D
1 2
FD1
FIDUCIAL MARK~D
1
R14480_0402_5%~D @
1 2
EB
CQ3MMST3904-7-F_SOT323~D
2
31
FD15
FIDUCIAL MARK~D
1
Q1DDTA114EUA-7-F_SOT323~D
2
13
H15@H_C315D118
1
H14@H_T315B237D118
1
H20@H_T217B315D98
1
R19 220_0402_5%~D
1 2
H30@H_O115X31D115X31N
1
JSNIFF
1BS008-13130-002-7F_4P~D
11
22
33
44
R237330_0402_5%~D
12
FD5
FIDUCIAL MARK~D
1
C
BE
Q65PMST3906_SOT323-3~D 1
2
3
H6@H_C236B256D110
1
Q18DDTA114EUA-7-F_SOT323~D
2
13
H10@H_C315D110
1
H2H_T146B217D91
1
R144510K_0402_5%~D@
12
H9@H_C315D110
1
R21330_0402_5%~D
12
FD14
FIDUCIAL MARK~D
1
Q35DDTA114EUA-7-F_SOT323~D
2
13
H28@H_O115X31D115X31N
1
Q13DDTA114EUA-7-F_SOT323~D
2
13
FD3
FIDUCIAL MARK~D
1
CLIP2EMI_CLIP
@
GND1
H29@H_O115X31D115X31N
1
H4H_T256B63D47
1
FD13
FIDUCIAL MARK~D
1
H32@H_C24D24N
1
H5@H_C315D110
1
R20 220_0402_5%~D
1 2
G
D
SQ4BSS138W-7-F_SOT323~D
2
13
CLIP3EMI_CLIP
@
GND1
H26@H_C472D376
1
H12@H_C315D118
1
Q2DDTA114EUA-7-F_SOT323~D
2
13
R5610K_0402_5%~D
12
H1H_T146B217D91
1
R143410K_0402_5%~D
1 2
H7@H_C315D110
1
R5
220_0402_5%~D
1 2
FD18
FIDUCIAL MARK~D
1
CLIP4EMI_CLIP
@
GND 1
R81K_0402_5%~D 1 2
R15
100_0402_5%~D
1 2
H18@H_C217D91
1 FD17
FIDUCIAL MARK~D
1
FD2
FIDUCIAL MARK~D
1
Y
G
D4
12-22AUYSYGC/530-A2/TR8_G/Y~D
3
21
FD7
FIDUCIAL MARK~D
1
Q5DDTA114EUA-7-F_SOT323~D
21
3
FD6
FIDUCIAL MARK~D
1
R7610K_0402_5%~D
12
H3@H_C315D110
1
H11@H_T315B237D118
1
FD4
FIDUCIAL MARK~D
1
Q16DDTA114EUA-7-F_SOT323~D
2
13
R231330_0402_5%~D
12
R310K_0402_5%~D
1 2
H17@H_T217B315D98
1
H27@H_C472D431X376
1
R1
56_0402_5%~D
1 2
H13@H_C315D118
1
FD9
FIDUCIAL MARK~D
1
FD16
FIDUCIAL MARK~D
1
CLIP1EMI_CLIP
@
GND 1
FD19
FIDUCIAL MARK~D
1
G
DS
Q66BSS138W-7-F_SOT323~D
2
13
FD10
FIDUCIAL MARK~D
1
CLIP5EMI_CLIP
@
GND 1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+ADP_DCIN
DOCK_DC_IN
PS_ID_IN
PWR_ID
PS_ID_IN
+3.3V_ALW+5V_ALW
+5V_ALW
+DC_IN
+PWR_SRC+3.3VX
+5V_ALW
PS_ID 39
PS_ID_DISABLE# 39
PS_ID_IN36
DOCK_DC_IN36
Title
Size Document Number R ev
Date: Sheet o f
0.6
+DCIN
44 63Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
OCP point is from 8.2A to 10.5A OCP point is from 8A to 11.2A
DELL CONFIDENTIAL/PROPRIETARY
Place these CAPsclose to FETs
DC/DC +3V/ +5V/ +15VPlace these CAPsclose to FETs
LA-2792
PR
270_
1206
_5%
~D
12
PQ78SI4800BDY-T1_SO8~D
365 7 8
2
4
1
PC280.1U_0603_25V7K~D
12
PR
510_
0402
_5%
~D 12
PD
35M
MB
Z524
5B_S
OT2
3~D
1
2 3
PC
300.
1U_0
402_
10V
7K~D
12
PC
344.
7U_1
206_
10V
7K~D
12
PC
2522
00P
_040
2_50
V7K~
D
12
PQ77SI4800BDY-T1_SO8~D
36 578
2
4
1
PC2510.1U_0603_25V7K~D
12
PR203100_0805_5%~D
1 2
PR480_0402_5%~D
@
12
PR
349
0_04
02_5
%~D 1
2
PJP4
PAD-OPEN 4x4m
1 2
+
PC
2933
0U_D
3L_6
.3V
_R25
~D
1
2
PR3530_0402_5%~D
@
12
PC
204.
7U_1
206_
25V
6K~D
@
12
PC
1610
U_1
206_
25V
6M~D
1
2
PR290_0603_5%~D
1 2
PQ5SI4810BDY_SO8~D
36 578
2
4
1
PR491K_0402_1%~D
1 2
PC
210.
1U_0
603_
25V
7K~D
12
PC
156
2.2U
_120
6_25
V7M
~D
12
PC
320.
1U_0
402_
10V
7K~D
12
PC270.1U_0603_25V7K~D
1 2
PC
180.
1U_0
603_
25V
7K~D
12
+
PC
3133
0U_D
3L_6
.3V
_R25
~D
1
2
PU17TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
PR3540_0402_5%~D
12
PD
14R
B71
7F_S
OT3
23~D
2 31
PR
4424
3K_0
402_
1%~D
12
PR
4210
0K_0
402_
1%~D
12
PR
347
100K
_040
2_1%
~D
@ 12
PR2847_0603_5%~D
12
PQ6SI4810BDY_SO8~D
365 7 8
2
4
1
PC
268
10U
_120
6_25
V6M
~D
@
1
2
PR3550_0603_5%~D
@
12
+
PC
244
330U
_D3L
_6.3
V_R
25~D
@
1
2
+
PC
252
100U
_25V
_M
1
2
PR3560_0603_5%~D
@
12
S
GD
PQ82
FDC655BN_NL_SSOT-6~D
3
6 24
5 1
PC
241U
_060
3_10
V6K
~D
12
PJP25
PAD-OPEN 4x4m
1 2
PC
1710
U_1
206_
25V
6M~D
1
2
PL22FBM-L11-453215-900LMAT_1812~D
1 2
PC
231U
_060
3_10
V6K
~D
12
PD
13E
C11
FS2_
SO
D10
6~D
21
+
PC
245
330U
_D3L
_6.3
V_R
25~D
@
1
2
PR
3812
.7K
_040
2_1%
~D
12
PL84.7U_STQB125A-4722_8A_30%~D
14
32
PR3430_0402_5%~D@
12
PC
224.
7U_1
206_
25V
6K~D
12
PR
3745
.3K
_040
2_1%
~D
12
G
D
S PQ80RHU002N06_SOT323
@
2
13
PR412K_0402_1%~D
1 2
PR460_0402_5%~D
12
PC
3610
00P
_040
2_50
V7K~
D
@
12
PC
260.
1U_0
603_
25V
7K~D
12
PC
152.
2U_1
206_
25V
7M~D
12
PC
331U
_060
3_10
V6K
~D
12
PR
4724
0K_0
402_
5%~D
12
PR3450_0402_5%~D
12
PR3440_0402_5%~D
@12
PJP5
PAD-OPEN 4x4m
1 2
PC
1922
00P
_040
2_50
V7K~
D
12
PR322.2_0603_5%~D
1 2
PR500_0402_5%~D
@
12
PJP6
PAD-OPEN 4x4m
1 2
PL94.7U_SPC-1205P-4R7B_+40-20%~D
1 2
PU3
MAX8734AEEI_QSOP28~D
SHDN6
BST328
DH326
LX327
DL324
OUT322
LX5 15
DL5 19
FB5 9PRO 10
ILIM5 11ILIM3 5REF 8
V+20
VCC17
LDO5 18
BST5 14
DH5 16
OUT5 21N.C. 1
TON 13GND 23
SK
IP12
LDO325
FB37
ON33ON54
PGOOD 2
PR
188
453K
_040
2_1%
~D
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+1.5VRUNP_L +VCCP_1P05VP_L
+1.5V_RUNP +1.5V_RUN
+5V_SUS
+1.5V_RUNP +VCCP_1P05VP
+PWR_SRC +DC2_PWR_SRC
+VCCP_1P05VP +1.05V_VCCP
RUN_ON19,37,39,41,42,46,48
1.05V_RUN_PWRGD 42
RUN_ON 19,37,39,41,42,46,48
1.5V_RUN_PWRGD42
Title
Size Document Number Rev
Date: Sheet o f
0.6
+1.5VSUSP /+VCCP_1P05VP
47 63Tuesday, February 07, 2006
Compal Electronics, Inc.
+1.5VRUNP / +VCCP_1P05VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Max current:5A Peak current:10A Typical:8A
OCP=7.08~11.96AOCP=14.23~18.39A
LA-2792
PQ83
FDS
6670
AS
_SO
8~D
36 578
2
4
1
PC
208
10U
_080
5_6.
3V5K
~D
@
12
PL263.8uH_SIL104-3R8_6A_30%~D
1 2
PR22528.7K_0603_1%~D
12
PC2101000P_0402_50V7K~D
@ 12
PR
281
0_04
02_5
%~D
@12
PR2800_0402_5%~D
12PR279
0_0402_5%~D
12
PJP21
PAD-OPEN 4x4m
1 2
PL25FBM-L11-453215-900LMAT_1812~D 1 2
PC
160
10U
_120
6_25
V6M
~D
1
2
PC
170
0.01
U_0
402_
25V7
K~D
12
PC
165
2.2U
_080
5_10
V6K~
D
12
PJP19
PAD-OPEN 4x4m
1 2
PQ38
FDS
8880
_SO
8~D
365 7 8
2
4
1
PC
205
1U_0
603_
10V6
K~D
12
PQ40
FDS
6670
AS
_SO
8~D
365 7 8
2
4
1
PD
37R
B75
1V_S
OD
323~
D
21
PR2820_0402_5%~D
@
12
PC
166
0.1U
_060
3_25
V7K~
D
12
PJP20
PAD-OPEN 4x4m
1 2
PQ8
FDS
8880
_SO
8~D
36 578
2
4
1
PR21610_0805_5%~D
12
PR2721K_0402_1%~D
12
PR
226
30.1
K_0
603_
1%~D
12
PC
263
2200
P_04
02_5
0V7K
~D
12
PC
261
0.01
U_0
402_
25V7
K~D
12
PL271.5uH_SIL104-1R5_10A_30%~D
1 2
PR2191.43K_0402_1%~D
1 2
PC
164
0.1U
_060
3_25
V7K~
D
12
PC
265
100P
_040
2_50
V8K
@
12
PC
211
1000
P_04
02_5
0V7K
~D
@
12
PR277
0_0603_5%~D
12
PR2271K_0402_1%~D
12
PJP23
PAD-OPEN 4x4m
1 2
PC
207
10U
_080
5_6.
3V5K
~D
@
12
ISL6227CA-T
PU9
ISL6227CA-T_SSOP28~D
GND 1
LGATE1 2
PGND1 3
PHASE1 4
UGATE1 5
BOOT1 6
ISEN1 7
EN1 8
VOUT1 9VSEN1 10
OCSET1 11
SOFT1 12
DDR 13VIN 14
PG1 15PG2/REF16
SOFT217
OCSET218
VSEN219VOUT220
EN221
ISEN222
BOOT223
UGATE224
PHASE225
PGND226
LGATE227
VCC28
PC
169
0.01
U_0
402_
25V7
K~D
12
PC
264
100P
_040
2_50
V8K
@
12
PC
262
2200
P_04
02_5
0V7K
~D
12P
C16
10.
1U_0
603_
25V7
K~D
12
PC
167
0.1U
_060
3_25
V7K~
D
12
+
PC
206
330U
_D2E
_2.5
VM_R
9~D
1
2PR
221
19.6
K_04
02_1
%~D
12
PC
159
10U
_120
6_25
V6M
~D
1
2
PR2780_0603_5%~D
12
PR
222
5.11
K_0
402_
1%~D
12
PR2202.1K_0402_1%~D
1 2
PC
162
10U
_120
6_25
V6M
~D
1
2
PR223124K_0402_1%
1 2
PC1730.01U_0402_25V7K~D
1 2
+
PC
168
330U
_D2E
_2.5
VM_R
9~D
1
2
PR224124K_0402_1%
1 2
PC1720.01U_0402_25V7K~D
1 2
PC
163
10U
_120
6_25
V6M
~D
1
2
PD
36
RB
751V
_SO
D32
3~D
21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VSUSP_L
88550_AVDD
88550_AVDD
+1.8V_SUSP
+1.8V_SUSP
+1.8V_SUSP
+5V_SUS
+1.8V_SUS
+PWR_SRC
+0.9V_DDR_VTTP
+3.3V_SUS
+1.8V_SUSP
+0.9V_DDR_VTTP +0.9V_DDR_VTT
+DDR_PWR_SRC
+3.3V_RUN
SUSPWROK_1P8V 42
SUSPWROK_5V 46
RUN_ON 19,37,39,41,42,46,47
0.9V_DDR_PWRGD 42
V_DDR_MCH_REF 10,16,17
Title
Size Document Number R ev
Date: Sheet o f
0.6
48 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Design current 8A for +1.8V_SUSPPeak current 10.1A for +1.8VSUSP
DELL CONFIDENTIAL/PROPRIETARY
+1.8VSUSP/ +0.9V_DDR_VT
Design current 1.05A for +0.9V_DDR_VTTPPeak current 1.5A for +0.9V_DDR_VTTP
OCP point is 12.7A for +1.8VSUSP
+1.8VSUSP/ +0.9V_DDR_VTTDDR2 Termination
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PR193, PD20 are only used with the second-source MAX8632.
LA-2792
PJP10PAD-OPEN 4x4m1 2
PC
157
10U
_080
5_6.
3V6M
~D
1
2
PJP11
PAD-OPEN 4x4m
1 2
PQ
34IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PC
154
10U
_080
5_6.
3V6M
~D
1
2
PR193
10_1206_5%~D
@12
PC
624.
7U_1
206_
10V
7K~D
12
PR3480_0402_5%~D
1 2
PL24FBM-L11-453215-900LMAT_1812~D
1 2
PC
720.
1U_0
402_
10V
7K~D
12
PC
570.
1U_0
603_
25V
7K~D
12
PR2120_0402_5%~D
12
PQ
11IR
F783
2_S
O8~
D
36 578
2
4
1
PC
5822
00P
_040
2_50
V7K~
D
12P
C55
10U
_120
6_25
V6M
~D
1
2
PC661000P_0402_50V7K~D
12
+
PC
7133
0U_D
2E_2
.5V
M~D
1
2
PC1550.22U_0402_6.3V 5K~D
12
PR840_0402_5%~D @
12
PC641U_0603_10V6K~D
12
PC
5610
U_1
206_
25V
6M~D
1
2
PJP32PAD-OPEN 4x4m1 2
PC770.1U_0402_10V7K~D
12
PC
153
10U
_080
5_6.
3V6M
~D
1
2
PR2130_0402_5%~D
12
PC680.22U_0603_10V7K~D
1 2
PL141.4UH_HMU1350-1R4PF_15A_20%~D
1 2
3
PR20248.7K_0402_1%~D
12
PC
631U
_060
3_10
V6K
~D
12
PD
20R
B75
1V-4
0_S
OD
323~
D
@
21
PR
194
100K
_040
2_1%
~D
12
PC
740.
1U_0
402_
10V
7K~D
12
PR
195
100K
_040
2_1%
~D
@ 12
PR
200
100K
_040
2_1%
~D
12
PR20420_0603_1%~D
12
PU6
ISL88550A_TQFN28~D
SK
IP25
VD
D22
PGND123
LX19
AV
DD
26
REF3
TON1
OV
P/ U
VP
2
SS
8
GN
D24
POK1 5
POK2 6
VTT 12
STBY 7
TP0
28
VOUT16 REFIN 14
FB15
VTTR 10
ILIM
4
PGND2 11
DH18
DL21
VTTS 9
SHDN 27
VIN 17BST20
VTTI 13
GN
D29
+
PC
7033
0U_D
2E_2
.5V
M~D
1
2
PR73
1_0603_5%~D
12
PC14610U_0805_6.3V6M~D
1
2
PJP9PAD-OPEN 4x4m1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
VSUM
VSUM
VSUM
VO
VO
VSUM
VO
VO
PHASE1
PHASE2
PHASE3
+PWR_SRC
+VCC_CORE
+CPU_PWR_SRC
+CPU_PWR_SRC
+VCC_CORE
+5V_RUN
+5V_RUN
+CPU_PWR_SRC
+5V_RUN
+3.3V_RUN
+CPU_PWR_SRC
+5V_RUN
+VCC_CORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
VID08VID18VID28
VID48VID38
VID58VID68
H_DPRSTP#7,22
DPRSLPVR23
H_PSI#8
RUNPWROK38,39,42
RUNPWROK38,39,42
VSSSENSE8
VCCSENSE8
IMVP_PWRGD 23,42
IMVP6_PROCHOT#38
CLK_ENABLE#6
Title
Size Document Number R ev
Date: Sheet o f
0.6
+VCORE
49 63Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
LA-2792
PR
266
15K
_040
2_1%
~D
12
PR2490_0402_5%~D
@ 12
PR26011.5K_0402_1%~D
12
PR25982.5K_0402_1%~D
12
PC
193
10U
_120
6_25
V6M
~D
1
2
PR
290
0_06
03_5
%~D
12
PR33010K_0402_1%~D
1 2
PR2450_0402_5%~D
12
PC1870.01U_0402_16V7K~D
12
PR23010K_0402_1%~D
1 2
PC
270
10U
_120
6_25
V6M
~D
@
1
2
PR2440_0402_5%~D
12
PH1
470KB_0402_5%_NCP15WM474J03RB~D
@12
PC
228
2200
P_0
402_
50V7
K~D
12
PU10
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC
271
10U
_120
6_25
V6M
~D
@
1
2
PC
249
0.1U
_060
3_25
V7K
~D
12
PQ
61FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PC
272
10U
_120
6_25
V6M
~D
@
1
2
PC
175
4.7U
_120
6_25
V6K
~D
12
PQ
42IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PU16
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR2341.91K_0603_1%~D
12
PC
224
2200
P_0
402_
50V7
K~D
12
PC201
330P_0402_50V7K~D
12
PC
223
0.1U
_060
3_25
V7K
~D
12
PC
194
4.7U
_120
6_25
V6K
~D
12
PR238147K_0402_1%~D
12
PC
215
0.06
8U_0
402_
10V
7K~D
1
2
PQ
56FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PR2290_0603_5%~D
12
PC2501500P_0402_50V7K~D
1 2
PR2707.68K_0805_1%~D
12
PR2540_0402_5%~D
12
PC
241
1U_0
603_
10V
6K~D
12
PR2530_0402_5%~D
12
PC213
1000P_0402_50V7K~D
12
PC
227
0.1U
_060
3_25
V7K
~D
12
PR3280_0603_5%~D
12
PR3317.68K_0805_1%~D
12PR372
0_0402_5%~D
12
PH
2
6.8K
B_0
603_
5%_E
RTJ
1VR
682J
~D
12
PR2620_0603_5%~D
12
PR2390_0402_5%~D
12
PC
177
10U
_120
6_25
V6M
~D
1
2
PR27110_0402_1%~D
12P
C22
90.
01U
_040
2_16
V7K
~D
1
2
PQ
57IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PC1790.22U_0603_10V7K~D
1 2
PC
260
0.1U
_060
3_25
V7K
~D
12
PR248
499_0402_1%~D
12
PR2646.34K_0402_1%~D
12
PC197
1000P_0402_50V7K~D
12
PR32910_0402_1%~D
12
PC2430.22U_0603_10V7K~D
12
PR26910K_0402_1%~D
1 2
PC
192
4.7U
_120
6_25
V6K
~D
12
PL28FBMA-L18-453215-900LMA90T_1812~D 1 2
PR2410_0402_5%~D
12
PC1980.22U_0603_10V7K~D
1 2PC190
680P_0402_50V7K~D
1 2
PC
240
2200
P_0
402_
50V7
K~D
12
PC2420.22U_0603_10V7K~D
1 2
PC
248
1500
P_0
805_
50V7
K
@
12
PJP30
PAD-OPEN 4x4m
1 2
PC
246
1500
P_0
805_
50V7
K
@
12
PR2840_0402_5%~D
@ 12
PR2870_0603_5%~D
12
PR
263
4.53
K_0
402_
1%~D
12
PR23210_0402_1%~D
12
PQ
60FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PL310.45UH_MPC1040LR45_27A_20%~D1
3
4
2
PU11
ISL6260CRZ-T_QFN40~D
VW8
PGD_IN2
PSI#1
DPRSLPVR36
DPRSTP#37
VID634 VID533
RTN13
FB10
COMP9
VS
S19
VDIFF11
DFB
15
VO
16
ISEN3 21
OCSET 7
PWM3 25
FCCM 24
CLK_EN#38
VR_TT#4
RBIAS3
NTC5
SOFT6
VID028VID129VID230VID331VID432
3V3
39
VSUM 17
VSEN12
VR_ON35
PWM1 27
ISEN2 22
ISEN1 23
PWM2 26
DR
OO
P14
VD
D20
VIN
18
PG
OO
D40
GND41
PC195220P_0402_50V8J~D
1 2
PR
233
10_0
603_
5%~D
12
PR2681K_0402_1%~D
12
PC
180
0.01
U_0
402_
25V
7K~D
12
PC214
1000P_0402_50V7K~D
12
PC
176
10U
_120
6_25
V6M
~D
1
2
PR2520_0402_5%~D
12
PR258
2.21K_0402_1%~D
12
PL330.45UH_MPC1040LR45_27A_20%~D
1
3
4
2
PC
182
1U_0
603_
10V
6K~D
12
PR2430_0402_5%~D
12
PC
178
1U_0
603_
10V
6K~D
12
PR22810_0603_5%~D
12
PC1810.22U_0603_10V7K~D
12
PC
196
1U_0
603_
10V
6K~D
12
PC
239
0.1U
_060
3_25
V7K
~D
12
PR
261
2.43
K_0
402_
1%~D
12
PR2400_0402_5%~D
12
PC2000.22U_0603_10V7K~D
12
PR2317.68K_0805_1%~D
12
PR2420_0402_5%~D
12
PU13
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC
191
0.33
U_0
603_
10V
7K
1
2
PR26710.5K_0402_1%
12
PR257
332_0402_1%~D
12
PQ
50IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PL290.45UH_MPC1040LR45_27A_20%~D
1
3
4
2
PJP31
PAD-OPEN 4x4m
1 2
PC
247
1500
P_0
805_
50V7
K
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8731_IINP
MAX8731_REF
LDO
LDO
+VCHGR_B +VCHGR_L
MAX8731_REF
MAX8731_IINP
+VCHGR
+DC_IN
+5V_ALW
CHAGER_SRC+SDC_IN
+5V_ALW +3.3V_ALW
+5V_ALW
+5V_ALW
+VCHGR
+5V_ALW
ACAV_IN18,39,51
PBAT_SMBCLK39,45
PBAT_SMBDAT39,45
BAT_SEL#39
ADAPT_OC 38
Title
Size Document Number Rev
Date: Sheet o f
0.6
Charger
50 63Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+DC_IN discharge path
Vin DetectorHigh 17.9 VLow 17.24 V
LA-2792
PC
266
0.01
U_0
603_
50V7
K~D
@
1
2
PQ75
SI4
800B
DY
-T1_
SO8~
D
@
365 7 8
2
4
1
PR3601_0603_1%~D 12
PR1450.01_2512_1%~D
4
2
1
3
PC
120
0.1U
_040
2_10
V7K~
D
12
PR14320K_0402_1%~D
12
PU8
MAX8731_TQFN28~D
DHI 24
CSIP 18
LX 23
FBSA 15
SDA9
IINP8
GN
D1
DCIN22
ACIN2
VDD11
SCL10
ACOK13
BATSEL14
BST 25
FBSB 16
CCS4
LDO 21
VCC 26
CSS
P28
CSIN 17
PGND 19
DLO 20
CCV6
CCI5
CSS
N27
REF3
DAC7
GND12
GND29
PC2041U_0603_10V6K~D
1 2
PR2750_0603_5%~D
1 2
PR
366
100K
_040
2_1%
~D 12
G
D
S PQ81RHU002N06_SOT323
2
13
PC
114
10U
_120
6_6.
3V7K
~D
1
2
PC
259
10P
_040
2_50
V8J~
D1
2
PR
364
27.4
K_04
02_1
%~D 1
2
PR
149
10K_
0402
_1%
~D1
2
PC
121
0.1U
_040
2_10
V7K~
D
12
PR
341
15.8
K_04
02_1
%~D
12
PC
255
100P
_040
2_50
V8K
12
PC
258
0.01
U_0
402_
25V7
K~D
12
PC
273
10U
_120
6_25
V6M
~D
@
1
2
PU19BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PC253220P_0402_50V7K~D
1
2
PC
254
0.01
U_0
402_
25V7
K~D
12
PR
362
301K
_040
2_1%
~D
12
PC
106
10U
_120
6_25
V6M
~D
1
2
PC
267
3300
PF_0
402_
50V7
K~D
12
PR335
0_0402_5%~D
1 2
PL19FBMA-L18-453215-900LMA90T_1812~D 1 2
PC
256
100P
_040
2_50
V8K
12
PQ79
IRF7
821_
SO
8~D
S1
S2
S3
G4
D8
D7
D6
D5
PR
367
100K
_040
2_5%
~D1
2
PC
113
10U
_120
6_6.
3V7K
~D
1
2
PR1380.01_2512_1%~D
4
2
1
3
PC
127
2200
P_04
02_5
0V7K
~D
12
PC110
0.01U_0402_25V7K~D
12
PR3360_0402_5%~D
12
PR342806K_0402_1%~D
12
PR373
1K_0603_1%~D
1 2
PU19ALM393DR_SO8~D
IN+3
IN-2O 1
P8
G4
PR
363
59K_
0402
_1%
~D
12
PC
203
0.1U
_060
3_25
V7K~
D
12
PR
148
4.7K
_040
2_5%
~D
12
PR3370_0402_5%~D
@
12
PC2210.1U_0402_10V7K~D
12
PC1021U_0805_25V4Z~D
12
PR3654.32M_0402_1%~D1 2
PC
257
100P
_040
2_50
V8K
12
PL205.6U_HMU1356-5R6_8.8A_20%~D
12
PC
128
0.1U
_060
3_25
V7K~
D
12
PQ76SI4810BDY_SO8~D
365 7 8
2
4
1
PC
103
2200
P_04
02_5
0V7K
~D
12
PC
119
0.01
U_0
402_
25V7
K~D
12
PC
105
10U
_120
6_25
V6M
~D
1
2
PC
118
0.01
U_0
402_
25V7
K~D
12P
R15
010
K_04
02_1
%~D
12
PC
112
0.1U
_060
3_25
V7K~
D
12
PR361
0_0402_5%~D
1 2
PC
122
1U_0
603_
10V6
K~D
12
1SS
355_
SOD
323~
DP
D54
21
PC2021U_0603_10V6K~D
1 2
PR27433_0603_1%~D
12
PC
9910
U_1
206_
25V6
M~D
1
2
PR142150K_0402_1%~D
12
PC
104
0.1U
_060
3_25
V7K~
D
12
PR368100_0402_5%~D
1 2
PC
212
0.01
U_0
402_
25V7
K~D
12
PD
40R
B75
1V_S
OD
323~
D
21
PR146
0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PBAT_G
CHG_PBAT_N
CHG_PBATT_N
CHG_SBATT_N
CHG_SBATT_NCHG_SBAT
SBAT_G
CHG_PBAT
CHG_SBAT_N
+SDC_IN
+VCHGR
+PWR_SRC
+VCHGR
+PWR_SRC
PBATT+
PBATT+
SBATT+
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
SBATT+
PBATT+
CHG_PBATT38
CHG_SBATT38
ACAV_IN18,39,50
SBAT_PRES#38,45
SBAT_LOW38
Title
Size Document Number Rev
Date: Sheet o f
0.6
Selector
51 63Tuesday, February 07, 2006
+DC_IN discharge path
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
LA-2792
PR
326
32.4
K_04
02_1
%~D
12
PD50
RB715F_SOT323
2
31
PQ72SI4835BDY_SO8~D
3 6
5
78
2
4
1
PR
318
33K_
0402
_5%
~D
12
PR310100K_0402_5%~D
12
PR31947K_0402_1%~D
1 2
PR32410K_0402_5%~D
1 2
PC
233
0.1U
_060
3_25
V7K~
D
12
PQ71SI4835BDY_SO8~D
36
5
78
2
4
1
PU15TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
G
D
S
PQ68RHU002N06_SOT323
2
13
G
D
SPQ74RHU002N06_SOT323
2
13
PR
311
33K_
0402
_5%
~D
12
PR30610K_0402_5%~D
12
PR
314
470K
_040
2_5%
~D
12
G
D
S
PQ63RHU002N06_SOT323
2
13
PR
317
10K_
0402
_5%
~D
12
G
D
S
PQ67RHU002N06_SOT323
2
13
PC
236
0.1U
_060
3_25
V7K~
D
@ 12
PU14ALM393DR_SO8~D
IN+3
IN-2 O 1
P8
G4
PR31210K_0402_5%~D
12
PR322100K_0402_5%~D
1 2
PC2340.1U_0603_25V7K~D
1 2
PR308100K_0402_5%~D@
12
PC
237
0.1U
_060
3_25
V7K~
D
12
PC2350.1U_0603_25V7K~D
1 2
PU14BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PD49B540C~D
2 1
PR30910K_0402_5%~D
12
PR325100K_0402_5%~D
1 2
PD47B540C~D
2 1
PD48
RB715F_SOT323
2
31
PR
305
10K_
0402
_5%
~D1
2
PR31647K_0402_1%~D
1 2
PQ62SI4835BDY_SO8~D
365
78
2
4
1
PR
320
470K
_040
2_5%
~D
12
PR313100K_0402_5%~D
12
PC
232
2200
P_04
02_5
0V7K
~D
12
PR
323
42.2
K_04
02_1
%~D
12
PR307100K_0402_5%~D
12
G
D
S
PQ64RHU002N06_SOT323
2
13
PD51
RB715F_SOT323
2
31
FDS4935_SO8~D
PQ65
G2 2D28
S1 3D15
S2 1D27
G1 4D16
PQ70SI4835BDY_SO8~D
365
78
2
4
1
G
D
S
PQ73RHU002N06_SOT323
2
13
PR
315
470K
_040
2_5%
~D
12
PR321147K_0402_1%~D
1 2
PQ69SI4835BDY_SO8~D
3 65
78
2
4
1
PQ66SI4835BDY_SO8~D
365
78
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDVOB_GREEN+
DVI_TX2+SDVOB_BLUE+
INT-
SDVOB_RED-
DVI_TX2-
+VSWINGDVI_SCLK
DVI_TX1-
DVI_TX0-
DVI_CLK+
SDVOB_BLUE-
DVI_TX1+
DVI_CLK-
SDVOB_GREEN-
DVI_TX0+
INT+
DVI_SDATA
SDVOB_RED+
SDVO_CTRLCLK
SDVO_CTRLDATA
DVI_TX2-
DVI_TX1+
DVI_TX1-
DVI_TX0+
DVI_TX0-
DVI_CLK+
DVI_CLK-
+VCC
+SPVCC
+SVCC
+PVCC1
+PVCC2
+AVCC
DVI_TX2+
+1.8V_RUN
+3.3V_RUN_R
+3.3V_RUN_R
+3.3V_RUN_R
+AVCC
+3.3V_RUN_R
+5V_RUN
+2.5V_RUN
+1.8V_RUN
SDVOB_BLUE+12
SDVOB_INT+12SDVOB_INT-12
SDVOB_RED+12SDVOB_RED-12
PLTRST#10,21,23,28,34
SDVOB_CLK+12
SDVOB_GREEN+12
SDVOB_CLK-12
SDVOB_GREEN-12
DVI_DETECT36
SDVOB_BLUE-12
SDVO_CTRLDATA 12SDVO_CTRLCLK 12
DVI_SDATA 36DVI_SCLK 36
DVI_TX2+ 36
DVI_TX2- 36
DVI_TX1+ 36
DVI_TX1- 36
DVI_TX0- 36
DVI_TX0+ 36
DVI_CLK- 36
DVI_CLK+ 36
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Internal LVDS
52 63Tuesday, February 07, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
A1 LOW: Address = 0x70
HIGH: Address = 0x72
C3001
10U_0805_10V4Z~D
1
2
C30
2510
U_0
805_
6.3V
6M~D
1
2
C30
3710
00P_
0402
_50V
7K~D
@
1
2
C3020
0.1U_0402_16V4Z~D
1
2
R30
012.
2K_0
402_
5%~D
12
C30
2310
0P_0
402_
50V8
J~D
@
1
2
R3018100_0402_5%~D
1 2
C30
160.
1U_0
402_
16V4
Z~D
1
2
C30
3010
U_0
805_
6.3V
6M~D
1
2
C30260.1U_0402_16V4Z~D
1
2
L3001BLM18PG181SN1_0603~D
12
C30220.1U_0402_16V4Z~D
12
C3027 0.1U_0402_16V4Z~D
1 2
R3015100_0402_5%~D
1 2
C3017
10U_0805_10V4Z~D
1
2
R30
134.
7K_0
402_
5%~D
12
R30
092.
2K_0
402_
5%~D
12
C30
3610
0P_0
402_
50V8
J~D
@
1
2
C30120.1U_0402_16V4Z~D
12
C30
310.
1U_0
402_
16V4
Z~D
1
2
R30101K_0402_5%~D
12
C3013
10U_0805_10V4Z~D
1
2
C3010
0.1U_0402_16V4Z~D
1
2
R30
144.
7K_0
402_
5%~D
12
C30140.1U_0402_16V4Z~D
12
U3001
SII1362ACTU_LQFP48~D
HTPLG29
PGN
D2
27
SDI+32SDI-33
EXT_RES35
SDADDC 9SCLDDC 8
SDSCL 5SDSDA 4
SDR+37SDR-38
SDG+40SDG-41
SDB+43SDB-44
SDC+46SDC-47
SPG
ND
3
RESET#2
PVC
C2
26
EXT_SWING25
PVC
C1
11
VCC
10VC
C34
AGN
D12
VCC
28
OVC
C1
AVC
C15
AVC
C21
SVC
C36
SVC
C42
SPVC
C48
GN
D7
TEST30
GN
D31
SGN
D39
SGN
D45
AGN
D18
AGN
D24
A1 6
TXC- 13TXC+ 14
TX0- 16TX0+ 17
TX1- 19TX1+ 20
TX2- 22TX2+ 23
L3006BLM18PG181SN1_0603~D
12
C3005
0.1U_0402_16V4Z~D
1
2
R3016100_0402_5%~D
1 2
C30
040.
1U_0
402_
16V4
Z~D
1
2
R3017100_0402_5%~D
1 2
C30
2410
0P_0
402_
50V8
J~D
@
1
2C
3039
1000
P_04
02_5
0V7K
~D
@
1
2
R3007 1K_0402_5%~D@ 1 2
L3003BLM18PG181SN1_0603~D
12
L3005BLM18PG181SN1_0603~D
12
C30
2910
0P_0
402_
50V8
J~D
@
1
2
L3004BLM18PG181SN1_0603~D
12
L3002BLM18PG181SN1_0603~D
12
C30
3810
00P_
0402
_50V
7K~D
@
1
2
C3011
0.1U_0402_16V4Z~D
1
2
C3019
0.1U_0402_16V4Z~D
1
2
C30
1510
U_0
805_
10V4
Z~D
1
2
C3028 0.1U_0402_16V4Z~D
1 2
C30
0310
U_0
805_
10V4
Z~D
1
2
R30081K_0402_5%~D
12
C30210.1U_0402_16V4Z~D
12
C3018
0.1U_0402_16V4Z~D
1
2
C30
3510
00P_
0402
_50V
7K~D
@
1
2
R3006 220_0402_5%~D
12
C3032
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 1
53 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 0.231 H/W 05/27 RogerSmart card pin definition not match thecage pin define
Change JSC pin connection, pin1 connect to GND, pin2 connect toSC_DET# ~ pin10 connect to +SC_PWR
2
05/27H/W403Remove power switch to save placementspacingRoger 0.2Remove SW1. Reseve R1793 pad for power switch
4 20 H/W 05/27 RogerDocking CRT HSYNC, VSYNC connect to theout put side of buffer
DOCK_HSYNC connect from U190 pin4 to docking connector pin 209,DOCK_VSYNC connect from U191 pin4 to docking connector pin 210 0.2
5 32 H/W 05/27 Roger Improve RJ45 center tap driving 0.2Connect +2.5VLAN to JIO pin 14 for RJ45 center tap
6 39 H/W 05/27 Roger SPI ROM pass through mode connect errorChange FDATAIN to ICHO_FDATAIN and connect from U216 pin 106 to U213pin5. Chagne FDATAOUT to ICHI_FDATAOUT and connect from U216 pin 108 toR1788 pin1
0.2
12,36 H/W 05/27 Roger Fix TV out issue Depop R23,R24,R25. And add R1790,R1791,R1792 75 ohms 0.2
7 Flash Recovery strapping issueRoger05/27H/W 0.2Change R474, R475 from 100K to 10K
8 H/W
39
05/30 Brike Change net from +3VALW to +3VSRCTo fix MEC5004 VCC1 power lading 0.2
43 05/30 Brike None Delete H21 and change H4 footprint from H_C176D122to H_C176D102 0.29 H/W
None12 0.2Will06/01H/W41 Add pullup to HDDC_EN# and MODC_EN#.
10 39 H/W 06/01 Will For delay MEC5004 internal 1.8V reg. Modified C1769 from 4.7UF to 22UF. 0.2
To improve rise time of serial DOfrom SPI ROM.11 0.2Will06/01H/W23 Modified R389 from 10K to 1K..
36 H/W 06/01 Will Fix Docking TV out issue. Modified R1790,R1791,R1792 from 75 ohms to 150Ohm. 0.213
39 H/W 06/01 Will None14 Change power on SPI ROM (pins 3 and 8) from +3VALW to +3VSUS. 0.2
3815 H/W 06/01 Will For GPIO control.Use ECE5018 GPIOC2 (pin 67), pin name MDC_RST_DIS#. Reservethis pin for MDC disable circuit. 0.2
16 12 H/W 06/01 Lester NoneRemove R34, R242, R37, R247, Q7, and Q33 to connect LDDC_CLK,LDDC_DATA directly to LVDS connector. 0.2
17 13 H/W 06/01 LesterIntel Checklist recommends a 1 nHferrite which calculates to 200 ohm. Change L34 to BLM18PG181SN1_0603. 0.2
19 39 H/W 06/01 Will Correct SPI connection for SMSC recommandICH7M.P5 connect to MEC 5004.107, MEC5004.108 connect to SPI ROM.5.ICH7M.P2 connect to MEC 5004.105, MEC5004.106 connect to SPI ROM.2 0.2
33 H/W21 06/02 Roger Add MDC disable circuit Add R1441, R1442, R1443, Q64. ECE5018 pin 67 program MDC_RST_DIS# 0.2
3422 H/W 06/06 Roger None 0.2Change U8 NNCD6.8RL-A to D5 NNCD5.6LG
23 3 H/W 06/06 Roger None
ALL
Fixed USB table 0.2
24 3 H/W 06/13 Roger None 0.3Add PJP22, PJP24 for +5VMOD and +5VHDD. Delete R506
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
54 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
25 0.313 H/W 06/14 Roger Follow Intel CRBD14 pin2 connect to +VCCP, pin1 connect to R320 pin1, R320 pin2 connectto +2.5VRUN. D18 pin2 connect to +1.5VRUN, pin2 connect to R12 pin1, R12pin2 connect to +3VRUN_R
26 27 H/W 06/14 RogerU10 (STAC9200) pin21 (GPIO0) is anlogpower plane Change R156 pull up from +3VSUS to +VDDA 0.3
27 7 0.3H/W 06/14 RogerChange ITP debug to XDP debug definitionfor Yonah CPU
Change R387, R417, R391, R436, R416, R415 to 56 ohms. Add R33 56 ohms.Change R424 to 1K ohms.
28 39 H/W 06/14 Roger For easier flash EC code Add short pad and change R475 to 1K ohms 0.3
4029 Change R1793 to a pad like CMOS padFor easier power switchRoger06/14H/W 0.3
30 34 Remove H22,H23,H24,H25. Add JCLIP1,JCLIP2ME change mini card stand off to LatchRoger06/14H/W 0.3
31 42 H/W 06/14 RogerEMI reqest add caps for the splite powerplane that PCI bus routed Add C1806,C1807,C1808,C1809,C1810,C1811 0.3
Roger06/16H/W4132Reserve discharg circuit for +5VRUN,+3VRUN,+1.8VRUN,+1.5VRUN,+0.9V_DDR_VTT,+2.5VRUNpower rails
45 34 H/W 06/28 Rossana 0.3Remove L18, R149, and R144 - direct connect USB to Wireless LAN cardRequest by Dell
46 34 H/W 06/28 Rossana Request by Dell 0.3Add R1603 connect to JMINI2 pin46, outgoing signal BT_ACTIVE
47 34 H/W 06/28 Rossana Gerber Gate List issue 0.3Add series 0-ohms R1609, R1610 for pins 3 and 5 of JMINI2
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Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
55 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.33448 Change C159 and C1785 from 10uF to 0.1uF06/28H/W Gerber Gate List issueRossana
49 34 H/W 06/28 Rossana Gerber Gate List issue Add T1 test point for JMINI1 pin 42 0.3
50 36 H/W 06/28 Rossana Gerber Gate List issue Add C1817~1820 for U180,U178,U179,U177 0.3
3951 Change R30 pull up from +3VSRC to +3VALWGerber Gate List issueRossana06/28H/W 0.3
52 43 06/28 RossanaChange sniffer switch type, the activedirection swap
WIRELESS_ON/OFF# connection from pin1 to pin 4 of JSNIFF, pin3 connectto GND, pin2 NC, pin 1 connect to SNIFFER#H/W 0.3
53 36 H/W 06/28 Rossana Gerber Gate List issue 0.3
Gerber Gate List issueRossana54 Add C1822 0.1uF_0402 and C1823,C1824 .47uF_0402 for QBUF power06/28H/W35 0.3
Add C1821 1000pF for +DOCK_PWR_SRC, add C1827 1000pF for DOCK_DC_IN
56 39 H/W 06/29 Scott Gerber Gate List issue 0.3Change L4 form MURATA BLM11A121S to BLM18PG181SN1
57 24 H/W 06/30 Scott Gerber Gate List issue Remove C375, C37 for ICH_V5REF_RUN, remove C420 for ICH_V5REF_SUS 0.3
Scott06/30H/W2458 0.3Add R37 0.5 ohm 0603 resistor connect to L42 pin1Gerber Gate List issue
Scott59 24 H/W 06/30 0.3Gerber Gate List issue Populate C347 and C442
Scott60 0.3Change C450 for 220uF to 330uF poly capGerber Gate List issue06/30H/W24
61 RogerMatch Dell JTPAD pinout definition, add C62, C63 for BIO power railbypass40 H/W 06/30 Match Dell JTPAD pinout definition 0.3
62 26,27 H/WR162 change from 8.2K to 2.2K, remove D33, D34, Change C1800, C1801from 1uF to 2.2uF, change C534 from 0.1uF to 1uF, del C533.06/30 Gerber Gate List issue 0.3Rossana
63 26 H/W 0.3HP_NB_SENSE move from GPIO2 to GPIO0 of U10, add series resistor 0 ohmfor this signal06/30 Rossana Gerber Gate List issue
64 7 H/W 07/07 Roger Support A1 Yanah CPU 0.3De-pop R513, R514 for A1 yanah CPU
65 7 H/W 08/01 Roger Gerber Gate List issue item 6 0.4Change Change R417 to 150 ohm, R415 to 51 ohm, R387 to 39.2 ohm, R436to 27.4 ohm, R391 to 680 ohm, R424 to 22.6 ohm
66 38 H/W 08/01 Roger Gerber Gate List issue item 8 Change R110 from 68 ohm to 75 ohm for H_PROCHOT# pull up 0.4
67 43 H/W 08/01 0.4Change the voltage rail on sniffer LED pull-ups (at Q13 and Q16) from+3VALW to +3VSUSRoger Gerber Gate List issue item 9
68 H/W 08/01 Roger 0.4Remove unnecessary capacitor C1805None7
69 H/W 08/01 Roger Hall switch design on touch pad moudle 0.4Depop U46 and C5440
70 H/W 08/01 Roger38 Gerber Gate List issue item 19 Move NB_MUTE from U215 pin 107 to pin73 0.4
71 16,17 H/W 08/01 Roger 0.4Remove R178, pop R177Gerber Gate List issue item 20,21
72 10,23 H/W 08/01 Roger 0.4Depop R253, populate R1799Gerber Gate List issue item 22,23
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Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
56 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.44273 Connect 2.5V_RUN_PWRGD net to LDO_POK pin. Add depop R4908/02H/W Gerber Gate List issue item3Roger
08/021874 Add R1800 31.6K ohm resistor for Vmargin circuit. 0.4Gerber Gate List issue item11RogerH/W
Change R389 from 1K to 10K75 23 H/W 0.408/02 Roger Gerber Gate List issue item5
76 33, 40 H/W Delete JBT and move components to JTAP. 0.408/04 Steven Conbine the BT and TP in 30 PIN connector.
83 12 Depop R357H/W 08/09 Roger 0.4Gerber Gate List issue item 28
84 28 H/W 0.4Add R53 4.7K resistor for LOM_SO pull down08/10 Roger Gerber Gate List issue item 30
85 28 H/W 08/10 0.4Connect BCM5752 pin C4 to ECE5018 pin75 net name LOM_CABLE_DETECT.Series no stuff resistor R55Roger Gerber Gate List issue item 33
86 38 H/W R1171 change pull up from +3VRUN to +3VSUS 0.408/10 Roger Gerber Gate List issue item 39
87 38 H/W 08/10 Roger 0.4Add a 4.7uF cap for ECE5018 VDDA33 couplingGerber Gate List issue item 42
Roger 0.4Add a 0 Ohm 0402 resistor R62 in series with the RTC_CELL and EMC5004pin 12188 39 H/W 08/10 Gerber Gate List issue item 43
0.4Roger R513, R514 pull up to +VCCP89 7 H/W 08/10 Follow Intel CRB circuit
0.4Add resistor R63 (0_0402_5%) between the BIA_PWM signal and MEC5004pin 7390 39 H/W Roger08/10 Gerber Gate List issue item 46
0.4Change ITP_DBRESET# connection from EMC5004 pin 55 to pin9691 39 H/W Roger08/10 Gerber Gate List issue item 47
92 22 H/W Roger 0.4Add no stuff C69 (0.1U_0402_16V4Z) between THRMTRIP_ICH# and GND08/10 Gerber Gate List issue item 50
93 41 H/W 08/10 Roger 0.4Change R1795 pin 1 connect from +1.8VRUN to +1.8VSUS for dischargeNone
94 23 H/W 08/10 Roger 0.4Move pull-up R388 to pin 1 side of R1787Gerber Gate List issue item 51
95 6 H/W 0.4Add C70 (0.1U_0402_16V4Z) for +CK_VDD_MAIN decoupling. Remove R290,R343, R329 to save spacing08/10 Roger Gerber Gate List issue item 29
96 7 H/W 0.4Remove R513 and R514 platform no longer use Yonah A0008/11 Roger Gerber Gate List issue item 68
97 42 H/W 08/11 Roger Gerber Gate List issue item 65 0.4Populate 0ohm for R49, R313, R319, R334
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Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
57 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
4198 Gerber Gate List issue item 67Roger08/11H/W 0.4Change R494 to 20K
799 Gerber Gate List issue item 69RogerH/W 08/11 0.4Add no stuff C71 and C72 for +VCCP of JITP
100 7 Roger Gerber Gate List issue item 7008/11H/W Change R416 and R33 from 56 ohm to 54.9 ohm 0.4
101 12 H/W 08/11 Roger 0.4Delete R333 to follow reference schematicsGerber Gate List issue item 72
102 28 H/W 08/11 Roger Gerber Gate List issue item 34 0.4Add R68 (20K_0402_5%) and R70 (39K_0402_1%) for LAN_LOW_PWR voltagedivider connect to pin K5
0.4103 26,27,38 H/W 08/12DOCK_HP_MUTE# for GPIO2 of codec connect to ECE5018 pin 81. EAPD forGPIO3 of codec connect to additional Q11 gate Roger Gerber Gate List issue item 75
104 38 H/W 08/15 Roger Gerber Gate List issue item 38 0.4Chnge SYS_PME# pull up from +3VRUN to +3VALW. Add no stuff R71 in series
105 38 H/W 08/15 Roger Gerber Gate List issue item 41 0.4Remove HP_NB_SENSE from ECE5018 pin 106 to pin 82
23106 Roger Gerber Gate List issue item 188,189 0.4H/W 08/15 Depop R428,Change value of R75 to 10k ohms
107 40 H/W Roger Gerber Gate List issue item 48 0.408/16 Change R1750 and R1751 to L1 and L2
108 28 H/W Roger Gerber Gate List issue item 213 0.408/16 Depop U188, R1366 and populate U3, R1267 for ST AT45BCM021B
109 39 H/W 08/16 Roger Gerber Gate List issue item 217 0.4Remove R166. Move R1635 for AFT_INT# move to page 39
110 39 H/W 08/16 Roger Add pull up for open drain out put 0.4Add R93 pull up to +3VALW for BAT_SEL#
110 38 H/W 08/16 RogerMute internal speaker when docking aduiojack plug in 0.4Add pull down resistor for DOCK_HP_MUTE#
111 Follow Dell CoE schematicsRoger09/07H/W06 0.5Change C329, C333 from 33pF to 27pF
112 43 H/W 09/14 0.4Change R8 from 3.3K to 1K ohmsRoger Blue tooth LED too bright
MEC5004 per SMSC recommendations to addcircuit for improving POR issue. 0.5
change board ID to X02Brike10/18H/W38120 0.5Pop R95, R419 and De-pop R108, R405.
BrikeGerber Gate List issue item 77. Add 10pFcap between GND and pin2 of L1/L2.121 40 H/W 10/18 Add C66, C73. 0.5
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Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
58 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
122 Change R75 pull-up to +3.3V_RUN.Gerber Gate List issue item 78. Pull upLAMP_STAT# to +3VRUNBrike10/18H/W23 0.5
123 6 H/W 10/19 BrikeGerber Gate List issue item 72. Inductordesign follow M07 design on L40,L32(Size:0805).
Change L32, L40 from 0603 to 0805. 0.5
124 23 H/W 10/19 BrikeGerber Gate List issue item 79.SATA_DET# is pull up to +3.3V_SUS. Change R784 pull up to +3.3V_SUS. 0.5
125 18 H/W 10/19 BrikeGerber Gate List issue item 74.MakeR1643 prior to bypass caps at +3VRUN.
Change R1643 prior to bypass caps " C152 and C517 " at +3VRUNpower rail . 0.5
126 9 H/W 10/20 Brike
Change the 32 high frequency decoupling caps, 0805 X5R, from 22uFto 10uF.Depop C354 and C618.Change C352, C496, C497, and C365 from 330uF/7mOhm to 330uF/6mOhm SP caps.
Gerber Gate List issue item 84 0.5
Connect PLTRST# instead of PLTRST_DELAY# to WLAN and WWAN connectors. 0.5Gerber Gate List issue item 82
Brike10/20H/W
127 34
128 23 H/W 10/20 Brike Add C79 0.1uF cap on IMVP_PWRGD to filter the glitchIMVP_PWRGD glitch issue 0.5
Q68 surge currentBrike10/21H/W Add R102 (0603) and C80 0.1uF cap Q68 pin1 for reduce surge current28 0.5129
Brike BT & HDD LED is on when the SNIFFER is turned on.
Added a circuit (FET and Resistors) to keep the BT LED & HDD LED off when the SNIFFER is turned on
0.5130 H/W
H/W131
10/21
10/21 Brike Depop R1440Gerber Gate List issue item 8138 0.5
40,43
0.534 H/W 10/22 Brike Add Intel WoWLAN Support Circuit132 Add pop components Q21 and R101, and un-pop componet R24.
18 H/W 10/24 0.5133 BrikeGerber Gate List issue item 89. ChangeOTP trip temperature to 88 deg C. Change R249 to 332K and R262 to 118K.
39 H/W 10/24 0.5134 BrikeGerber Gate List issue item 90. Pop SMSCworkround circuit for 11/7 build. Pop R101, R110, R112, R114, R117, Q20, Q19, C54, D2002.
39 H/W 10/24 0.5135 BrikeGerber Gate List issue item 91. Add a 0ohm pulldown resistor on TEST_PIN. Add R122 0Ohm resister.
43 H/W 10/24136 BrikeGerber Gate List issue item 111. Removeone of the pull-ups on SNIFFER_LED_OFF#. Remove Pull up resister R1447. 0.5
43 H/W137 10/24 Brike Gerber Gate List issue item 110. More R76 to pin 1 of Q66 and populate it. 0.5
10/24H/W34 0.5Add Intel WoWLAN Support Circuit Replace Q21 and R101 to D2003Brike138
20 H/W 10/24139 Brike Add resister R102 and R123. 0.5Gerber Gate List issue item 108. Add 39ohm resistors at output of U190 and U191.
18 H/W 10/24 0.5140 Brike
Gerber Gate List issue item 92. Addthermistor circuit to VCP2 (pin 40) ofEMC4000. Please route to 5V_CAL_SIO2#(pin 80, GPIO B4 on ECE5018).
141 43 H/W 10/24 BrikeGerber Gate List issue item 114.Modified SATA_ACT# LED sniffer disablecircuit.
Modified the circuit and Add and D2004. Chnage Q1 to 3904,R1449/1448 change to 10K and 1K. 0.5
142 40 H/W 10/25 BrikeGerber Gate List issue item 119. For fixthe IMVP_PWRGOOD glitch issue.
Change delay circuit R1764 from 200KOhm, C1788 to 470PF to +1.8V_runand +3V_run. 0.5
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 0.6
Changed-List History 2
59 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.538 H/W 10/25 BrikeModified the circuit Pull up R1449 to +5V_SUS and R1445 to +5V_run.R2 move to Q1 pin 3, SNIFFER_LED change to GPIO82.
Gerber Gate List issue item 104. Modifiedthe SATA_ACT# circuit. 143
0.5
0.5
20 H/W 10/25 Brike144 Add D2005 (RB751) in U190, U191 Pin 5.Gerber Gate List issue item 116. Adddiode HSYNC and VSYNC buffers.
146 19 H/W 10/26 Brike Add level shit circuit for BIA_PWM. Delete R520 and Add U8. 0.5
147 23 H/W 11/03 Brikethe delay circuit on +3.3V should get ridof the glitch Depop C82. 0.5
148 41 H/W 11/03 Brike Populate the HDD power switch circuit Pop Q51, R507, Q50 and Depop PJP24. 0.5
149 31 H/W 11/03 Brike For passing EMVCo test. Change R1424 from 220 to 330Ohm. 0.5
150 43 H/W 11/03 Brike SNIFFER_LED_OFF# is a push/pull signal. De-pop R1445. 0.5
151 27 H/W 11/03 Brike To improve audio quality Change C199 to 0.022uF and pop R164, depop R170. 0.5
152 39 H/W 11/11 Brike Change SMSC MEC5004 from version C to D.Change U216 P/N to D version. Depop R117, R114, R110, R101, R104,D2002, Q19, Q20, C54. And chnage C1769 value from 22UF to 4.7UF. 0.5
153 39 H/W 11/11 BrikeChange DOCK_SMB_CLK and DOCK_SMB_DAT forconsistent with other M07 platforms.
Change R99 and R100 resister from 100K to 8.2K Ohm. And R1618 change to10KOhm. 0.5
154 43 H/W 11/11 Brike For improve LED brightness issue.Change R2 value from 56Ohm to 330Ohm. And modified R15 from 150Ohm to100Ohm. 0.5
155 28 H/W 11/12 BrikeFor Q68 broken issue. Modified R120value for protect base pin. ChangeR120 from 0Ohm to 2KOhm. 0.5
156 20 H/W 11/12 BrikeFor Dell request change D32, D2005 toRB500. Change D32 and D2005 from RB751 to RB500 0.5
157 27 H/W 11/12 Brike For improve Audio THD+n performance. Change C113, C114 and C146 from 1UF to 2.2U. 0.5
158 27 H/W 11/27 Brike For adjust Audio gain to 15.6DB. Pop R170, De-pop R164. 0.5
159 42 H/W 12/06 Brike For improving SUSPWROK turn on issue. Modified Q7 to 2N7002. 0.6
160 52 H/W 12/06 Brike For solving DVI eye diagram issue.Change C3030, C3025 from 1uF to 10uF; R3006 to 220Ohm; R3015, R3016,R3017, R3018 to 100Ohm. 0.6
Change HDDC_EN#, MODC_EN# from ICH7 to ECE5018 Pin 106, 107 (GPIOH2/3),and Depop R2148, R2149. 0.6
162 7 H/W 12/06 Brike Add a De-pop resister for CPU test 1 PIN. Add De-pop resister R1387. 0.6
163 39 H/W 12/07 BrikeAdd an damping resister for improvingSPI_CS# overshoot issue. Add 47Ohm resister R127. 0.6
164 39 H/W 12/07 BrikeFor solving SBAT_SMBDAT rising time overspec issue. Change R444 to 4.7KOhm resister. 0.6
165 6 H/W 12/12 BrikeFor Gerber Gating list item 14 Depoppullup resistor on ICH_CLKREQ#. Depop resister R1761. 0.6
166
167
38 H/W 12/12 BrikeFor Gerber Gating list item 17 Updateboard ID to A00 Pop R405, depop R419. 0.6
31 H/W 12/12 BrikeFor Gerber Gating list item 11 add 47pFcapacitors to the USB_BIO+/- pins tofix bio sensor ESD issue.
0.6Add 2 capaciotr C83, C84 in USB_BIO+/-.
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 0.6
Changed-List History 2
60 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
41 H/W 12/14168 BrikeFor GPIOH[3:2] need, chnage pullupresister power plane to always. Change pullup resister R2148, R2149 for +3.3V_SUS to +3.3V_ALW. 0.6
169 41 H/W 12/15 BrikeFor Gerber Gating list item 18. Changepullup resister to 10K. Change pullup resister R2148, R2149 for 100K to 10KOhm. 0.6
170 18 H/W 12/15 BrikeFor Gerber Gating list item 1. Removepullup resister from 2.5V_RUN_PWRGD. Remove R116. 0.6
171 39 H/W 12/19 BrikeFor Gerber Gating list item 21. Add 0 ohmseries resistor to SPI_CS# at MEC5004. Add series resister R143 at MEC5004 side. 0.6
172 31 H/W 12/19 Brike For improving USB BIO sensor EMI issue. Add Pop L5, and depop resister R128, R137. 0.6
173 40 H/W 12/20 StevenFor DELL EMI request for add a 0.1uFcapacitor in JTPAD. Add 0.1uF capacitor C85. 0.6
174 28 H/W 12/30 StevenFor Q68 damage issue change form BCP69 toMBT35200 as ZRS solution. Use MBT35200 to replace Q68. Modified. 0.6
H/W7175 12/31 BrikeIntel Design Guide 1.0 to change H_RESETpull-up resister to 51Ohm. Change resister R416 to 51Ohm. 0.6
H/W176 39 01/04 BrikeFor enable MEC5004 BIOS write protectfunction. Pop R139 and de-pop R138. 0.6
27177 DePop R170, pop R164.For adjust Audio gain to 21.6 DB.Benson01/07H/W 0.6
178 28For Q68 issue to reserve soft startcircuit. Change R120 to 0Ohm, and depop C80.H/W 01/09 Brike 0.6
20 H/W 01/20For fixing issue with projector usinglong cable.179
Change R102,R123 from 39 ohm to 0 ohm0.6Brike
19 H/W 01/20 Change R235 from 200K ohm to 100K ohmFor stronger the VGS driving in Battery Mode
184 H/W 01/20 Steven31
22182 H/W 01/20 The Negative Resistance too low Change X1 spec from CL=20pF to 6 pF and C38,C40 from 12pF to 2.2pF
None Depop L5 ,pop R128,R137 33 ohm
181 6 H/W 01/20 The Drive Level too high Change R32 from 0 ohm to 470 ohm
180
01/20The Frequency too high & Drive Level too high38183
Change Y1 spec from CL=20pF to 12pF and C1451,C1452 from 22P to 15PH/W
Brike
Brike
Brike
Brike
0.6
0.6
0.6
0.6
0.6
185 H/W 02/0739 Steven For solving primary battery hand issue. Change R447, R449 to 4.7KOHm; R444, R131 to 2.2KOhm. 0.6
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4 44/45 PWR +3VALW change to +3VSRCRename net +3VALW to +3VSRC
0.2
5 47 PWR VCCP high/low side MOSFET change from IR to InfineonNo-stuff PC207 and PC208
PQ38 change from IR7821(SB57821008L) to BSO072N03S(SB00000418L)PQ40 change from IR7832(SB57832008L) to BSO072N03S(SB00000418L)Un-pop PC207 and PC208 10U_0805_6.3V5K(SE093106M8L)
0.2
46 PWR 06/01 SahaM4 input current more than MAX8734 LDO3output 100mA
Delete PU17 SN74AHC1G32DCKR OR GATE(SA00732018L), PR49 1K_0402_1%(SD03410018L)Add PR350 0_0402_5%(SD02800008L) connact LDO3 to ON3 PU18 74AHCT1G08GW AND GATE(SA00000L30L) PR352 1K_0402_1%(SD03410018L) PR351 0_0402_5%(SD02800008L)
Saha
06/01 Saha
06/01 Saha
06/01 Saha
6 PWR 06/01 Saha VCCP_1P05VP OCP issue(5A)47 PR224 change from 124K_0402_1%(SD03412438L) to 60.4K_0402_1%(SD03460428L) 0.2
7 PWR 06/01 Saha Choke height issue.(5.6mm change to 5.0mm)47/48 PL14 and PL27 change from 1.4U_HMU1356-1R4_15.5A H5.6mm(SH04814AM8L)to 1.4U_HMU1350-1R4_15A H5.0mm(SH000004H8L)
8 PWR 06/01 Saha44 PSID materiel change by Dell PQ1 change from BSS138_SOT23(SB50138008L) to FDV301_SOT23(SB50301008L)
PWR9 50 06/01 Saha New version MAX8731 PIN1 define GND Un-pop PR337 0_0402_5%(SD02800008L),Pop PR336 0_0402_5%(SD02800008L)
0.2
0.2
0.2
10 PWR50 06/02 Saha Add RC filter at pin 23 of MAX8731 Add PR360 1_0603_1%(SD014100B8L) PC253 220P_0402_50V7K(SE074221K8L) 0.2
11 PWR46/48 06/02 Saha Add support for Reliability voltagemargining tests
Add PR356, PR355 and PR359 0_0603_5%(SD01300008L) PR353 and PR354 0_0402_5%(SD02800008L) 0.2
PWR12 06/1648 PC70 and PC71 change from 330U_D3L_6.3V_R25(SGA00000N8L)to 330U_D2E_2.5VM_R15(SGA19331D0L)
Change output capactior rating voltagefrom 6.3V to 2.5V
Saha0.3
PWR13 06/2249 Change VCORE DPRSLPVR input resistor value PR248 change from 0_0402_5%(SD02800008L) to 499_0402_1%(SD03449900L)Saha 0.3
15 PWR 06/2946 Discreate 3VALW and 3VSRC.Add PU17 SN74AHC1G32DCKR OR GATE(SA00732018L), PR49 1K_0402_1%(SD03410018L) PQ82 FDC655BN_NL(SB000004P8L )Delete PR352 1K_0402_1%(SD03410018L) PR351 0_0402_5%(SD02800008L) PR350 0_0402_5%(SD02800008L) PU18 74AHCT1G08GW AND GATE(SA00000L30L)
Saha 0.3
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D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 0.6
Changed-List History 2
62 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
18 47 PWR ISL6227 Issuechange 1.05V/1.5VHigh/Low side MOSFETchange 1.05V chokeadjust OCP and ISEN value
VCC Change from +5VRUN to +5VSUS.EN1 and EN2 change from RUNPWROK to RUN_ON.PR221 change from 20K_04-2_1%(SD03420028L ) to 19.6K_0402_1%(SD00000358L)PQ8 change from FDS6994S(SB56994008L) to FDS8880(SB000004U8L)Add PQ83 FDS6670AS(SB000004T8L)PQ38 change from BSO072N03S(SB00000418L) to FDS8880(SB000004U8L)PQ40 change from BSO072N03S(SB00000418L) to FDS6670AS(SB000004T8L)PL27 change from 1.4U_HMU1350(SH000004H8L) to 1.5U_SIL104(SH04215A08L)Add PC261 0.01U_0402(SE068103K8)Add PC262 and PC263 2200P_0402(SE074222K8L)PR219 change from 825_0402_1%(SD03482508L) to 1.43K_0402_1%(SD03414318L)PR220 change from 825_0402_1%(SD03482508L) to 2.1K_0402_1%(SD03421018L)PR223 change from 69.8K_0402_1%(SD03469828L) to 124K_0402_1%(SD03412438L)PR224 change from 60.4K_0402_1%(SD03460428L) to 124K_0402_1%(SD03412438L)
0.3Saha
19 PWR Saha49 ISL6260 Issue0.3
20 PWR50 Saha Change +VCHGR output CAP from 1206 to 1210 0.3
17 PWR 06/2945/51 Saha Rename +3VSRC to +3VALWBattery conn. and battery selector +3VSRCchange to +3VALW 0.3
06/29
Delete PR338, PR339 and PR340 2.7_0603_5%Change PC246, PC247, PC248 to 1500P_0805-----UnpopChange PH1 from ERTJ1VR103J(SL20000020L) to NCP15WM474J03RB(SL20000098L)PR284 change from 15.8K_0402_1%(SD03415828L) to 0_0402_5%(SD02800008L)Add PC260 0.1U_0603(SE042104K8L)
06/29
06/29 PC113 and PC114 change from 10U_1206(SE142106M8L) to 10U_1210(SE056106K8L)
08/1221 PWR47 Saha Add VSEN capacitor 0.4Add PC265 and PC264 100P_0402_50V8K(SE071101K8L)
22 08/1247 PWR Saha Delete PGOOD pull high resistor 0.4Delete PR283 100K_0402_1%(SD03410038L)De-pop PR195 100K_0402_1%(SD03410038L)
23 48 08/12PWR Saha Delete reliability test resistor Delete PR283 110K_0603_1%, PR359 0_0603_1%, and PR82 59.6K_0603_1% 0.4
24 49 08/12PWR Saha Adjust VCORE load line PR267 change from 7.87K_0402_1%(SD03478718L) to 9.09K_0402_1%(SD034909100)PR231, PR331, and PR270 change from 7.68K_0402_1%(SD00000238L) to7.68K_0805_1%(SD00000B08L)
26 50 PWR 10/17 Saha Add RC filter in FBSA/B PIN Add PR368 and PR369 100_0402_5%(SD02810008L)Add PC266 and PC267 0.01U_0603_50V7K(SE025103K8L)Un-pop PR371 and PR370 0_0402_5%
0.5
27 46 PWR 10/17 Saha EMI request: change BST3 resestor Change PR32 from 0_0603_5%(SD01300008L) to 2.2_0603_5%(SD013220B8L) 0.5
28 46 PWR 10/17 Saha change 3V out put CAP height change PC31 from 330U_6.3V_R25 H1.9(SGA00001C8L ) to330U_6.3V_R25 H2.8(SGA0000089L) 0.5
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1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 0.6
Changed-List History 2
63 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
29 PWR 10/17 0.5Populate PR361-PR367, PC254-259, PU19, PQ81. Change PR361 from 80.6k to 0. Change PR362 from 200k to 301k.Change PR363 from 121k to 59k. Change PR364 from 3.01k to 27.4k.Change PR365k from 499k to 4.32Meg.
50 Saha Populate UL circuit
30 PWR 10/2049 Saha Change VCC_CORE OCP, SOFT,and DPRSTP# value
PR260 change from 20K_0402_1%(SD03420028L) to 11.5K_0402_1%(SD03411520L)PC187 change from 0.022U_0402_16V7K(SE076223K8L) to0.01U_0402_16V7K(SE076103K8L)Add PR372 0_0402_5%(SD02800008L)Delete PR246 0_0402_5%(SD02800008L)Un-pop PR249 0_0402_5%(SD02800008L)
0.5
PWR31 Change PU6 BST resistorSaha10/2048 0.5PR73 change from 0_0603_5%(SD01300008L) to 1_0603_5%(SD013100B8L)
32 PWR Change PQ2 from RUH002N06 to 390444 10/20 Saha PQ2 change from RHU002N06(SB50206008L) to MMST3904(SB000002R0L) 0.5
33 49 PWR 11/12 Saha Adjust CPU Load Line
PR267 change from 9.09K_0402_1%(SD03490918L) to 10.5K_0402 _1%(SD03410528L)PR261 change from 3.57K_0402_1%(SD03435718L) to 2.47K_0402 _1%(SD03424318L)Add PC252 100U_25V_(6.3X7.7)(SF10004M08L)Add PC215 0.068U_10VX7R_0402 (SE102683K8L)