Chapter 3: Memory
Jan 12, 2016
Chapter 3: Memory
ROMs
2764 Pinout
RAMs
SRAM Pinout
DRAM Pinout
PC/XT Memory Map
Decoding the Address Bus
ROM Selection for IBM PC
Decoding the Address Bus in PC/XT
ROM Integrity
RAM Configurations
Bank Selection
PC DRAM Selection
DRAM Connection in IBM PC
8088 Timing Requirements
Timing Diagram for IOR* and MEMR*
Examples (Read)
Timing Diagram for IOW* and MEMW*
Examples (Write)
Examples (Write - more)
Insertion of WAIT State
Wait-State Generation Circuits
Memory Bus Bandwidth Example 1
Memory Bus Bandwidth Example 2