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5 5 4 4 3 3 2 2 1 1 D D C C B B A A Size Project Name Rev Date: Sheet of Title : Engineer: C 1 53 Wednesday, October 13, 2004 ASUSTECH CO.,LTD. BLOCK DIAGRAM 2.0 A3G HD_NB TEAM 11_VGA_M11-Disp Sys POWER (IMVP4) 37 46 05_THERMAL 18 A3G BLOCK DIAGRAM 02_POWER DIAGRAM 39_FAN&Audio DJ 2.9W MINIPCI -PM HUB 12 14 45 28 LPC 42_VCORE USB X6 23 43_VGACORE 16_BACKLIGHT&LCD CON PRIMARY IDE AUDIO AMP & MIC 35_AUDIO AMP DOTHAN 03 10_DDR_TERMINATION 03_CPU-DOTHAN(HOST) 38_USB 26_CB1394-R5C593(2) 39 THERMAL 06 24_MINIPCI 48_CHARGER 36 MONTARA 38 USB 2.0 20 CRT 20_ICH4-M(USB_PM) MDC 13_VGA_M11-PWR/GND 29 11 51 28_IDE-HD CARDBUS 10 24 LVDS 08_NB-MCHM3 14_VGA_M11-VM TERMINATION 15 12_VGA_M11-Mem IF 33 21 40_FUNCTION KEY 30 50_BATLOW/SD# 41_PWR & RESET SEQ 19 1394 IR&LPT FILE LIST SECONDARY IDE ICH4 KBC AC97 30_KBC-M38857 25_CB1394-R5C593(1) PRINTER PORT 52 SIO 40 49_AC_BAT_SYS Function Key 49 AC'97 CODEC PSB 22 IDE Ultra ATA100 47 32 47_PIC16C54C 05 52_SCREW_HOLES 45_2.5V&1.5V&1.35V&1.05V 36_MIC 46_1.25V&1.8V 09_DUAL_DDR 32 44 RGB 41 27_PCMCIA SOCKET 08 13 26 25 15_VGA_M11-Video RAM 18_ICH4-M(HUB_PCI) 21_ICH4-M(POWER) 32_IR&LPT_PORT 44_SYSTEM 35 AGP 33_DEBUG PORT 51_LOAD SWITCH 43 PCMCIA 29_IDE-ODD 23_LAN-RTL8100CL 22_CLOCK-ICS950815 34 MCHM 01 DDR 04_CPU-DOTHAN(PWR) DEBUG PORT DUAL DDR SODIMM 21W 31 04 37_MDC&RJ45&RJ11 19_ICH4-M(IDE_AC97) 07_NB-MCHM2 17_TV-OUT & CRT CON 16 LAN 07 09 55_System Power Sequence(1) PCI 42 FAN DDR TERMINATION VGA(M11) 9W 34_CODEC-ALC650 27 06_NB-MCHM1 17 LCD 31_SuperI/O&FWH 50 CLOCK GEN 48 01_BLOCK DIAGRAM 53_Clock Map 54_Platform Power Delivery Map 11W 56_System Power Sequence(2) 57_Revision History TV C/Y/COMP
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ASUS A3G rev2.0

Oct 23, 2014

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FILE LISTD

A3G BLOCK DIAGRAM39

THERMAL05

POWER (IMVP4) FAN03

DOTHAN 21W04

41

42

43

44

45

46

47

48

49

50

51

PSB LVDS LCDC

DDR TERMINATION AGP MCHM MONTARA -PM 11W10

CLOCK GEN22

TV CRT11 12

C/Y/COMP VGA(M11) RGB13 14 15

9W16 17 52 06

DDR DUAL DDR SODIMM09

07

08

HUB Function Key40 35

AUDIO AMP & MIC36 34

AC'97 CODEC

AC97 IDE Ultra ATA10029

SECONDARY IDE

ICH4 MDC37

PRIMARY IDE28

2.9W PCI LPC18 19 20 21

B

DEBUG PORT33

1394 CARDBUS25 26 24

MINIPCI23

LAN

USB 2.0 USB X638

KBC30 31

SIO32

IR&LPT

PCMCIA27

PRINTER PORT32

01_BLOCK DIAGRAM 02_POWER DIAGRAM 03_CPU-DOTHAN(HOST) 04_CPU-DOTHAN(PWR) 05_THERMAL 06_NB-MCHM1 07_NB-MCHM2 08_NB-MCHM3 09_DUAL_DDR 10_DDR_TERMINATION 11_VGA_M11-Disp Sys 12_VGA_M11-Mem IF 13_VGA_M11-PWR/GND 14_VGA_M11-VM TERMINATION 15_VGA_M11-Video RAM 16_BACKLIGHT&LCD CON 17_TV-OUT & CRT CON 18_ICH4-M(HUB_PCI) 19_ICH4-M(IDE_AC97) 20_ICH4-M(USB_PM) 21_ICH4-M(POWER) 22_CLOCK-ICS950815 23_LAN-RTL8100CL 24_MINIPCI 25_CB1394-R5C593(1) 26_CB1394-R5C593(2) 27_PCMCIA SOCKET 28_IDE-HD 29_IDE-ODD 30_KBC-M38857 31_SuperI/O&FWH 32_IR&LPT_PORT 33_DEBUG PORT 34_CODEC-ALC650 35_AUDIO AMP 36_MIC 37_MDC&RJ45&RJ11 38_USB 39_FAN&Audio DJ 40_FUNCTION KEY 41_PWR & RESET SEQ 42_VCORE 43_VGACORE 44_SYSTEM 45_2.5V&1.5V&1.35V&1.05V 46_1.25V&1.8V 47_PIC16C54C 48_CHARGER 49_AC_BAT_SYS 50_BATLOW/SD# 51_LOAD SWITCH 52_SCREW_HOLES 53_Clock Map 54_Platform Power Delivery Map 55_System Power Sequence(1) 56_System Power Sequence(2) 57_Revision History

D

C

B

A

A

Title : BLOCK DIAGRAMASUSTECH CO.,LTD. Size C Date:5 4 3 2

Engineer:

HD_NB TEAMRev 2.0

Project Name

A3GSheet1

Wednesday, October 13, 2004

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VR_VID0-VR_VID5 PM_STPCPU#.,PM_DPRSLPVR.,PCI#.,MCH_OK.,CLK_EN#D

CPU_VRON +VCORE AC_BAT_SYS (2A) MAX1987 (25A) VRM_PWRGD

D

+VGACORE (1A) MAX1844 SUSC#. (2.5A) (6A) LTC3728 (Regulator) +5VAO +V3.3SUS SUSC#C

(8.625A) VGA_PWRGD +5VO +12VO (5A) SUSB# +V1.5 (1.35A) +V2.5 (8.2A) SUSB# (5.5A) (0.2A) SUSB# SUSB# +V5S +V3.3S +V5 +V3 +V12S +V12 +V1.5S +V2.5S (5.5A) (5A) (5.5A) (5A) (0.2A) (0.2A) (1.35A) (8.2A)

A/D_VIN BAT_S TS

+1.5VO (1.35A) +2.5VO (8.2A)

Power Signal Circuit

SHUT_DOWN# BAT_IN#_OC ACIN_OC AC_APR_UCC

(2A)

SUSC# TPS5130 SUSB# CPU_VRON SUSB#

(4.2A) +1.2VO (1.9A) +V1.2S (1.9A)

+V2.5

(0.5A)

CM8562 (Regulator) SUSC#

+V1.25S (1A)

SWITCH

+1.05VO (2.8A) +VCCP (2.8A)

TS# SUSB# AC_APR_UC

PIC16C54B/C

CHG EN CHG LED PWR LED BAT_LLOW

+2.5VO (0.6A) MIC37101-1.8 (0.8A) +1.8VO LDO

+V1.8 (0.8A) (0.8A) SUSB# +V1.8S (0.8A)

SMC_BAT SMD_BAT

B

+V3.3SUS (0.7A) SI9183DT (LDO)

+V1.5SUS

(1.35A)B

(2.25A)

PIC + TL494 (Charge) FDS6679 FD6JK3TP MIC5223MB (Regulator)

(2.5A) BAT (10.5A)

(10.5A) (6.4A)

(10.5A) (6.4A) A/D_VIN (10mA) +5VO (20mA) L78L05ACUTR SWITCH (Regulator) +5VCHG (100mA) (F02JK2E)

+5VLCM (120mA) LM4040BIM3X (Regulator) +2.5VREF (500uA)A

(2mA)A

+3VAO (10mA)

+3VALWAYS (10mA)

Title : POWER DIAGRAMASUSTECH CO.,LTD. Size C Date:5 4 3 2

Engineer:

EDDY ZHAORev 2.0

Project Name

A3GSheet1

Wednesday, October 13, 2004

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CPU Pin A1 need to be enlarged(M)D

H_A#[16:3]

U42B H_A#16 H_A#15 H_A#14 H_A#13 H_A#12 H_A#11 H_A#10 H_A#9 H_A#8 H_A#7 H_A#6 H_A#5 H_A#4 H_A#3 H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0 AA2 Y3 AA3 U1 Y1 Y4 W2 T4 W1 V2 R3 V3 U4 P4 U3 T1 P1 T2 P3 R2 A[16]# A[15]# A[14]# A[13]# A[12]# A[11]# A[10]# A[9]# A[8]# A[7]# A[6]# A[5]# A[4]# A[3]# ADSTB[0]# REQ[4]# REQ[3]# REQ[2]# REQ[1]# REQ[0]# ADDRESS GROUP 0 ADS# PRDY# PREQ# BNR# BPRI# DBR# N2 A10 H_PRDY# B10 H_PREQ# L1 J3 A7 H_ADS#

H_BNR# H_BPRI#

WIDTH: 5 mils SPACE >= 1:2 GROUP SPACE >=1:5 Breakout Length:= 1:3 GROUP SPACE >=1:5 LENGTH: 0.5" - 5.5" (#0012)

H_ADSTB#0

DEFER# DRDY# DBSY#

L4 H2 M2

H_DEFER# H_DRDY# H_DBSY#

CONTROL

H_REQ#[4:0]

BR0#

N4 A4 B5 J2

H_BR0# H_IERR#

H_BR0# +VCCP R362 1 56Ohm H_INIT# H_LOCK# 2

H_DINV0# H_DSTBN#0 H_DSTBP#0

H_DINV2# H_DSTBN#2 H_DSTBP#2 H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54 H_D#53 H_D#52 H_D#51 H_D#50 H_D#49 H_D#48 H_DINV3# H_DSTBN#3 H_DSTBP#3 C

IERR# INIT#

H_A#[31:17]

ADDRESS GROUP 1

WIDTH:4mils SPACE >= 1:2 STROBE SPACE >=1:3 GROUP SPACE >=1:5 LENGTH: 0.5" - 6.5" (#0012) H_ADSTB#1

C

H_A#31 H_A#30 H_A#29 H_A#28 H_A#27 H_A#26 H_A#25 H_A#24 H_A#23 H_A#22 H_A#21 H_A#20 H_A#19 H_A#18 H_A#17

0.5"-12" = 25 mils X BPSB(#0001)R309 CPU_COMP0 1 27.4Ohm GND 2

C167 2 0.01uF/25V

Close to Pin VCCA[3..1] of CPU

H_THERMDA H_THERMDC H_THRMTRIP_S# PM_PSI# TPC28t TPC28t TPC28t TPC28t T26 T1 T21 T27 1 1 1 1

TCK TDI TDO TMS TRST# VCCSENSE

A13 C12 A12 C11 B13 AE7

H_TCK H_TDI H_TDO H_TMS H_TRST#

1

1

CPU DEBUG PORTH_PREQ# H_PRDY# R341 1 R336 1

+VCCP 2 200Ohm /ITP 2 56Ohm /ITP

H_PROCHOT#

1

Close to Pin A8 of CPU

Pin AD1,AC2 of BANIAS

GND

GND

H_RSVD3 H_RSVD2 H_RSVD1 H_RSVD0

VSSSENSE

AF6

Close to Pin A12 of CPU Width= 5 mils Length = 25 mils X BPSB(#0001)R96 CPU_COMP3 1 56Ohm Pin AD1,AC2 of BANIAS GND 2

CPU_COMP1 : Analog Length =20mils Length Match :same as CLK66 CLK_FWH33 4"~8.5" C211 10PF CLK_SIO33 1 1

R154 1

2

33.2Ohm 11 2 _CLK_LAN33 =20mils Length Match :+/-100 mils CLK_ICH66 4"~8.5" CLK_AGP66 1 AGP66M C189 10PF 1 CLK_MCH66 4"~8.5" C191 10PF 1 1

2

R130 2 33.2Ohm _CLK_MCH66 25