A NSWERS ◆ 1 ANSWERS Chapter 1 SECTION CHECKUPS Section 1–1 The Atom 1. The Bohr model has a central nucleus consisting of protons and neutrons orbited by electrons at varying distances from the nucleus. 2. An electron is the smallest particle of negative electrical charge. 3. Protons and neutrons. A proton is a particle of positive charge and a neutron has no net charge. 4. The atomic number is the number of electrons in the nucleus of an atom. 5. An electron shell contains orbiting electrons at a certain energy level. Each shell of a given atom is at a different energy level. 6. A valence electron is one that is in the outer shell of an atom. 7. A free electron is a valence electron that has broken free of its parent atom. 8. A positive ion is a previously neutral atom that has lost a valence electron and has a net positive charge. A negative ion is one that has gained an extra electron and has a net negative charge. 9. The quantum model is based on the uncertainty principle and wave-particle duality. Section 1–2 Materials Used in Electronics 1. Conductors have many free electrons and easily conduct current. Insulators have essentially no free electrons and do not conduct current. 2. Semiconductors do not conduct current as well as conductors do. In terms of conductivity, they are between conductors and insulators. 3. Conductors such as copper have one valence electron. 4. Semiconductors have four valence electrons. 5. Gold, silver, and copper are the best conductors. 6. Silicon is the most widely used semiconductor. 7. The valence electrons of a semiconductor are more tightly bound to the atom than those of conductors. 8. Covalent bonds are formed by the sharing of valence electrons with neighboring atoms. 9. An intrinsic material is one that is in a pure state. 10. A crystal is a solid material formed by atoms bonding together in a symmetrical pattern. Section 1–3 Current in Semiconductors 1. Free electrons are in the conduction band. 2. Free (conduction) electrons are responsible for electron current in silicon. 3. A hole is the absence of an electron in the valence band. 4. Hole current occurs at the valence level. Section 1–4 N-Type and P-Type Semiconductors 1. Doping is the process of adding impurity atoms to a semiconductor in order to modify its con- ductive properties. 2. A pentavalent atom has five valence electrons and a trivalent atom has three valence electrons. 3. A pentavalent atom is called a donor atom and a trivalent atom is called an acceptor atom. 4. An n-type material is formed by the addition of pentavalent impurity atoms to the intrinsic semiconductive material. 5. A p-type material is formed by the addition of trivalent impurity atoms to the intrinsic semi- conductive material. 6. The majority carrier in an n-type semiconductor is the free electron. 7. The majority carrier in a p-type semiconductor is the hole.
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ANSWERS ◆ 1
ANSWERS Chapter 1
SECTION CHECKUPSSection 1–1 The Atom
1. The Bohr model has a central nucleus consisting of protons and neutrons orbited by electronsat varying distances from the nucleus.
2. An electron is the smallest particle of negative electrical charge.
3. Protons and neutrons. A proton is a particle of positive charge and a neutron has no net charge.
4. The atomic number is the number of electrons in the nucleus of an atom.
5. An electron shell contains orbiting electrons at a certain energy level. Each shell of a givenatom is at a different energy level.
6. A valence electron is one that is in the outer shell of an atom.
7. A free electron is a valence electron that has broken free of its parent atom.
8. A positive ion is a previously neutral atom that has lost a valence electron and has a netpositive charge. A negative ion is one that has gained an extra electron and has a net negativecharge.
9. The quantum model is based on the uncertainty principle and wave-particle duality.
Section 1–2 Materials Used in Electronics
1. Conductors have many free electrons and easily conduct current. Insulators have essentially nofree electrons and do not conduct current.
2. Semiconductors do not conduct current as well as conductors do. In terms of conductivity, theyare between conductors and insulators.
3. Conductors such as copper have one valence electron.
4. Semiconductors have four valence electrons.
5. Gold, silver, and copper are the best conductors.
6. Silicon is the most widely used semiconductor.
7. The valence electrons of a semiconductor are more tightly bound to the atom than those ofconductors.
8. Covalent bonds are formed by the sharing of valence electrons with neighboring atoms.
9. An intrinsic material is one that is in a pure state.
10. A crystal is a solid material formed by atoms bonding together in a symmetrical pattern.
Section 1–3 Current in Semiconductors
1. Free electrons are in the conduction band.
2. Free (conduction) electrons are responsible for electron current in silicon.
3. A hole is the absence of an electron in the valence band.
4. Hole current occurs at the valence level.
Section 1–4 N-Type and P-Type Semiconductors
1. Doping is the process of adding impurity atoms to a semiconductor in order to modify its con-ductive properties.
2. A pentavalent atom has five valence electrons and a trivalent atom has three valenceelectrons.
3. A pentavalent atom is called a donor atom and a trivalent atom is called an acceptor atom.
4. An n-type material is formed by the addition of pentavalent impurity atoms to the intrinsicsemiconductive material.
5. A p-type material is formed by the addition of trivalent impurity atoms to the intrinsic semi-conductive material.
6. The majority carrier in an n-type semiconductor is the free electron.
7. The majority carrier in a p-type semiconductor is the hole.
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2 ◆ ANSWERS
8. Majority carriers are produced by doping.
9. Minority carriers are thermally produced when electron-hole pairs are generated.
10. A pure semiconductor is intrinsic. A doped (impure) semiconductor is extrinsic.
Section 1–5 The PN Junction
1. A pn junction is the boundary between p-type and n-type semiconductors in a diode.
2. Diffusion is the movement of the free electrons (majority carriers) in the n-region across the pnjunction and into the p region.
3. The depletion region is the thin layers of positive and negative ions that exist on both sides ofthe pn junction.
4. The barrier potential is the potential difference of the electric field in the depletion region andis the amount of energy required to move electrons through the depletion region.
5. The barrier potential for a silicon diode is approximately 0.7 V.
6. The barrier potential for a germanium diode is approximately 0.3 V.
RELATED PROBLEM FOR EXAMPLE1–1 1s2
2s2 2p6
3s2 3p6 3d10
4s2 4p2
TRUE/FALSE QUIZ1. F 2. T 3. T 4. F 5. T 6. T 7. F 8. T 9. F
1. When forward-biased, a diode conducts current. The free electrons in the n region move acrossthe pn junction and combine with the holes in the p region.
2. To forward-bias a diode, the positive side of an external bias voltage is applied to the p regionand the negative side to the n region.
3. When reverse-biased, a diode does not conduct current except for an extremely small reversecurrent.
4. To reverse-bias a diode, the positive side of an external bias voltage is applied to the n regionand the negative side to the p region.
5. The depletion region for forward bias is much narrower than for reverse bias.
6. Majority carrier current is produced by forward bias.
7. Reverse current is produced by the minority carriers.
8. Reverse breakdown occurs when the reverse-bias voltage equals or exceeds the breakdownvoltage of the pn junction of a diode.
9. Avalanche effect is the rapid multiplication of current carriers in reverse breakdown.
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ANSWERS ◆ 3
Section 2–2 Voltage-Current Characteristic of a Diode
1. The knee of the characteristic curve in forward bias is the point at which the barrier potential isovercome and the current increases drastically.
2. A forward-biased diode is normally operated above the knee of the curve.
3. Breakdown voltage is always much greater than the barrier potential.
4. A reverse-biased diode is normally operated between 0 V and the breakdown voltage.
5. Barrier potential decreases as temperature increases.
Section 2–3 Diode Models
1. A diode is operated in forward bias and reverse bias.
2. A diode should never be operated in reverse breakdown.
3. The diode can be ideally viewed as a switch.
4. A diode includes barrier potential, dynamic resistance, and reverse resistance in the complete model.
5. The complete diode model is the most accurate diode approximation.
Section 2–4 Half-Wave Rectifiers
1. PIV across the diode occurs at the peak of the input when the diode is reversed biased.
2. There is current through the load for approximately half (50%) of the input cycle.
3. The average value is
4. The peak output voltage is
5. The PIV sating must be at least 60 V.
Section 2–5 Full-Wave Rectifiers
1. A full-wave voltage occurs on each half of the input cycle and has a frequency of twice theinput frequency. A half-wave voltage occurs once each input cycle and has a frequency equal tothe input frequency.
2. The average value of
3. The bridge rectifier has the greater output voltage.
4. The 50 V diodes must be used in the bridge rectifier.
5. In the center-tapped rectifier, diodes with a PIV rating of at least 90 V would be required.
Section 2–6 Power Supply Filters and Regulators
1. The output frequency is 60 Hz.
2. The output frequency is 120 Hz.
3. The ripple voltage is caused by the slight charging and discharging of the capacitor through theload resistor.
4. The ripple voltage amplitude increases when the load resistance decreases.
5. Ripple factor is the ratio of the ripple voltage to the average or dc voltage.
6. Input regulation is a measure of the variation in output voltage over a range of input voltages.Load regulation is a measure of the variation in output voltage over a range of load current values.
Section 2–7 Diode Limiters and Clampers
1. Limiters clip off or remove portions of a waveform. Clampers insert a dc level.
2. A positive limiter clips off positive voltages. A negative limiter clips off negative voltages.
SECTION CHECKUPSSection 5–1 The DC Operating Point
1. The upper load line limit is IC(sat) and VCE(sat). The lower limit is IC � 0 and VCE(cutoff).
2. The Q-point is the dc point at which a transistor is biased and is specified by VCE and IC.
3. Ideally, saturation occurs at the intersection of the load line and the y-axis (VCE � 0 V). Cutoffoccurs at the intersection of the load line and the IB � 0 curve.
4. The Q-point must be centered on the load line for maximum Vce.
Section 5–2 Voltage-Divider Bias
1.
2.
3. VB � 5 V
4. Voltage-divider bias is stable and requires only one supply voltage.
Section 5–3 Other Bias Methods
1. Emitter bias is much less dependent on the value of beta than is base bias.
2. Emitter bias requires two separate supply voltages.
3. IC increases with causing a reduction in VC and, therefore, less voltage across RB, thusless IB.
4. Base bias is beta-dependent.
5. The Q-point changes due to changes in and VCE over temperature.
6. Emitter-feedback improves stability.
Section 5–4 Troubleshooting
1. A transistor is saturated when VCE � 0 V. A transistor is in cutoff when VCE � VCC.
2. RE is open because the BE junction of the transistor is still forward-biased.
3. If RC is open, VC is about 0.7 V less than VB.
bDC
bDC,
RIN(BASE) = (bDCVB)>IE = [(190)(2 V)]>2 mA = 190 kÆ
RIN(BASE) = VIN>IIN = 5 V>5 mA = 1 MÆ
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ANSWERS ◆ 9
RELATED PROBLEMS FOR EXAMPLES5–1 ICQ � 19.8 mA; VCEQ � 4.2 V;
5–2 The voltage divider would be loaded, so VB would decrease.
3. Swamping eliminates the effects of by partially bypassing RE.
4. Total input resistance includes the bias resistors, and any unbypassed RE.
5. The gain is determined by and any unbypassed RE.
6. The voltage gain decreases with a load.
7. The input and output voltages are out of phase.180°
Rc, r¿e,
r¿e,
r¿e
r¿e = 25 mV>15 mA = 1.67 Æ
bac.
r¿e
r¿br¿ea
r¿e
%¢IC = 8.2%; %¢VCE = -30.7%
IC = 853 mA; VCE = 1.47 V
IC = 1.41 mA; VCE = 9.27 V
bDC = 288
RIN(BASE) = 453 kÆ
92.3 kÆ
Ib( peak) = 42 mA
FLOY9868_09_SE_Answer.qxd 11/30/10 6:11 PM Page 9
10 ◆ ANSWERS
Section 6–4 The Common-Collector Amplifier
1. A common-collector amplifier is an emitter-follower.
2. The maximum voltage gain of a common-collector amplifier is 1.
3. A common-collector amplifier has a high input resistance.
Section 6–5 The Common-Base Amplifier
1. Yes
2. The common-base amplifier has a low input resistance.
3. The maximum current gain is 1 in a CB amplifier.
Section 6–6 Multistage Amplifiers
1. A stage is one amplifier in a cascaded arrangement.
2. The overall voltage gain is the product of the individual gains.
3.
4. At lower frequencies, XC becomes large enough to affect the gain.
Section 6–7 The Differential Amplifier
1. Double-ended differential input is between two input terminals. Single-ended differential inputis from one input terminal to ground (with other input grounded).
2. Common-mode rejection is the ability of an op-amp to produce very little output when thesame signal is applied to both inputs.
3. A higher CMRR results in a lower common-mode gain.
Section 6–8 Troubleshooting
1. If C4 opens, the gain drops. The dc level would not be affected.
2. Q2 would be biased in cutoff.
3. The collector voltage of Q1 and the base, emitter, and collector voltages of Q2 would change.
RELATED PROBLEMS FOR EXAMPLES6–1 IC 5 mA; VCE 1.5 V
6–2 3.13 mA
6–3 9.3 mV
6–4
6–5 97.3
6–6 83
6–7 5; 165
6–8 9.56
6–9 Increases
6–10 71. A single transistor loads the CE amplifier much more than the Darlington pair.
6–11 64.1
6–12
6–13 34,000; 90.6 dB
6–14 C3 open
TRUE/FALSE QUIZ1. T 2. T 3. F 4. T 5. F 6. F 7. T 8. T
(d) Ciss and Crss are usually specified on a FET datasheet.
(e) Cin(tot) � (3 pF)(26) � 4 pF � 82 pF
Section 10–5 Total Amplifier Frequency Response
(a) The gain is 1 at fT.
(b)
(c) Av � 130 MHz�50 MHz � 2.6
Section 10–6 Frequency Response of Multistage Amplifiers
(a)
(b)
(c) BW decreases.
Section 10–7 Frequency Response Measurements
(a) fcl � 125 Hz; fcu � 500 kHz
(b) Rise time is between the 10% and 90% points and fall time is between the 90% and 10%points.
(c) tr � 150 ns
(d) tf � 2.8 ms
(e) Since
RELATED PROBLEMS FOR EXAMPLES10–1 (a) 61.6 dB (b) 17 dB (c) 102 dB
10–2 (a) 50 V (b) 6.25 V (c) 1.56 V
10–3
10–4 212 @ 400 Hz; 30 @ 40 Hz; 3 @ 4 Hz
10–5 It will increase the gain and reduce the lower critical frequency.
10–6 C2 “sees” a smaller resistance.
10–7 fcl changes from 16.2 Hz to 16.1 Hz.
10–8 Ideally, the low-frequency response is not affected because an infinite load makes fc of theoutput stage even lower, so the input stage determines the lower cutoff frequency of theamplifier.
10–9 The resistance of the input will be higher, so the critical frequency is lower.
1. An SCS can be turned off with the application of a gate pulse, but an SCR cannot.
2. A positive pulse on the cathode gate or a negative pulse on the anode gate turns the SCS on.
3. An SCS can be turned off by any of the following:
(a) positive pulse on anode gate
(b) negative pulse on cathode gate
(c) reduce anode current below holding value by complete interruption of the anode current
Section 11–6 The Unijunction Transistor (UJT)
1. The UJT terminals are base 1, base 2, and emitter.
2.
3. R, C, and determine the period.
Section 11–7 The Programmable Unijunction Transistor (PUT)
1. Programmable means that the turn-on voltage can be adjusted to a desired value.
2. The PUT is a thyristor, similar in structure to an SCR, but it is turned on by the anode-to-gatevoltage. It has a negative resistance characteristic like the UJT.
1. The main purpose of an instrumentation amplifier is to amplify small signals that occur onlarge common-mode voltages. The key characteristics are high input impedance, high CMRR,low output impedance, and low output offset.
2. Three op-amps and seven resistors including the gain resistor are required to construct a basicinstrumentation amplifier (see Figure 14–2).
3. The gain is set by the external resistor RG.
4. The gain is approximately 6.
5. To reduce effects of noise on the common-mode operation of an IA
1. OTA stands for Operational Transconductance Amplifier.
2. Transconductance increases with bias current.
3. Assuming that the bias input is connected to the supply voltage, the voltage gain increaseswhen the supply voltage is increased because this increases the bias current.
4. The voltage gain decreases as the bias voltage decreases.
Section 14–4 Log and Antilog Amplifiers
1. A diode or transistor in the feedback loop provides the exponential (nonlinear) characteristic.
2. The output of a log amplifier is limited to the barrier potential of the pn junction (about 0.7 V).
3. The output voltage is determined by the input voltage, the input resistor, and the emitter-to-base leakage current.
4. The transistor in an antilog amplifier is in series with the input rather than in the feedback loop.
Section 14–5 Converters and Other Op-Amp Circuits
1. same value to load.
2. The feedback resistor is the constant of proportionality.
RELATED PROBLEMS FOR EXAMPLES14–1
14–2 Make
14–3 The ripple could be removed by an output low-pass filter.
14–4 Many combinations are possible. Here is one:
14–5
14–6 Yes. The gain will change to approximately 110.
14–7 The output is a square-wave modulated signal with a maximum amplitude of approximately3.6 V and a minimum amplitude of approximately 1.76 V.
1. The critical frequency determines the passband.
2. The inherent frequency limitation of the op-amp limits the bandwidth.
3. Q and BW are inversely related. The higher the Q, the better the selectivity, and vice versa.
Section 15–2 Filter Response Characteristics
1. Butterworth is very flat in the passband and has a roll-off. Chebyshev hasripples in the passband and has greater than roll-off. Bessel has a linearphase characteristic and less than roll-off.
2. The damping factor
3. Frequency-selective circuit, gain element, and negative feedback circuit are the parts of an ac-tive filter.
Section 15–3 Active Low-Pass Filters
1. A second-order filter has two poles. Two resistors and two capacitors make up the frequency-selective circuit.
2. The damping factor sets the response characteristic.
3. Cascading increases the roll-off rate.
Section 15–4 Active High-Pass Filters
1. The positions of the Rs and Cs in the frequency-selective circuit are opposite for low-pass andhigh-pass configurations.
2. Decrease the R values to increase fc.
3.
Section 15–5 Active Band-Pass Filters
1. Q determines selectivity.
2. Higher Q gives narrower BW.
3. A summing amplifier and two integrators make up a state-variable filter.
4. An inverting amplifier and two integrators make up a biquad filter.
Section 15–6 Active Band-Stop Filters
1. A band-stop rejects frequencies within the stopband. A band-pass passes frequencies within thepassband.
2. The low-pass and high-pass outputs are summed.
Section 15–7 Filter Response Measurements
1. To check the frequency response of a filter
2. Discrete point measurement: tedious and less complete; simpler equipment. Swept frequencymeasurement: uses more expensive equipment; more efficient, can be more accurate and complete.
RELATED PROBLEMS FOR EXAMPLES15–1 500 Hz
15–2 1.44
15–3
15–4
15–5 RA = RB = R2 = 10 kÆ; CA = CB = 0.053 mF; R1 = 5.86 kÆ
1. The five basic instruction types are basic instructions, conditional instructions, looping instruc-tions, branching instructions, and exception instructions.
2. Two methods for defining the tasks and sequence of tasks that a computer must perform areflowcharts and pseudocode.
3. See Figure ANS18–1.
16 Æ
-15 V+9 V
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ANSWERS ◆ 27
4. Advantages of using pseudocode, compared to using a flowchart, are that pseudocode providesgreater structure to the finished code, can be incorporated into the program headers to docu-ment the source code, and is generally quicker and easier to create and modify than flowcharts.
Section 18–2 Automated Testing Basics
1. The four components that make up a basic automated test system are the test controller, the testequipment and instrumentation, the test fixture, and the unit under test.
2. The test controller in an automated test system executes the test code that defines the test tasks,configures the test equipment, instrumentation, and fixture, and coordinates the activities of thetest system.
3. The test fixture connects the test equipment and instrumentation to the unit under test.
4. Introducing delays in an automated test system compensates for the finite response time ofpractical test equipment, instrumentation, and circuits.
Section 18–3 The Simple Sequential Program
1. Some applications that use simple sequential programs are those used by programmable con-sumer products, such as microwave ovens, video recorders, and automated sprinkler systems.
2. The simple sequential program can contain any instructions that do not alter the sequence ofprogram execution.
3. A subroutine is a section of code, often used by complex programs to perform simple butfrequently-used tasks.
Section 18–4 Conditional Execution
1. The flowchart block associated with conditional execution is the decision block.
2. The two instructions used in conditional execution are the IF-THEN-ELSE and CASE instructions.
3. The basic difference between the IF-THEN and IF-THEN-ELSE instruction is that the IF-THEN instruction takes no action if the tested condition is not TRUE.
4. The major difference between the IF-THEN-ELSE and CASE instruction is that the CASE in-struction determines whether a program variable is equal to or not equal to specific values. TheIF-THEN-ELSE instruction determines whether some condition is TRUE, and can test whethera program variable is less than or greater than as well as equal to or not equal to specific values.
Section 18–5 Program Loops
1. A basic program loop is a sequence of program execution in which the program returns to aprevious point of execution.
2. Program execution forms a circular path, or “loop” in the program.
3. The three major types of program loops are the FOR-TO-STEP loop, the WHILE-DO loop,and the REPEAT-UNTIL loop.
End
I = Infinite
Input V
Input R
Output I
I= V/R
Begin
A
A
B
R = 0?
NO
YES
B
� ANS18–1
Modified flowchart.
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28 ◆ ANSWERS
4. A WHILE-DO loop differs from a REPEAT-UNTIL loop in that the WHILE-DO loop checksthe loop condition before executing the loop instructions rather than after, and it remains in theloop while the loop condition is TRUE rather than FALSE.
5. A nested loop is a sequence of instructions in which part of a loop is itself a loop, creating aloop within a loop.
Section 18–6 Branching and Subroutines
1. A branching instruction is an instruction that transfers control to some specific section of code.
2. The two objectives that branching accomplishes is to avoid executing code that immediatelyfollows the branching instruction, and to access code that does not immediately follow thebranching instruction.
3. Coupling reflects the extent to which one part of a program interacts with or potentially affectsanother part of the program. Cohesion refers to how well a program or procedure keeps together all the code that is associated with a specific task.
4. Three basic guidelines for using general branches in programs are (a) programs, especiallyhigh-level programs, should avoid unconditional branching, (b) programs should avoid nestedbranches, especially unconditional branches, and (c) branches should always be a consciousdesign decision to simplify the program.
5. A subroutine call differs from a general branching instruction in that once a subroutine com-pletes, the program execution automatically resumes at the instruction that immediately followsthe instruction that called the subroutine.
RELATED PROBLEMS FOR EXAMPLES18–1 Terminal B of Port 1 connects to the terminal for TP4 through the contacts of relay K8.
Relay K8 is energized.
18–2 The diode can be reverse-biased by connecting the positive and negative terminals of the dcsupply to test point terminals 3 and 1, respectively. To do so, the test controller can energizethe coils of relays K3 and K5, connecting terminals A and B of Port 1 to test point terminals3 and 1, respectively.
18–3 Two advantages of measuring the resistor value are (1) the test will compensate for variationsin resistor value due to the initial resistor tolerance, resistor aging, and ambient temperature,and (2) the test will not require modification if the resistor value in the circuit changes.
18–4 One possible pseudocode description is
program NewCalculatePowerbegin
input current valueinput resistance valuepower value is current value squared times
resistance valueoutput power value
end NewCalculatePower18–5 One possible pseudocode description is
program CalculateMaximumValuebegin
input resistance valueinput tolerance valuedeviation value is resistance value times
tolerance valuemaximum value is resistance value plus deviation valueoutput maximum value
end CalculateMaximumValue18–6 One possible pseudocode description is
program DiodeCheckbegin
apply 5 V to circuitmeasure diode voltage
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ANSWERS ◆ 29
if (diode voltage equals 0.7 V) thenbegin if
print "Diode forward biased"end if
elsebegin else
print "Diode reverse biased"end else
end DiodeCheck
18–7 One possible pseudocode description for the program is
program NewAndImprovedDiodeCheckbegin
apply 5 V to circuitmeasure diode voltageif (diode voltage is less than 1 V) then
begin ifif (diode voltage is 0 V) then
begin ifprint "Diode shorted"
end ifelse
begin elseprint "Diode forward biased"
end elseend if
elsebegin else
if (diode voltage is greater than 4.5 V) thenbegin if
if (diode voltage equals 5 V) thenbegin if
print "Diode open"end if
elsebegin else
print "Diode reverse biased"end else
end ifelse
begin elseprint "Diode bad"
end elseend else
end NewAndImprovedDiodeCheck
18–8 One possible pseudocode description for the program is
program NewAndImprovedCaseDiodeCheckbegin
apply 5 V to circuitmeasure diode voltagecase (diode voltage)
If the measured diode voltage is 2.5 V, the program prints “Diode bad”.
18–9 One possible pseudocode description for the program is
program MixedDiodeCheckbegin
apply 5 V to circuitmeasure diode voltageif (diode voltage is less than 1.0 V)
begin ifif (diode voltage is 0 V)
begin ifset diode condition to 1
end ifelse
begin elseset diode condition to 2
end elseend if
elsebegin else
if (diode voltage is greater than 4.5 V) thenbegin if
if (diode voltage is 5.0 V) thenbegin if
set diode condition to 3end if
elsebegin else
set diode condition to 4else else
end ifelse
begin elseset diode condition to 5
end elseend else
case (diode condition)begin case
1: print "Diode shorted"break
2: print "Diode forward biased"break
3: print "Diode open"break
4: print "Diode reverse biased"break
5: print "Diode bad"break
end caseend MixedDiodeCheck
18–10 The procedure and results using the pseudocode are:
The multiplicand value is set to 4 and the multiplier value is set to 5.
The product value is set to 0.
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ANSWERS ◆ 31
The loop index is set to 1.
The loop index does not exceed 5, so the loop executes.
The product value � product value � multiplicand value, so the product value � 0 � 4 � 4.
The loop index is adjusted by 1 so the loop index � 1 � 1 � 2.
The loop index does not exceed 5, so the loop executes.
The product value � product value � multiplicand value, so the product value � 4 � 4 � 8.
The loop index is adjusted by 1 so the loop index � 2 � 1 � 3.
The loop index does not exceed 5, so the loop executes.
The product value � product value � multiplicand value, so the product value � 8 � 4 � 12.
The loop index is adjusted by 1 so the loop index � 3 � 1 � 4.
The loop index does not exceed 5, so the loop executes.
The product value � product value � multiplicand value, so the product value � 12 � 4 � 16.
The loop index is adjusted by 1 so the loop index � 4 � 1 � 5.
The index does not exceed 5, so the loop executes.
The product value � product value � multiplicand value, so the product value � 16 � 4 � 20.
The loop index is adjusted by 1 so the loop index � 5 � 1 � 6.
The loop index exceeds 5, so the program exits the loop.
The procedure outputs the product value of 20.
18–11 One possible pseudocode description to decrease the voltage across TP1 and TP3 from 0 Vto �1 V in 0.1 V increments and to plot the zener current vs. zener voltage for each voltagesetting is
program Plot1N4732ForwardBiasbegin
set DMM1 function to dc voltmeter modeconnect Port 2A to TP1 and Port 2B to TP2set DMM2 function to dc voltmeter modeconnect Port 3A to TP2 and Port 3B to TP3set dc supply to 0 Vconnect Port 1A to TP3 and Port 1B to TP1for (index = 0) to (index equals -1) step (-0.1)
begin for-to-stepset dc supply value to index valueread resistor voltage value on DMM1zener current value is resistor voltage
value divided by 1.0 kilohmsread zener voltage value on DMM2plot zener current value vs. zener voltage
valueend for-to-step
end Plot1N4732ForwardBias
18–12 A possible problem with the WHILE-DO loop in the pseudocode description in Example18–12 is that system noise or meter resolution will prevent DMM1 from ever readingexactly 0 V. As a result, the program could enter an infinite loop and possibly damage theJFET as VGS continued to increase beyond VGS(off). Although the best solution would be toensure that the test system is well-grounded and shielded from noise, another way to cor-rect this is to modify the WHILE-DO condition to a more practical termination value thatclosely approximates the actual cutoff condition:
while (DMM1 voltage value is greater than 5 mV)begin while-do
increase dc supply 2 by 0.1 Vread voltage value on DMM1
end while-do
This will terminate the WHILE-DO loop when the ID value calculated from the measuredvoltage value first drops below 50 µA.
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32 ◆ ANSWERS
8–13 One possible pseudocode description that uses a REPEAT-UNTIL loop to determine andprint the value of breakover voltage that will fire the SCR into conduction for IG � 0 is
program FindSCRBreakoverValuebegin
set DMM1 function to dc voltmeter modeset DMM2 function to dc voltmeter modeset dc supply 1 to 0 Vset dc supply 2 to 0 Vconnect Port 1A to TP2 and Port 1B to TP3connect Port 2A to TP1 and Port 2B to TP3
read voltage value on DMM2IAK is DMM2 voltage value divided by 100repeat until (IAK is greater than 45 mA)
begin repeat-untilincrease dc supply 2 by 0.1 Vread voltage value on DMM2IAK is DMM2 voltage value divided by 100
end repeat-untilVBR(F) value is DMM2 valueprint VBR(F) value
end FindSCRBreakoverValue
18–14 The pseudocode description in Example 18–14 would require that the polarities of the baseand collector biasing voltages be reversed. The simplest way to do so would be to reverse the connections to the UUT through the test fixture.
program Plot2N3906Curvesbegin
set DMM1 function to dc voltmeter modeset DMM2 function to dc voltmeter modeset dc supply 1 to 0 Vset dc supply 2 to 0 Vconnect Port 1A to TP3 and Port 1B to TP2connect Port 2A to TP3 and Port 2B to TP1for (index1 = 0.7) to (index1 equals 1.0) step (0.05)
begin for-to-stepset dc supply 1 to index1 valueIB value is dc supply voltage value divided
by 5 kilohmsplot label "IB = " and IB valuefor (index2 = 0) to (index2 equals 10) step (1)
begin for-to-stepset dc supply 2 to index2 valueread voltage on DMM2IC value is DMM2 voltage value
divided by 100 ohmsVCE value is index 2 value minus
DMM2 voltage valueplot IC value vs. VCE value
end for-to-stepend for-to-step
end Plot2N3906Curves
18–15 Rewriting the pseudocode consists only of replacing the unconditional branches with thecode to which the program branches. The pseudocode without the unconditional branch in-structions is
program TestInvertingAmplifierbegin
initialize test fixtureprint "Test fixture initialized"
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ANSWERS ◆ 33
NewTestInit:set signal generator offset to 500 mVdcset signal generator ac output to 0 Vppprint "System intialized for dc test"
DCTest:measure and record dc output signalprint "500 mV dc test completed"dc gain value is output signal divided by 500 mVprint "Gain calculated for dc input"
ACTest:set signal generator offset to 0 Vdcset signal generator ac output to 100 mVppapply input test signalmeasure and record peak-to-peak output signalprint "100 mV ac test completed"
CalculateNominalGain:nominal gain value is output signal divided by 100 mVprint "Gain calculated for nominal input"
TestMinimumSignal:set signal generator ac output to 10 mVppmeasure and record peak-to-peak output signalprint "10 mV ac test completed"minimum gain value is output test divided by 10 mVprint "Gain calculated for minimum input"
TestMaximumSignal:set signal generator ac output to 1 Vppmeasure and record peak-to-peak output signalprint "1 V ac test completed"maximum gain value is output signalprint "Gain calculated for maximum input"
AllTestsRun:print "AC test completed"print "Inverting amplifier testing complete"
end TestInvertingAmplifier
18–16 Although the multiple instances of “measure summing amplifier output” could be re-placed with calls to a subroutine MeasureSummingAmplfiierOutput, modifying the pro-gram to do so would not provide any benefit. The overhead to call, execute, and returnfrom the procedure would take more time and require more instructions than the originalprogram requires.
18–17 One possible pseudocode description to replace the subroutines MeasureNominalGain,MeasureMinimumGain, and MeasureMaximumGain with a single subroutineMeasureGain is
program CalculateAmplifierGainsbegin
call ConfigureTestFixture (5.0)print "Test fixture initialized"NewTestInit:set signal generator offset to 500 mVdcset signal generator ac output to 0 Vppprint "System intialized for dc test"
NominalACTest:call MeasureGain(0.05)
MinimumACTest:call MeasureGain(0.5)
MaximumACTest:call MeasureGain(5.0)
AllGainsMeasured:print "AC test completed"print "Inverting amplifier testing complete"
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open all relaysset dc supply 1 to DCSupply1Valueset dc supply 2 to 0.0set dc supply 3 to 0.0
end ConfigureTestFixture
procedure MeasureGain(InputValue)begin
set signal generator offset to 0 Vdcset signal generator ac output to InputValueapply input test signalmeasure and record peak-to-peak output signalnominal gain value is output signal divided by
InputValueprint InputValue and "ac test completed"