Floating-point to fixed-point code conversion with variable trade-off between computational complexity and accuracy loss Alexandru Bârleanu, Vadim Băitoiu and Andrei Stan Technical University “Gh. Asachi”, Iaşi, Romania 15 th International Conference on System Theory, Control and Computing (Joint conference of SINTES15, SACCS11, SIMSIS15) October 14-16, 2011 Sinaia, ROMANIA 1/13
Floating-point to fixed-point code conversion with variable trade-off between computational complexity and accuracy loss. Alexandru Bârleanu, Vadim Băitoiu and Andrei Stan Technical University “ Gh . Asachi ”, Iaşi , Romania. - PowerPoint PPT Presentation
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Floating-point to fixed-point code conversion with variable trade-off between
computational complexity and accuracy loss
Alexandru Bârleanu, Vadim Băitoiu and Andrei Stan
Technical University “Gh. Asachi”, Iaşi, Romania
15th International Conference on System Theory, Control and Computing(Joint conference of SINTES15, SACCS11, SIMSIS15)
October 14-16, 2011Sinaia, ROMANIA
1/13
Motivation
• Embedded microprocessors:– No hardware dedicated to floating-point– Limited processing capabilities
• Emulated floating-point arithmetic:– Unnecessary high accuracy– Long execution time
• Fixed-point code written manually:– Error-prone– Important accuracy loss
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Existing work• For FPGA
– The main problem is fractional word-length optimization– The search space grows exponentially with the number of fixed-point
variables– Search techniques (often sophisticated) are necessary:
• For microcontrollers, C language– Existing solutions:
• Fixed-point format is supplied by the user (in annotations, for example)• Fixed-point format is determined through simulations, taking into consideration for
example some accuracy constraints
– Available integer types types in C: only 16/32/64-bit signed/unsigned– Optimization objectives: accuracy loss, number of (scaling) operations
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Problem formulation
The problem is constructed from practical considerations:• Input – a digital filter:
Target/CompilationProcessor: ARM Cortex-M3Compiler: IAR C/C++ 5.41 for ARM (Kickstart)Optimizations: medium
SQNR loss Time (cycles)For comparison –the floating-point codetakes 3984-4078 cycles
4 dataflows shown from 18 total found
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Implementation insights
• Language: Java SE 1.6• Techniques: OOP, polymorphism• Analitycal estimation of run-time integer intervals,
dataflow complexity, and node error intervals• Dataflows are transformed using Change instances (not
by copying large dataflow portions and modifying them).– Change instances are invertible (apply/undo)– Change instances can be combined in logical AND and OR
Filter properties Type: FIR, IIR (work in progress)Order: 4-80 (FIR)Input interval: [0; 4095], [-4096; 4095], and otherDesign method: random coefficients, Matlab FDATool
Cost function From „low-complexity-low-accuracy” to „high-complexity-high-accuracy”
Code generation From „everything in one expression” (inline) to „every operator variable declared”
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Results12/13
Number of cycles
Speed factor: 3...15(or more if compiler optimizations are applied)
Accuracy loss
SQNR loss:1e-5...1e-1 dB
Floating-point code
Variable trade-offbetween complexity and accuracy
Constant execution time(no jitter – more determinism)
Conclusions
An innovative floating-point to fixed-point conversion method for C language is proposed:
– Very good speed factor is obained (integer code compared with floating-point code).
– Very good accuracy is obtained for FIR filters.– The conversion algorithm is designed to use variable cost functions. It is
possible to specify, for example, that complexity is important and accuracy loss is unimportant when building the integer dataflow.
– The conversion time is very short. This happens because:• Dataflow metrics are estimated analytically• Dataflow nodes have cache information (run-time integer interval, error interval)• The automatic search of dataflows algorithm uses a heuristic to generate as few as