A report on 2 to 1 mux using tg

1

ELECTRONICS CIRCUIT LAB (EEC 752)

REPORT

ON

REALIZATION OF 2:1 MUX USING TG

Submitted for the partial fulfillment of award of the degree of

Bachelor of Technology

Of

Electronics and Communication Engineering

Submitted By

SUMIT KUMAR

1219231105

4th

year ECE, Section B

Under the Guidance of

MR. DHARMENDRA NISHAD

(Asst. Professor)

Deptt. Of ECE

Deptt. Of Electronics and Communication Engineering

G.L. BAJAJ INSTITUTE OF TECHNOLOGY AND MANAGEMENT

Plot No. 2, Knowledge Park III, Gr. Noida

Session: 2015-16

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Deptt.of Electronics and Communication Engineering

G. L. BAJAJ INSTITUTE OF TECHNOLOGY AND MANAGEMENT [Approved by AICTE, Govt. of India & Affiliated to U.P.T.U, Lucknow]

CERTIFICATE

Certified that SUMIT KUMAR have carried out the lab project work presented

in this report entitled “REALIZATION OF 2:1 MUX USING TG” for the

award of Bachelor of Technology in Electronics and Communication

Engineering during the academic session 2015-16 from Uttar Pradesh

Technical University, Lucknow. The project embodies result of the work and

studies carried out by Student himself and the contents of the report do not form

the basis for the award of any other degree to the candidate or to anybody else.

(Mr. Dharmender Nishad) (Mr. DHARMENDRA NISHAD) (Lab Co-ordinator) (Lab Co-ordinator)

(Asst. Professor) (Asst.Professor)

Deptt.of ECE Deptt.of ECE

H. O. D., Deptt.of ECE

Date:

3

ACKNOWLEDGEMENT

I heartily express my gratitude to those who generously helped me in preparing

my report on REALIZATION OF 2:1 MUX USING TG of their knowledge

and experiences.

I would like to thank and pay my obligation to DR. AMIT SEHEGAL, HOD,

ECE DEPTT. I would also like to acknowledge with much appreciation the

crucial role of MR. DHARMENDRA NISHAD (ECE DEPTT.) for her able

guidance, invaluable suggestions, keen interest and her considerable attitude.

I pay special thanks to all my honorable teachers, my parents along with my

classmates who directly or indirectly helped me to accomplish my work.

SUMIT KUMAR

Roll No.: 1219231105

4th

year ECE, Section B

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TABLE OF CONTENTS

CHAPTER NO. TITLE PAGE NO.

TITLE PAGE AND COVER PAGE i

CERTIFICATE ii

ACKNOWLEDGEMENT iii

TABLE OF CONTENTS iv

LIST OF FIGURES v

ABSTRACT 1

1. INTRODUCTION 3 1.1 Y-CHART 6

2. BEHAVIOUR 7

3. STRUCTURE 9

4. SIMULATION 12 4.1 INTRODUCTION TO PSpice 12

4.2 TYPES OF ANALYSIS 14

4.3 LIMITATION 16

4.4 SIMULATION OF TRANSMISSION GATE 17

4.5 SIMULATION OF CMOS INVERTER 18

4.6 SIMULATION OF 2:1 MUX 20

5. CONCLUSION 23

REFERENCES 27

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LIST OF FIGURES

FIGURE NO. TITLE PAGE NO.

1.2:1 MUX ……………………………………………………………01

2. 2:1 MUX TRUTH TABLE….….…………………………………..01

3. 4:1 MUX AND 8:1 MUX..………………………………………....04

4. BASIC DESIGN STEPS IN VLSI ………………………………...05

5. Y-CHART…………………... …………………..………................06

6. 8:1 MUX…………………………………………………………....07

7. TRUTH TABLE OF 8:1 MUX………..……………………..…......08

8. IMPLEMENTATION OF 8:1 MUX USING 2:1 MUX..........…......09

9. IMPLEMANTATION OF 2:1 MUX USING TG ……………........09

10. TRANSMISSION GATE SYMBOL……………………..............10

11. LAYOUT OF TRANSMISSION GATE….....................................10

12. INVERTER…………………………………………….. …..........11

13. ORCAD CAPTURE LITE EDITION……………………………15

14. SIMULATION CIRCUIT OF TG ON PSpice…………………...16

15. SIMULATION OUTPUT OF TG ON PSpice…………………...17

16. CIRCUIT OF INVERTER…………………………………….....17

17. SIMULATION CIRCUIT OF INVERTER ON PSpice…………18

18. SIMULATION OUTPUT OF INVERTER ON PSpice…………18

19. Circuit and Truth Table of 2:1 MUX……………………………..19

20. SIMULATION CIRCUIT OF 2:1 MUX ON PSpice………….....20

21. SIMULATION OUTPUT OF 2:1 MUX USING STEP INPUT…21

22. SIMULATION OUTPUT OF 2:1 MUX USING sine INPUT…...21

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ABSTRACT

The metal–oxide–semiconductor field-effect transistor (MOSFET) is a type of

transistor used for amplifying or switching electronic signals. The main

advantage of a MOSFET over a regular transistor is that it requires very little

current to turn on (less than 1mA), while delivering a much higher current to a

load (10 to 50A or more). Transistors are used as switches to pass logic levels

between nodes of a circuit, instead of as switches connected directly to supply

voltages. This reduces the number of active devices, but has the disadvantage

that the difference of the voltage between high and low logic levels decreases at

each stage. Each transistor in series is less saturated at its output than at its

input. If several devices are chained in series in a logic path, a conventionally

constructed gate may be required to restore the signal voltage to the full value.

By contrast, conventional CMOS logic switches transistors so the output

connects to one of the power supply rails, so logic voltage levels in a sequential

chain do not decrease.

A transmission gate is similar to a relay that can conduct in both directions or

block by a control signal with almost any voltage potential. CMOS transmission

gate consists of one nMOS and one pMOS transistor, connected in parallel. The

gate voltages applied to these two transistors are also set to be complementary

signals. As such, the CMOS TG operates as a bidirectional switch between the

nodes A and B which is controlled by signal C. If the control signal C is logic-

high, i.e., equal to VDD, then both transistors are turned on and provide a low-

resistance current path between the nodes A and B. If, on the other hand, the

control signal C is low, then both transistors will be off, and the path between

the nodes A and B will be an open circuit. This condition is also called the high-

impedance state.

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Pass transistor logic often uses fewer transistors, runs faster, and requires less

power than the same function implemented with the same transistors in fully

complementary CMOS logic. The designers of the Z80 and many other chips

save a few transistors by implementing the XOR using pass-transistor logic

rather than simple gates.

Transmission Gate Applications are Mux XOR D Latch D Flip Flop.

MULTIPLEXER CIRCUIT is a circuit that generates an output that exactly

reflects state of one of a number of data inputs, based on value of one or more

control inputs is called “multiplexer”. A multiplexer with two data inputs is

referred as “2-to-1 or 2:1” multiplexer. A multiplexer of 2n inputs has n select

lines, which are used to select which input line to send to the output.

Multiplexers are mainly used to increase the amount of data that can be sent

over the network within a certain amount of time and bandwidth. A multiplexer

is also called a data selector. An electronic multiplexer makes it possible for

several signals to share one device or resource, for example one A/D converter

or one communication line, instead of having one device per input signal.

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CHAPTER 1

INTRODUCTION

In principle, a transmission gate made up of two field effect transistors, in

which - in contrast to traditional discrete field effect transistors - the substrate

terminal (Bulk) is not connected internally to the source terminal. The two

transistors, an n-channel MOSFET and a p-channel MOSFET are connected in

parallel with this, however, only the drain and source terminals of the two

transistors are connected together. Their gate terminals are connected to each

other via a NOT gate (inverter), to form the control terminal.

Two variants of the "bow tie" symbol commonly used to represent a

transmission gate in circuit diagrams.

As with discrete transistors, the substrate terminal is connected to the source

connection, so there is a transistor to the parallel diode (body diode), whereby

the transistor passes backwards. However, since a transmission gate must block

flow in either direction, the substrate terminals are connected to the respective

supply voltage potential in order to ensure that the substrate diode is always

operated in the reverse direction. The substrate terminal of the p-channel

MOSFET is thus connected to the positive supply voltage potential and the

substrate terminal of the n-channel MOSFET connected to the negative supply

voltage potential.

In digital circuit design, the selector wires are of digital value. In the case of a

2-to-1 multiplexer, a logic value of 0 would connect to the output while a

logic value of 1 would connect to the output. In larger multiplexers, the

number of selector pins is equal to where n is the number of inputs. For

example, 9 to 16 inputs would require no fewer than 4 selector pins and 17 to

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32 inputs would require no fewer than 5 selector pins. The binary value

expressed on these selector pins determines the selected input pin.

A 2-to-1 multiplexer has a Boolean equation where and are two inputs is

the selector input and is output.

Fig.1 2:1 MUX Fig.2 2:1 MUX TRUTH TABLE

A multiplexer is a combinational circuit that selects binary information from

one of the many input lines and directs it to a single output line. Therefore,

apart from the input lines and the output line, selection lines are used that

selects a particular input line. The multiplexer is basically a data selector

analogous to an electronic switch that selects one of the multiple sources.

Fig.3 4:1 and 8:1 MUX

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Here, 4:1 and 8:1 MUX have been shown, in 4:1 MUX there are 2 select lines

and 8:1 MUX have 3 select lines i.e. MUX have select lines where n

are the input lines present in MUX.

Designing of any Electronic Circuit goes through following steps:

Fig.4 BASIC DESIGN STEPS IN VLSI

This is the top down approach in which problem is divided from sub steps

simplifying the problem with each step and with each step more and more

information revealed by the method about the problem. Above is the Design

Flow diagram help in designing the Digital circuits. A good representation of

Design flow can be achieved through Y-Chart also:

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1.1 Y- CHART:

Fig.5 Y-CHART

Designing of 8:1 MUX can be approached through:

Now we will describe the Designing methods step by step:

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CHAPTER 2

BEHAVIOR

8:1 multiplexer is a combination circuit which can be describe in digital form

using Boolean expression and Truth Table.

Fig.6 8:1 MUX

Here, are inputs to the MUX and are the 3 select

lines of the MUX and is the output of the MUX.

8:1 multiplexer is a combination circuit which can be describe in digital form

using Boolean expression and Truth Table.

0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

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0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

Fig.7 TRUTH TABLE OF 8:1 MUX

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CHAPTER 3

STRUCTURE

Structure level is the most important level in designing of the Digital circuit, it

is recommended to design as much possible at this level, helps in subsequent

designing of levels.

8:1 multiplexer can be implemented using 2:1 MUX.

Fig.8 IMPLEMENTATION OF 8:1 USING 2:1

2:1 Mux can be implemented using Transmission Gate and a inverter logic:

Fig.9 IMPLEMANTATION OF 2:1 MUX USING TRANSMISSION GATE

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Transmission Gate and Inverter can be implemented through Transistor:

Fig.10 TRANSMISSION GATE

Fig.11 LAYOUT OF TRANSMISSION GATE

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This is the CMOS Transmission gate having A as input and B as output using

two MOSFET and act as a switch controlled by C signal.

Fig12. INVERTER

This is the Inverter Logic which inverts the input signal. This is also a CMOS

circuit.

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CHAPTER 4

SIMULATION

Simulation can be done using the PSpice OrCAD capture Software suit. We

will simulate the each step of the MUX i.e. first we simulate transmission gate

then inverter then 2:1 Mux using transmission gate and at last we will simulate

the 8:1 MUX using transmission gate.

For simulation, in simulation setting we used time domain (Transient) as

analysis type

4.1 INTRODUCTION TO PSPICE

SPICE (Simulated Program with Integrated Circuit Emphasis) is a general

purpose software that simulates different circuits and can perform various

analysis of electrical and electronic circuits including time domain response,

small signal frequency response, total power dissipation, determination of nodal

voltages and branch current in a circuit, transient analysis, determination of

operating point of transistors, determinations of transfer functions etc. This

software is designed in such a way so that it can simulate different circuit

operations involving transistors, operational amplifiers (op – amp) etc. and

contains models for circuit elements (passive as well as active).

SPICE was first developed in the University of California, Berkeley, USA in

the early 1970s. Subsequently an improved version SPICE 2 was available in

the mid1970s especially to support computer aided designs. In due course of

time this program (SPICE 2 has become so versatile in the industry that people

used to call, this program itself as SPICE. PSpice is also the member of SPICE

family and it is a commercial software product based on SPICE algorithm. It is

useful for simulating all types of circuits in a variety of applications. In both

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SPICE and PSpice, the circuit is described by statements those are stored in a

file (namely Circuit File).

The SPICE simulator is assigned to read this file to run the simulation. In

PSpice, the statements are self – contained and independent; obviously they do

not interact with each other. The statements are also easy to learn and use.

PSpice includes additional features that make the program more flexible and

user friendly. Notably among other features is the graphics post processor probe

which acts like a software oscilloscope and is capable of exhibiting various

waveforms. PSpice has become one of the most popular circuit simulation

programs. In order to draw the circuit and create a schematic file, schematic

editor can be used in the PSpice simulation.

PSpice is a part of larger software package called the Design Lab, originally

developed by MicroSim Corporation as the Design Centre. It is now marketed

by OrCAD.

PSpice was the first version of UC Berkeley SPICE available on a PC, having

been released in January 1984 to run on the original IBM PC. This initial

version ran from two 360 KB floppy disks and later included a waveform

viewer and analyser program called Probe. Subsequent versions improved on

performance and moved to DEC/VAX minicomputers, Sun workstations, Apple

Macintosh, and Microsoft Windows.

Version 3.06 was released in 1988, also came on two 5.25 floppy discs, and had

a "Student Version" available which would allow a maximum of up to ten

transistors to be inserted.

4.2 TYPES OF ANALYSIS

The type of simulation performed by PSpice depends on the source

specifications and control statements. The analyses usually executed in PSpice

are listed below.

DC Analysis

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It is used for circuits with time–invariant sources (e.g. steady-state dc sources).

It calculates all nodal voltages and branch currents over a range of values. The

types of dc sweep analyses and their corresponding. (Dot) commands are

described below:

• Linear sweep: .DC [LIN] <sweep variable name> <start value> <end

value> <increment value>

• Logarithmic sweep: .DC <DEC|OCT> <sweep variable name> <start

value> <end value> <points value>

• Sweep over List of values: .DC <sweep variable name> LIST <value>*

All these sweep types can also be nested by adding another set of parameter

name and values at the end.

Transient Analysis

It is used for circuits with time variant sources (e.g., sinusoidal

sources/switched dc sources). It calculates all nodes voltages and branch

currents over a time interval and their instantaneous values are the outputs. The

corresponding. (Dot) command is as follows:

.TRAN <print step value> <final time value> [no-print value [step ceiling

value]] [SKIPBP]

AC Analysis

It is used for small signal analysis of circuits with sources of varying

frequencies. It calculates the magnitudes and phase angles of all nodal voltages

and branch currents over a range of frequencies. The corresponding. (dot)

command is as follows: .

AC <LIN|DEC|OCT> <Number of points> <Start frequency value> <End

frequency value>

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Fig13. ORCAD CAPTURE LITE EDITION

4.3 LIMITATIONS

PSpice has the following limitations:

• The student (free) version of PSpice is restricted to analyses circuits up to

10 transistors only.

• PSpice does not support an iterative method of solution.

• The circuit cannot be analyzed for various component values without

editing program statements. Hence, the program is not interactive.

• The input impedance cannot be determined directly without running the

graphic post processor, Probe.

• The output impedance of a circuit cannot be printed or plotted directly.

• Distortion analysis is not possible.

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To realize the circuit we can approach to two methods one is making library file

of transmission gate and inverter second by simply adjoining transistor as per

the circuit diagram.

4.4 SIMULATION OF TRANSMISSION GATE-:

We can simulate the circuit of transmission gate by having the circuit:

Fig14. SIMULATION CIRCUIT OF TG ON PSpice

Here, we have connected nMOS and pMOS parallel to each other control signal

is applied to the gate of MOS. Input is at Drain and Source is our output.

Whenever the control signal is at low the output will be high and whenever

control signal is high the output will be low, acting as a switch.

Simulation output is shown here:

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Fig15. SIMULATION OUTPUT OF TG ON PSpice

Red line is showing the Control signal and Green line is output. Here, +5 is high

and 0 is low.

4.5 SIMULATION OF CMOS INVERTER:

CMOS Inverter can be simulating by connecting two transistors in series, pair

of switches are operated in a complementary fashion by the input voltage.

Fig16. CIRCUIT OF INVERTER

This circuit converts the high level logic of input into low level of output and

low level input to high level output.

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Fig17. SIMULATION CIRCUIT DIAGRAM OF INVERTER ON PSpice

Fig18. SIMULATION CIRCUIT DIAGRAM OF INVERTER ON PSpice

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4.6 SIMULATION OF 2:1 MUX:

Simulation of 2:1 can be simulating in PSpice using inverter and transmission

gate. We require two transmission gate and one inverter circuit. The structural

level of circuit can be representing like:

Fig.19 Circuit and Truth Table of 2:1 MUX

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PSpice circuit model can be shown like:

Fig20. SIMULATION CIRCUIT OF 2:1 MUX ON PSpice

Input and select line for the 2:1 MUX input is:

Fig21. SIMULATION OUTPUT OF 2:1 MUX ON PSpice USING STEP INPUT

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Output for the sine wave input:

Fig22.SIMULATION OUTPUT OF 2:1 MUX ON PSpice USING sine wave INPUT

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CHAPTER 5

CONCLUSION

In this paper, different multiplexers have been implemented, simulated,

analyzed and compared. Using driving capability technique this problem can be

minimized. The conventional CMOS style based designs have great output

voltage level and less noise margin. Though they suffer higher delay and

consume large area these designs can be considered for accurate and reliable

output. Transmission gate based designs consumes high power. But the main

drawback is that there is no selection pin, so these designs are not appropriate

for multiplexing where both the inputs may have identical value at any instant.

This study was made possible with the help of the Simulation and VLSI LAB.

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REFRENCES

http://iosrjournals.org/iosr-jvlsi/papers/vol3-issue6/D0361727.pdf

http://webpages.eng.wayne.edu/cadence/ECE6570/doc/lect3_1.pdf

http://ir.lib.cyut.edu.tw:8080/bitstream/310901800/9952/1/10-6.pdf

http://research.ijcaonline.org/volume99/number5/pxc3897911.pdf

https://courseware.ee.calpoly.edu/~dbraun/courses/ee307/W02/02_03/02_03

.html

http://iitg.vlab.co.in/?sub=59&brch=165&sim=904&cnt=1

http://www.ijser.org/paper/A-New-High-Speed-Low-Power-12-Transistor-

Full-Adder-Design-with-GDI-Technique.html

http://www.cmccord.co.uk/Downloads/4thYear/VLSI.pdf

http://gatedesignsnorit.blogspot.in/2015/06/design-xor-gate-using-mux.html

http://gatedesignsnorit.blogspot.in/2015/05/design-nand-gate-using-

mux.html