230907SMDK6410 Users Manual Rev10

1

Confidential Proprietary of Samsung Electronics Co., Ltd Copyright © 2008 Samsung Electronics, Inc. All Rights Reserved

User’s Manual (SMDK6410 Rev0.2)

S3C6410X RISC Microprocessor

July 24, 2008

REV 1.0

SMDK6410_USER’S MANUAL_REV 1.00

Important Notice

The information in this publication has been carefully checked and is believed to be entirely accurate at the time of publication. Samsung assumes no responsibility, however, for possible errors or omissions, or for any consequences resulting from the use of the information contained herein.

Samsung reserves the right to make changes in its products or product specifications with the intent to improve function or design at any time and without notice and is not required to update this documentation to reflect such changes.

This publication does not convey to a purchaser of semiconductor devices described herein any license under the patent rights of Samsung or others.

Samsung makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Samsung assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation any consequential or incidental damages.

"Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by the customer's technical experts.

Samsung products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, for other applications intended to support or sustain life, or for any other application in which the failure of the Samsung product could create a situation where personal injury or death may occur.

Should the Buyer purchase or use a Samsung product for any such unintended or unauthorized application, the Buyer shall indemnify and hold Samsung and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, expenses, and reasonable attorney fees arising out of, either directly or indirectly, any claim of personal injury or death that may be associated with such unintended or unauthorized use, even if such claim alleges that Samsung was negligent regarding the design or manufacture of said product

S3C6410X RISC Microprocessor SMDK6410 User’s manual, Revision 1.00

Copyright © 2008 Samsung Electronics Co.,Ltd.

All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electric or mechanical, by photocopying, recording, or otherwise, without the prior written consent of Samsung Electronics Co.,Ltd.

Samsung Electronics Co., Ltd. San #24 Nongseo-Dong, Giheung-Gu Yongin-City Gyeonggi-Do, Korea 446-711

Home Page: http://www.samsungsemi.com/ E-Mail: [email protected]

Printed in the Republic of Korea


Revision History Revision No Description of Change Refer to Author(s) Date

0.00 - Initial Release (SMDK6410 Rev0.1) - O. P. Shin May 16, 2008 0.10 - Second Release (SMDK6410 Rev0.2) - O. P. Shin June 18, 2008 1.00 - Public Release - - July 24, 2008


Table of contents

SYSTEM OVERVIEW ................................................................................................................1

SMDK6410 OVERVIEW.............................................................................................................2

Features ...................................................................................................................................................................................... 3

CIRCUIT DESCRIPTION ....................................................................................................................................................... 4

SMDK6410 CPU BOARD REAL VIEW................................................................................................................................. 7

SMDK6410 BASE BOARD REAL VIEW .............................................................................................................................. 9

SMDK6410 SYSTEM CONFIGURATIONS..............................................................................12

Clock Source SELECTION .................................................................................................................................................... 13

Boot Mode SELECTION ........................................................................................................................................................ 14 1. Muxed OneNAND Boot ............................................................................................................................................... 14 2. AMD NOR/SROM Boot .............................................................................................................................................. 14 3. Modem Boot ................................................................................................................................................................. 15 4. Internal ROM Boot...................................................................................................................................................... 15

Configuration switch description in CPU Board .................................................................................................................. 16 CFG1: FOR USING CONTROLABLE REGULATOR .................................................................................................. 16 CFG4: FOR USING NAND/ONENAND........................................................................................................................... 18 CFG5: FOR USING MMC ................................................................................................................................................. 18 CFG6: FOR USING IIS 5.1 CHANNEL ........................................................................................................................... 19

Configuration switch description in BASE Board ................................................................................................................ 20 CFGB1: SROM BANK0 SELECTOR ............................................................................................................................... 20 CFGB2: SROM BANK1 SELECTOR ............................................................................................................................... 20 CFGB3: SROM BANK2 SELECTOR ............................................................................................................................... 20 CFGB4: SROM BANK3 SELECTOR ............................................................................................................................... 21 CFGB5: SROM BANK4 SELECTOR ............................................................................................................................... 21 CFGB6: SROM BANK5 SELECTOR ............................................................................................................................... 21 CFGB7: CF CARD TRANSFER MODE SELECTOR.................................................................................................... 22 CFG1: AUDIO CONNECTOR SELECTOR.................................................................................................................... 22 CFG2: AUDIO PORT SELECTOR................................................................................................................................... 23 CFG3: COM PORT2 CONTROL...................................................................................................................................... 24 CFG4: KEYPAD CONTROL............................................................................................................................................. 24 CFG5: WM8580 MASTER CLOCK SELECTOR........................................................................................................... 25 CFG6: ETHERNET SELECTOR ...................................................................................................................................... 25 CFG7: NAND FLASH WRITE PROTECTION SELECTOR........................................................................................ 25

JUMPER SETTING CONFIGURATION ............................................................................................................................ 26 J1: SELECT DEBUGER (CPU BOARD) ........................................................................................................................ 26


CONNECTORS........................................................................................................................27

CPU BOARD............................................................................................................................................................................ 27 JTAG..................................................................................................................................................................................... 27 USB........................................................................................................................................................................................ 28 SPI ......................................................................................................................................................................................... 28 FPC cable for MIPI HSI ..................................................................................................................................................... 29 SD host (Ver2.0) SD/MMC interface ................................................................................................................................. 30 EXTERNAL ONE-NAND connector ................................................................................................................................. 32 Camera Interface Connector .............................................................................................................................................. 33 ADC connector ..................................................................................................................................................................... 33 PMIC connector ................................................................................................................................................................... 34

BASE BOARD.......................................................................................................................................................................... 35 COMPOSITE & S-VIDEO Connector .............................................................................................................................. 35 LINE IN, MIC IN & SPEAKER OUT connector ............................................................................................................. 36 ETHERNET connector ....................................................................................................................................................... 37 UART interface .................................................................................................................................................................... 38 xD Picture Card Connector ................................................................................................................................................ 38 CF Card Slot ........................................................................................................................................................................ 39 PWM connector ................................................................................................................................................................... 39

external connector interface.................................................................................................................................................... 40 ROM BUS Interface ............................................................................................................................................................ 40 HOST/MODEM INTERFACE........................................................................................................................................... 42 EXTERNAL KEYPAD CONNECTOR ............................................................................................................................ 44 MODULE1 INTERFACE CONNECTOR (FOR GPS DAUGHTER BOARD) ............................................................ 46 MODULE2 INTERFACE CONNECTOR (FOR MOBILE TV, HD RADIO DAUGHTER BOARD)....................... 48 MODULE3 INTERFACE CONNECTOR (FOR BLUETOOTH DAUGHTER BOARD) .......................................... 50 MODULE4 INTERFACE CONNECTOR (FOR AUDIO DAUGHTER BOARD) ...................................................... 52 MODULE5 INTERFACE CONNECTOR (FOR LCD BOARD) (with Touch Screen)................................................ 54

SMDK SCHEMATIC REVISION POINTS ................................................................................57

REVISION POINTS TABLE ................................................................................................................................................. 57

SMDK SCHEMATIC.................................................................................................................58


FIGURE INDEX

Figure 1 SMDK6410 Function Diagram.......................................................................................................2

Figure 2 SMDK6410 Power Plane ...............................................................................................................5

Figure 3 SMDK6410 Board Diagram ...........................................................................................................6

Figure 4 SMDK6410 CPU Board Real View................................................................................................8

Figure 5 SMDK6410 BASE Board Real View............................................................................................11

Figure 6 JTAG Connector ..........................................................................................................................27

Figure 7 Dual USB ports & OTG port.........................................................................................................28

Figure 8 SPI Socket (IEEE1394 type)........................................................................................................28

Figure 9 FPC cable connector ...................................................................................................................29

Figure 10 SD card Socket ..........................................................................................................................31

Figure 11 External ONE-NAND B’d Connector .........................................................................................32

Figure 12 Camera Interface Connector .....................................................................................................33

Figure 13 ADC Connector..........................................................................................................................33

Figure 14 PMIC Connector ........................................................................................................................34

Figure 15 Composite & S-VIDEO Connector.............................................................................................35

Figure 16 Audio Line In, Mic In & Speaker Out Connector........................................................................36

Figure 17 Ethernet Socket .........................................................................................................................37

Figure 18 UART Sockets ...........................................................................................................................38

Figure 19 xD Picture Card Socket .............................................................................................................38

Figure 20 CF/ATA Interface Connector .....................................................................................................39

Figure 21 PWM out pins.............................................................................................................................39

Figure 22 External ROM Bus Connector ...................................................................................................40

Figure 23 Host/Modem Interface Connector..............................................................................................42

Figure 24 External Keypad Connector.......................................................................................................44

Figure 25 External Qwerty Keypad Connector ..........................................................................................45

Figure 26 Module1 Connector ...................................................................................................................46





Figure 30 Module5 TFT LCD Connector (4.8”)..........................................................................................55


1

ABOUT SMDK6410 BOARD

SMDK6410 CPU and Base board revision number.

CPU Board Version Rev 0.2 Base Board Version Rev 0.2 LCD Board Version Rev 0.1

SYSTEM OVERVIEW SMDK6410 (6410 Development Kit) is a platform for code development of SAMSUNG's S3C6410X 16/32-bit RISC microcontroller (ARM1176JZF-S). S3C6410X is used in hand-held devices and general applications.

The S3C6410X is a 16/32-bit RISC microprocessor, which is designed to provide a cost-effective, low-power capabilities, high performance Application Processor solution for mobile phones and general applications. To provide optimized H/W performance for the 2.5G & 3G communication services, the S3C6410 adopts 64/32-bit internal bus architecture. The 64/32-bit internal bus architecture is composed of AXI, AHB and APB buses. It also includes many powerful hardware accelerators for tasks such as motion video processing, audio processing, 2D graphics, display manipulation and scaling. An integrated Multi Format Codec (MFC) supports encoding and decoding of MPEG4/H.263/H.264 and decoding of VC1. This H/W Encoder/Decoder supports real-time video conferencing and TV out for both NTSC and PAL mode. Graphic 3D (hereinafter 3D Engine) is 3D Graphics Hardware Accelerator which can accelerate OpenGL ES 1.1 & 2.0 rendering. This 3D Engine includes two programmable shaders: one vertex shader and one pixel shader. The S3C6410 has an optimized interface to external memory. This optimized interface to external memory is capable of sustaining the high memory bandwidths required in high-end communication services. The memory system has dual external memory ports, DRAM and Flash/ROM/DRAM port. The DRAM port can be configured to support mobile DDR, DDR, mobile SDRAM and SDRAM. The Flash/ROM/DRAM port supports NOR-Flash, NAND-Flash, OneNAND, CF, ROM type external memory and mobile DDR, DDR, mobile SDRAM and SDRAM. To reduce total system cost and enhance overall functionality, the S3C6410 includes many hardware peripherals such as a Camera Interface, TFT 24-bit true color LCD controller, System Manager (power management & etc.), 4-channel UART, 32-channel DMA, 4-channel Timers, General Purpose I/O Ports, I2S-Bus interface, I2C-BUS interface, USB Host, USB OTG Device operating at high speed (480Mbps), 3-channel SD/MMC Host Controller and PLLs for clock generation. The ARM subsystem is based on the ARM1176JZF-S core. It includes separate 16KB Instruction and 16KB data caches, 16KB Instruction and 16KB Data TCM. It also includes a full MMU to handle virtual memory management. The ARM1176JZF-S is a single chip MCU, which includes support for JAVA acceleration. The ARM1176JZF-S includes a dedicated vector floating point coprocessor allowing efficient implementation of various encryption schemes as well as high quality 3D graphics applications. The S3C6410X adopts the de-facto standard AMBA bus architecture. These powerful, industry standard features allow the S3C6410X to support many of the industry standard Operating Systems.

The SMDK6410 consists of S3C6410X, bootable (NAND, OneNAND, NOR FLASH), LCD interface, two serial communication ports, configuration switches, JTAG interface, status LEDs and etc.


2

SMDK6410 OVERVIEW The SMDK6410 (6410 Development Kit) highlights the basic system-based hardware design which uses the S3C6410X. It can evaluate the basic operations of the S3C6410X and assist in developing codes.

SMDK6410 is manufactured by MERITECH Co., Ltd and company website is www.mcukorea.com

Multimedia AccelerationCamera I/F

Multi Format CODEC(H.264/MPEG4/VC1)

NTSC, PAL TV out(with Image Enhancement)

JPEG

2D Graphics

3D Graphics

Memory Subsystem

ARM Core

ARM1176JZF-S

I/D-Cache 16KBI/D-TCM 16KB

533/667MHz @ TBD V

System PeripheralRTC

PLL x 3

Timer w/ PWM

Watch-Dog Timer

DMA(32 ch)

Keypad (8 x 8)

ConnectivityI2S

I2C x 2

UART x 4

GPIO

IrDA v1.1

SPI (Full Duplex)

HIS (Modem I/F)

USB OTG 2.0

USB Host 1.1

HS-MMC/SD

AC97 / PCM Audio I/F

SRAM/ROM/NOR/OneNAND

Mobile SDRAM

NAND Flash

Mobile DDR SDRAM

PowerManagement

Normal, IdleStop, Sleep

TFT LCDController

Resolution typically 800x480

Color-TFT LCD

X64 / 32 Multi – Layer AHB / AXI Bus

Figure 1 SMDK6410 Function Diagram


3

FEATURES

The features of SMDK6410 include:

- S3C6410X : 16/32 bit RISC microcontroller, ARM1176JZF-S - X-tal operation or oscillator - Boot Device : AMD 8Mbit 1EA (support halfword size boot ROM)

SAMSUNG NAND flash 1EA (with Socket) SAMSUNG OneNAND 1EA (External Board Option) SAMSUNG 8Mbit SRAM 1EA Internal ROM Modem Boot (External Connector)

- SDRAM : Memory Port0: None Memory Port1: 128MB mDDR (64MB x 2, K4X51163)

- JTAG port - TFT LCD & Touch panel interface - ADC interface - TV Out interface (S-Video, Composite) - USB Host , USB OTG 2.0 interface - MMC interface (Socket x 2) - SPI interface - 2 port UART interface - IIS/AC97/PCM Interface : WM9713, WM8580 - Camera Interface - Ethernet Interface : 10/100Mbps - CF/ATA interface - Keypad interface - Module Connector (M1 ~ M5)

M1 (Module1): For GPS Daughter Board (UART0, SPI0) SMC673: Samsung GPD14B01 (SiRFSTAR III GSD3) (Optional)

M2 (Module2): For Mobile TV Daughter Board (SPI1, IIC) or For HD Radio (SPI1, IIS for Module4) Mobile TV: Samsung S3C4F31 (TBD, Optional) HD Radio: SiPORT SD1010 (TBD, Optional) , Samsung (TBD, Optional)

M3 (Module3): For Bluetooth Daughter Board (UART1, PCM for PMIC Audio Codec) Bluetooth: Atheros (TBD, Optional)

M4 (Module4): For Audio Daughter Board (AC97, IIS, IIC) Audio: Wolfson WM8990 (Optional)

M5 (Module5): For LCD Module LCD: Samsung WVGA 4.8” (Default)

PMIC (200-FBGA Connector) Samsung S5M8750 Board (Optional): with Audio Codec Dialog DA9050 Board (Optional): with Audio Codec Wolfson WM8350 Board (Optional): with Audio Codec


4

CIRCUIT DESCRIPTION

The SMDK6410 is designed to test S3C6410 and develop software while hardware is being developed. Figure 3 highlights the SMDK6410's block diagram.

POWER SUPPLY SMDK6410 is operated by 1.2V for Internal, 1.8V for Memory and 3.3V for Input/Output pad and several peripherals. SMDK6410 is supplied by 5V/3A DC Adaptor Power. The SMDK6410 has distributed power plane, with power going separately to the MCU and the main power plane. Due to this specific reason, power jumpers including JP01~JP27 on the CPU board, JP1~JP3 on the base board are inserted.

JP1

Connector (JB1, JB2)

VDD3.3V

VDD_ext

Regulator

RegulatorFET

(Switch)

DC-Adapter(5V/3A)Supply

B_PWR_5V

VDD_EXHI

VDD_18V

JP2

Q3

U13

Module Connector

M1 ~ 5

JP3

Bead AVDD_ext5V

B_PWR_5V

FET(Switch)

Q1

VDD_CF

RegulatorU34

VDD_Ethernet

VDD3.3V

(1.8V)

(1.8V)

(3.3V)

(3.3V)

(3.3V)

U45

FB3

BeadFB1

AVDD_ext

(3.3V)(5V)

JACK11

PVCCAUX1 PVCCM3BTPVCCM2MTV

Module Connector

M1

Module Connector

M2

Module Connector

M3

Base Board Power Plane


5

Figure 2 SMDK6410 Power Plane


6

Figure 3 SMDK6410 Board Diagram


7

SMDK6410 CPU BOARD REAL VIEW

(Top View)

JTAG USB USB OTG SPI

CFG6

FPC cable

SD/MMC

CFG3

MMC - MOVINAND

CFG4

CFG5

CFG1

ONE-NAND

CFG2

SW5

CameraI/F

Batt. Con.

DC Jack


8

(Bottom View)

Figure 4 SMDK6410 CPU Board Real View

PMIC Connector 200-FBGA


9

SMDK6410 BASE BOARD REAL VIEW

(SMDK6410 CPU/Base/LCD Board)

LCD Module

Base Board

CPU Board


10

(Base Top View)

CFG2

CFG4

CFGB6

CFGB5

CFGB4

CFGB3

CFGB2

CFGB1

CFGB7

EXT ROM BUS LINE IN

MIC IN

5.1ch SPK OUT

MODEM I/F

xD card

PWM

CFG5

CFG1

CFG3

Module 2 Connector

Module 1 Connector

Module 4 Connector

Module 3 Connector

Module 5 Connector

CFG6

JOG Button

IrDA

DC Jack

CFG7 NAND Socket

NOR Socket


11

(Base Bottom View)

Figure 5 SMDK6410 BASE Board Real View

COMPOSITE

S-VIDEO

UART0

UART1/2/3

Ext._Keypad I/F

Ext. Qwerty KeyPad I/F

Ethernet 100Mbps

Power On Switch

Ethernet 10Mbps

CF/ATA I/F


12

SMDK6410 SYSTEM CONFIGURATIONS

Perform the following steps to use SMDK6410 board:

1. Set the Jumper J1 on CPU board

Please refer to ‘JUMPER SETTING CONFIGURATION’ on page 26

2. Select the Clock source

Please refer to ‘CLOCK SOURCE SELECTION’ , on page 13

3. Set the Regulator mode (Fixed or Controllable voltage , VDD_ARM & VDD_INT)

Please refer to ‘CONFIGURATION SWITCH DESCRIPTION IN CPU BOARD CFG1’ , on page 16

4. Select the Boot mode and set by configuration switches ( There are 5 boot modes)

Please refer to ‘BOOT MODE SELECTION’ , on page 14

5. Set the each IP which you want to use by CPU and Base boards configuration switches

- For MMC

Please refer to ‘CONFIGURATION SWITCH DESCRIPTION IN CPU BOARD’ , on page 18

- For CF CARD, LCD, Audio Controller, Audio Port(IIS,AC97,PCM), UART, IrDA, KEYPAD, Host I/F

Please refer to ‘CONFIGURATION SWITCH DESCRIPTION IN BASE BOARD’ , on page 20

6. Check the Connector Please refer to ‘CONNECTORS’ , on page 27

- JTAG, USB, HS-SPI, MIPI HSI, SD/MMC, External MMC & MOVI-NAND & CF-ATA, External OneNAND

- Composite & S-video, Line in/ MIC in/ Speaker out, Ethernet, UART, Camera I/F, ADC, MMC, xD, PWM, External SPI, TFT LCD, Touch screen, External Rom bus, External Modem I/F, External LCD, External KEYPAD, Module 1 ~ 5.

Configuration Switch (DIP Switch)

1 ――→

2 ――→

3 ――→

4 ――→

Off ――→On


13

CLOCK SOURCE SELECTION

EXTCLK or X-TAL can be selected for the S3C6410 system clock by setting the XOM[0] values.

The Clock Source selection must be X-tal Clock (CFG3[1] on CPU Board).

Description CFG3[1] (XOM[0])

External Oscillator Clock ON

X-tal Clock OFF

BASECPU


14

BOOT MODE SELECTION

1. Muxed OneNAND Boot

A. Set CFG3 on CPU Board, Select OneNAND

B. Set CFG4 on CPU Board, Select OneNAND

C. SMDK6410 support external OneNAND Board, Connect it on CON12 connecter on CPU Board

Note. CFG3[6] must be set as “OFF” to use OneNAND

CFG3[6:2] Description

[6] [5] [4] [3] [2]

OneNAND (used External OneNAND B’d) OFF OFF ON ON OFF

CFG4 Description

[4] [3] [2] [1]

OneNAND(CS2) ON ON OFF OFF

2. AMD NOR/SROM Boot

A. Set CFG3 on CPU Board, Select Data width

B. Set CFGB1 on Base Board, Select NOR flash


[6] [5] [4] [3] [2]

NOR Boot ( 8bit Data Width) Don’t Care OFF ON OFF OFF

NOR Boot (16bit Data Width) Don’t Care OFF ON OFF ON

CFGB1[4:1] Description

[4] [3] [2] [1]

Connected NorFlash to Xm0CSn0 OFF OFF OFF ON

Note. NOR Boot is connected to Bank0. Only Nor Flash can be used for NOR Boot

CPU

CPU BASE

BASECPU

BASE


15

3. Modem Boot

A. Set CFG3 on CPU board to select Modem Boot

B. Connect External Modem to JF2 Connector on Base board


[6] [5] [4] [3] [2]

Modem Boot Don’t Care OFF ON ON ON

4. Internal ROM Boot

A. Set CFG3 on CPU board to select Internal ROM Boot

B. Set J6, J7 and J8 on BASE board to select the booting device such as SD/MMC, OneNAND and NAND Flash


[6] [5] [4] [3] [2]

Internal ROM Boot for OneNAND OFF ON ON ON ON

Internal ROM Boot for NAND ON ON ON ON ON

Internal ROM Boot for SD/MMC Don’t Care

ON ON ON ON

Description J8 J7 J6

SD/MMC CH0 1-2 1-2 1-2

OneNAND 1-2 1-2 2-3

Normal NAND, 512-byte page, 3 addr. Cycle 1-2 2-3 1-2

Normal NAND, 512-byte page, 4 addr. Cycle 1-2 2-3 2-3

Large Page NAND, 2K-byte page, 4 addr. Cycle 2-3 1-2 1-2



SD/MMC CH1 2-3 2-3 2-3

CPU BASE

CPU

CPU

BASE

BASE


16

CONFIGURATION SWITCH DESCRIPTION IN CPU BOARD

CFG1: FOR USING CONTROLABLE REGULATOR CFG1 component is used to select default value of the VDD_ARM/INT.

CFG1 Description

[4] [3] [2] [1]

VDD_ARM= 1.0V Don’t Care Don’t Care ON ON

VDD_ARM= 1.1V Don’t Care Don’t Care ON OFF

VDD_ARM= 1.2V Don’t Care Don’t Care OFF ON

VDD_ARM= 1.3V Don’t Care Don’t Care OFF OFF

VDD_INT= 1.0V Don’t Care ON Don’t Care Don’t Care

VDD_INT= 1.2V Don’t Care OFF Don’t Care Don’t Care

PWR Control Enable ON Don’t Care Don’t Care Don’t Care

PWR Control Disable OFF Don’t Care Don’t Care Don’t Care

Description of the Regulator Control Signal

Latch Output Enable XhiADDR9(GPL9), “H” => Output Enable

Latch Enable of the ARM Regulator XhiADDR8(GPL8), “H” => Latch Enable

Latch Enable of the INT Regulator XhiADDR10(GPL10), “H” => Latch Enable

Regulator Control Signal(VID0) XEINT11(GPN11)






17

LTC3714 (U7, U11) Voltage

VID4 VID3 VID2 VID1 VID0

1.300V 0 1 0 0 1

1.250V 0 1 0 1 0

1.200V 0 1 0 1 1

1.150V 0 1 1 0 0

1.100V 0 1 1 0 1

1.050V 0 1 1 1 0

1.000V 0 1 1 1 1

0.975V 1 0 0 0 0

0.950V 1 0 0 0 1

0.925V 1 0 0 1 0

0.900V 1 0 0 1 1

0.875V 1 0 1 0 0

0.850V 1 0 1 0 1

0.825V 1 0 1 1 0

0.800V 1 0 1 1 1

0.775V 1 1 0 0 0

0.750V 1 1 0 0 1

0.725V 1 1 0 1 0

0.700V 1 1 0 1 1


18

CFG2: Below table is when use PMIC Module Board.

X

Charging by USB

O

Power Off

CFG2SW5

X

X

X : Don't care

JACK1 (DC)

Operation & Chargingby DC

CON4(Battery)

X

O

CON3(USB OTG)

O : Insertion (Placement)

O

O

X

CFG3: Refer to clock source selection and boot mode selection chapter

CFG4: FOR USING NAND/ONENAND CFG4 component is used for selecting NAND/OneNAND Controller (CS2). Using 4 switches in this component, appropriate Controller can be selected.

CFG4 Description

[4] [3] [2] [1]

NAND(CS2) OFF OFF ON ON

OneNAND(CS2) ON ON OFF OFF

Note. CFG3[6] must be set as “OFF” to use OneNAND

CFG3[6] must be set as “ON” to use NAND

CFG5: FOR USING MMC CFG5 component is used to select MMC Port. Using 2 switches in this component, appropriate MMC can be selected.

CFG5 Description

[2] [1]

Disconnect MMC Port to MMC Socket ON Don’t Care

MMC Port 0 to MMC Socket OFF ON

MMC Port 1 to MMC Socket OFF OFF

CPU

CPU

BASE

BASE


19

CFG6: FOR USING IIS 5.1 CHANNEL CFG6 component is used IIS Port.

CFG6 Description

[4] [3] [2] [1]

Disconnect IIS 5.1Channel OFF OFF OFF OFF

Connect IIS 5.1Channel ON ON ON ON

CPU BASE


20

CONFIGURATION SWITCH DESCRIPTION IN BASE BOARD

CFGB1: SROM BANK0 SELECTOR CFGB1 component is used to select devices as SROM BUS I/F 0(Xm0CSn0).

CFGB1 Description

[3] [2] [1]

NOR (AMD) Flash OFF OFF ON

SRAM OFF ON OFF

External Device ON OFF OFF


CFGB2 Description

[4] [3] [2] [1]

NOR (AMD) Flash OFF OFF OFF ON

SRAM OFF OFF ON OFF

Ethernet OFF ON OFF OFF

External Device ON OFF OFF OFF


CFGB3 Description

[4] [3] [2] [1]

NAND Flash OFF OFF OFF ON

XD Picture Card OFF OFF ON OFF



CPU

CPU

CPU

BASE

BASE

BASE


21


CFGB4 Description

[4] [3] [2] [1]

NAND Flash OFF OFF OFF ON

XD Picture Card OFF OFF ON OFF




CFGB5 Description

[4] [3] [2] [1]

CF0 OFF OFF OFF ON

NOR (AMD) Flash OFF OFF ON OFF

SRAM OFF ON OFF OFF

Ethernet ON OFF OFF OFF


CFGB6 Description

[4] [3] [2] [1]

CF1 OFF OFF OFF ON

NOR (AMD) Flash OFF OFF ON OFF

SRAM OFF ON OFF OFF

Ethernet ON OFF OFF OFF

CPU

CPU

CPU

BASE

BASE

BASE


22

CFGB7: CF CARD TRANSFER MODE SELECTOR CFGB7 component is used to select CF transfer mode.

CFGB7 Description

[2] [1]

Direct Mode OFF ON

Indirect Mode ON OFF

Note. * Direct Mode: Mode which has Control signal for CF through the dedicated CF pin * Indirect Mode: Mode which has Control signal for CF through the EBI * Sequence for using CF 1. Turn ON CFGB5[1], CFGB6[1] 2. Turn ON CFG4[2] 3. Connect JP22[1] & JP22[2] in CPU Board

CFG1: AUDIO CONNECTOR SELECTOR CFG1 component is used to select direction of MIC, Line-In and Speaker to (from) Audio codec from (to) those audio connector.

CFG1 ON OFF

[1] : Select Speaker (Note1) WM9713/PMIC WM8580

[2] : Select Mic WM9713/PMIC WM8580

[3] : Select LineIn WM9713/PMIC WM8580

NOTE 1: There are 3 Speak Out components of WM8580, No 1 pin of CFG1 select only Front LR Speak out.

CPU BASE

CPU BASE


23

CFG2: AUDIO PORT SELECTOR CFG2 component is used to select S3C6410 Audio port. S3C6410 supports 2 audio channels; therefore IIS and one of AC97/PCM can be selected at the same time.

Description CFG2

ON OFF

[1] : Internal Path Selection (Note1)

Port 0 : to WM9713(AC97)

Port 1 : to WM8580 SAIF(IIS/PCM)

Port 0 : to WM8580 SAIF(IIS/PCM)

Port 1 : to WM9713(AC97)

[2] Internal/External (Note2)

Port 0 Selection

Turn On the Path that from Port 0 to internal Codecs

Turn Off the Path that from Port 0 to internal Codecs. If Codec Board is

connected on Module Connector that uses port 0, Internal Codec path

must be turned off.(Note3)

[2] Internal/External

Port 1 Selection

Turn On the Path that from Port 1 to internal Codecs

Turn Off the Path that from Port 1 to internal Codecs. If Codec Board is connected on Module 4 Connector

that uses port 1, Internal Codec path must be turned off.

[4] Reserved - -

Note 1. * It is possible that One Audio Port is connected on WM9713 (AC97), the other on WM9713 (PCM/I2S), if the Board is modified.

Note 2. * Default External Codec Module is Module 4. It is possible to use Module 2(Port 0) or Module 3(Port 1).

Note 3. * If it is needed that External codec is connected on Module 4, It must be connect R48. Default R48 connection is off.

CPU BASE


24

CFG3: COM PORT2 CONTROL CFG3 component is used to control COM Port 2.

CFG3 Description

[4] [3] [2] [1]

UART1 Don’t Care Don’t Care Don’t Care OFF

UART2 OFF OFF OFF ON

UART3 OFF ON ON ON

IrDA(U2) OFF ON Don’t Care Don’t Care

IrDA(U3) OFF OFF Don’t Care Don’t Care

CFG4: KEYPAD CONTROL CFG4 component is used to control Keypad.

CFG4 ON OFF

[1] : Column pin selection MMC Host I/F

[2] : Row pin selection XEINT Host I/F

[3] : Key Enable 1 Key Disable(Low 4x4) Key Enable(Low 4x4)

[4] : Key Enable 2 Key Disable(High 4x4) Key Enable(High 4x4)

Note. * Column pin selection: Keypad’s Column pin and MMC’s Host I/F pin has muxed, therefore you must select one. * Row pin selection: Keypad’s Row pin has muxed with XEINT and Host I/F pin, therefore you must select one between the two.

CPU

CPU

BASE

BASE


25

CFG5: WM8580 MASTER CLOCK SELECTOR CFG5 component change source of WM8580 Master clock.

CFG5 DESCRIPTION

1 – 2 CDCLK of I2SMULTI Port is source of WM8580 Master clock

2 – 3 CDCLK of AUDIO Port 0 or Port1 is source of WM8580 Master clock.(NOTE)

Note. * Selection of Port 0 and Port 1 is on CFG2.

CFG6: ETHERNET SELECTOR CFG6 is select LAN9115 or CS8900.

CFG6 DESCRIPTION

1 – 2 (4 – 5) Select LAN9115 (100Mbps)

2 – 3 (5 – 6) Select CS8900 (10Mbps)

CFG7: NAND FLASH WRITE PROTECTION SELECTOR CFG7 is selected write protection function of NAND when power on.

CFG5 DESCRIPTION

1 – 2 (4 – 5) NAND is write protection when power on.

2 – 3 (5 – 6) NAND is not written protection when power on. (Default)

CPU BASE

CPU BASE

CPU BASE


26

JUMPER SETTING CONFIGURATION

J1: SELECT DEBUGER (CPU BOARD)

ARM core JTAG

“XDBGSEL = GND”

Peripheral JTAG

“XDBGSEL = VDD_D”

Note.

* We are basically debugging by ARM core JTAG, #1 and #2 pin must be connected


27

CONNECTORS CPU BOARD

JTAG Part Name: CON11 (CPU)

XTDI[3]

VDD_D

XTMS[3]

XnRESET[2,3,6,16]

R164

10K/R1005

JTAG

R163

NC/R1005 CON11

HIF3F-20PA-2.54DS (Box,Male,Right Angle)

1 23 45 67 89 10

11 1213 1415 1617 1819 20

1 23 45 67 89 1011 1213 1415 1617 1819 20

XTRSTn[3]

R165

10K/R1005

XRTCK[3] R167 0/R1005

R171

10K/R1005

R169

470/R1005

XTDO[3]

XTCK[3]

R166

10K/R1005

VDD_D

Figure 6 JTAG Connector

Note.

* This must be connected on ARM11 to use XRTCK,

CPU BASE


28

USB Two Dual USB ports A-type (CON2A & CON2B, HOST) and one USB OTG port mini AB-type (CON3) are supported by the SMDK6410.

CON2A

USB DUAL Port - A Ty pe (Host)

1234

VBUSD-D+GND

R69

15K/R1005

C_PWR_5V

R67 33/R1005

USB(HOST)SOCKETXusbhDP

R66 33/R1005

XusbhDN

R6515K/R1005

C_PWR_5VR7115K/R1005

TP10USBH_D-

TP11USBH_D+

CON2B

USB DUAL Port - A Ty pe (Host)

5678

VBUSD-D+GND

R74

15K/R1005

USB(HOST)SOCKET

CON3

USB-MINIAB

12345

VBUSD-D+IDGND

XVBUSXotgDM

XotgIDXotgDP

+

CT9

10uF/6.3V/T2012

C16

100nF

Figure 7 Dual USB ports & OTG port

SPI Two IEEE-1394 connectors are used as SPI connecter.

XspiMOSI1[3]

XspiCS0[3]

CON9

IEEE1394/SD-54030

1234

5

6D1+D1-D2+D2-

GND

GND

XspiCLK0/ADDR_CF1[3]

XspiMISO0/ADDR_CF0[3]XspiMOSI0/ADDR_CF2[3]

CON8

IEEE1394/SD-54030

1234

5

6D1+D1-D2+D2-

GND

GND

XspiMISO1/mmcCMD2[3]XspiCS1[3]

XspiCLK1/mmcCLK2[3]

Figure 8 SPI Socket (IEEE1394 type)

CPU

CPU

BASE

BASE


29

FPC cable for MIPI HSI FPC cable is used as a MIPI HIS connector

RA6 0Xhi_D7/DATA_CF7 [16]

RA7 0

MIPI Connector

Xhi_D5/DATA_CF5 [16]


Xhi_D0/rxREADY/DATA_CF0[4]

Xhi_D1/DATA_CF1[16]

Xhi_D3/rxDATA/DATA_CF3[4]

Xhi_D5/txWAKE/DATA_CF5 [4]

Xhi_D7/txDATA/DATA_CF7 [4]

Xhi_D0/DATA_CF0[16]

Xhi_D3/DATA_CF3[16]

Xhi_D2/rxFLAG/DATA_CF2[4]

Xhi_D2/DATA_CF2[16]

Xhi_D1/rxWAKE/DATA_CF1[4]

Xhi_D4/txREADY/DATA_CF4 [4]

Xhi_D6/txFLAG/DATA_CF6 [4]

CON10

AXK7L16227G

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16Xhi_D4/DATA_CF4 [16]

Figure 9 FPC cable connector

CPU BASE


30

SD host (Ver2.0) SD/MMC interface SD/MMC is provided by the 6410 and SD card sockets are supported in the SMDK6410.

XEINT13[3,6,16]

CON7

SD/HSMMC Socket (Taisol 156-1001000901))

12

3

4

56789

101112

131415

16171819202122232425

26

27

2829

30

NCNC

DAT2

DAT3

DAT4NCCMDNCDAT5NCVSSNC

NCVDDNC

NCCLKNCDAT6NCVSSNCDAT7NCDAT0

DAT1

SD_CD

SD_WPP2

9/G

ND

P30/

GN

D

R153

NC/R1005

R157 NC/R1005

R15

050

K/R

1005

VDD_MMCD

R14

910

K/R

1005

B_MMC_DATA1

R15

150

K/R

1005

R14

750

K/R

1005

SDDATA & CLK path must besame length and route

B_MMC_CMD

B_MMC_DATA0

R158 NC/R1005

VDD_MMCD

B_MMC_CLK

XEINT12[3,6,16]

B_MMC_DATA2

Channel 0

XmmcCDN0/mmcCDN1[3] R156 0/R1005

B_MMC_DATA3

R14

850

K/R

1005


31

XmmcCDN0/mmcCDN1[3]

R14

550

K/R

1005

R155 NC/R1005

R152

NC/R1005

R14

350

K/R

1005

XmmcCLK1/ADDR_CF0[3]

R14

050

K/R

1005

R13

650

K/R

1005

XmmcDATA1_4/mmcDATA2_0/ADDR_CF0[3]

R14

250

K/R

1005

XmmcDATA1_1[3]

XmmcDATA1_7/mmcDATA2_3[3]

VDD_MMCD

VDD_MMCD

R14

150

K/R

1005

R14

450

K/R

1005

XmmcCMD1/ADDR_CF1[3]

SD0_nWP

XmmcDATA1_0/ADDR_CF2[3]

XmmcDATA1_3[3]

Channel 1

SDDATA & CLK path must besame length and route

R13

850

K/R

1005

XPWM_ECLK[3,8,16]

R13

910

K/R

1005

CON6


12

3

4

56789

101112

131415

16171819202122232425

26

27

28

2930

NCNC

DAT2

DAT3


NCVDDNC


DAT1

SD_CD

SD_WP

P29/

GN

DP3

0/G

ND

R14

650

K/R

1005



R13

750

K/R

1005

XmmcDATA1_2[3]

Figure 10 SD card Socket

CPU BASE


32

EXTERNAL ONE-NAND connector External connector is supported for connecting ONE_NAND external board

Xm0DATA2

R177

100K/R1005

Xm0DATA12

Xm0DATA[15:0] [2,10,11]

VDD_SMEM VDD_SMEM

RDY_EXT_TWOnCS_EXT_TWO

oneNAND Connector

Xm0DATA9

Xm0DATA14

INT_EXT_TWO

Xm0DATA6Xm0DATA4

Xm0DATA3

Xm0DATA8

CON12

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

Xm0DATA[15:0][2,10,11]

Xm0WEn/nIOWR_CF[2,11]

Xm0DATA15

Xm0DATA1Xm0SMCLK[2]

RDY_EXT_ONEXm0ADV[2]

Xm0DATA10

nCS_EXT_ONEXm0OEn/nIORD_CF [2,11,12]

Xm0DATA7

Xm0DATA11

R176100K/R1005

Xm0DATA5

Xm0DATA0

Xm0DATA13

+CTB31

10uF/6.3V/T2012

INT_EXT_ONERPn_EXT

CB83

100nF

Figure 11 External ONE-NAND B’d Connector

CPU BASE


33

Camera Interface Connector SMDK6410 provides Camera Interface Connector.

B_CAMDATA0

B_CAMRST

CON13

AXK8L20125B_Header

1 23 45 67 89 10

11 1213 1415 1617 1819 20

(VDDIO 2.8V)VDD_CAM_EXT

CAM IF

VDD_CAM_EXT(VDDA 2.8V)

B_CAMDATA2

R195

0/R1005

Xi2cSCL0[3,9,16]

B_CAMDATA[7:0]

B_CAMDATA5Xi2cSDA0[3,9,16] B_CAMDATA6

B_CAMDATA1

B_CAMDATA7

B_CAMHREFB_CAMDATA3

VDD_CAM_1.5V

B_CAMVSYNC

B_CAMPCLK

B_CAMDATA4

B_CAMCLK

Figure 12 Camera Interface Connector

ADC connector SMDK6410 provides ADC Interface Connector.

Xadc_AIN6_XM [16]Xadc_AIN7_XP [16]R30 0/R1005Xadc_AIN5_YP [16]

Xadc_AIN3

Xadc_AIN5

ADC

Xadc_AIN0 Xadc_AIN4

CON1

HDR10-2.54-MALE

6810

3

79

24

5

1

R28 0/R1005

Xadc_AIN1

Xadc_AIN7R27 0/R1005

Xadc_AIN2

R29 0/R1005

Xadc_AIN6

Xadc_AIN4_YM [16]

Figure 13 ADC Connector

CPU BASE

CPU BASE


34

PMIC connector SMDK6410 provides 200-FBGA Connector for PMIC Module Board.

PVDD_OTGI

TP43

TP21

PMIC_nRST_OUT [2]

PMIC_BEAR_SPK_N [16]

PVCCM2MTV

PVDD_ALIVE

PMIC_BEAR_SPK_P [16]

PVDD_MEMXPCM_SIN1/I2S_DI1/AC97_SDI0 [3,16]

PVDD_UH_MMC

XPCM_FSYNC0/I2S_LRCLK0/AC97_SYNC0/ADDR_CF2 [3,16]

TP36

R96

1K/R1005

CON5

SEAM-20-02.0-SM-10-2-A

E2

E3E4

E5E6E7F5F6F7

E8F8

E9

E10

E11

E12

F11

F12

E13E14E15F13F14F15

E17F17

E18

E19F19

F2

F3

F4

F18

H1H20J1J20

H2J2

H3J3

H4H5

H6J6

H7J7

H8

J8 J4

J5

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

K1 K2 K3 K4 K5 K6 K7 K8 K9 K10

K11

K12

K13

K14

K15

K16

K17

K18

K19

K20

E1 E16

E20

F1 F9 F10

F16

F20

B1 B20

B19B18B17

B16

B15

B14

B13B12B11B10

B9B8

B7B6

B5B4B3B2D19

D18

D4D3D15D14D13

D12

D11

D10

D9

D8

D7D6D5

D17D16

D2

D20

D1

C19C18

C17

C16C15C14C13C12

C11

C10C9C8

H9

H10

H11

J9 J10

J11

H12

J12

H13J13

H14J14

H15J15

H17J17

H18J18

H19

J19

H16

J16

G1

G20

G2

G3

G4

G5G6

G7

G8

G9

G10

G11

G12

G13

G14

G15

G16

G17

G18

G19

C1

C20

C2

C3

C4

C5

C6

C7

MCLK

VLDO5_VDDUH/VDDMMCVLDO5_VDDUH/VDDMMC

BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1

I2S_DATAINI2S_DATAOUT

VC

HG

RV

CH

GR

TS

I_Y

MT

SI_

YP

TS

I_X

MT

SI_

XP

BUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARM

VLDO3_VDDHIVLDO3_VDDHI

Res

erve

d

VLDO1_VCCAUX1VLDO1_VCCAUX1

VLDO8_VCCM3BT

VLDO13_VDDGPS/VCCM1GPS

VLDO2_VDDMPLL/VDDAPLL/VDDEPLL

LED

_PC

GNDGNDGNDGND

VLDO15_VDDALIVEVLDO15_VDDALIVE

VLDO11_VCCM2MTVVLDO11_VCCM2MTV

VLDO_ADC(Reserv ed)VBUS_XVBUS



MIC

1_N

MIC

1_P

Res

erve

d

VLDO_AUDIO_VDDPCM/VDDADC/VDDDAC

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

AUD_AUX3_INAUD_AUX2_INAUD_AUX1_IN

Reserv ed

nVDD_FAULT

Reserv ed

nBATT_FAULTSYS_EN

PWR_ENnPMIC_IRQ

I2C_SDAI2C_SCL

Reserv edReserv ed

nSLEEPEXT_WAKEUP1EXT_WAKEUP0

nONKEYnEXTON

I2S_CDCLK

Reserv edReserv edReserv edReserv edReserv ed

FLA

SH_E

N

PWR_I2C_SCL

VC

HG

RV

CH

GR

AUD_AMP_EN

nRST_INREM_IN

nRST_OUT

I2S_SYNCI2S_BITCLK

TBA

TG

ND

GN

D

AUDIO_LINEOUTSTEREO_CH2

VMID

STEREO_CH1BEAR_SPK_NBEAR_SPK_P

MONO_SPK_NMONO_SPK_P

PWR_I2C_SDA

PCM_CLKPCM_FSYNC

PCM_SDI

VBA

T_I

NV

BAT

_IN

VBA

T_I

NV

BAT

_IN

VBA

T_I

NV

BAT

_IN

VRT

C_V

DD

RTC

VRT

C_V

DD

RTC

VLDO9_VDDOTGIVLDO9_VDDOTGI

VLDO7_VDDEXTVLDO7_VDDEXT

VLDO12_VDDLCDVLDO12_VDDLCD

VLDO14_VDDOTGVLDO14_VDDOTG

VLDO10_VDDSYSVLDO10_VDDSYS

MIC

_BIA

S_I

NT

MIC

_BIA

S_E

XT

Res

erve

d

Res

erve

d

GN

DG

ND

VLDO8_VCCM3BT



BUCK2_VDDINTBUCK2_VDDINT

Res

erve

d

LDO8_EN(Reserv ed)

VBA

T_I

NV

BAT

_IN

VBA

T_I

N

LED

_DR

V1LE

D_D

RV2

MIC

2_N

MIC

2_P

WLE

D_B

OO

ST

WLE

D_O

UT1

WLE

D_O

UT2

VVI

B

GN

DG

ND

Res

erve

d

ADC

_IN

4AD

C_I

N5

ADC

_IN

6AD

C_I

N7

PCM_SDO

PMIC

XPCM_EXTCLK0/I2S_CDCLK0/AC97_RSTn0/ADDR_CF1 [3,16]

PVDD_INT

PMIC_MIC2_N [16]

R100 0/R1005

TP26TP24TP17TP25

R103 0/R1005

nRESET [2]

TP41

TP32

TP42

PMIC_STEREO_VMID [16]

PMIC_MONO_SPK_N [16]

PMIC_STEREO_CH2 [16]

PVDD_AUDIO

PVDD_SYS

R97 0/R1005

TP31

TP16

TP34

PVDD_PLL

TP22

PMIC_MIC1_P [16]

XPCM_EXTCLK1/I2S_CDCLK1/AC97_RSTn0 [3,16]

PMIC_REM_IN [16]

XPCM_SOUT1/I2S_DO1/AC97_SDO0 [3,16]

XPCM_DCLK0/I2S_CLK0/AC97_BITCLK0/ADDR_CF0 [3,16]

XPCM_DCLK1/I2S_CLK1/AC97_BITCLK0 [3,16]

TP38

PMIC_MODEM_SPK_P [16]PMIC_MODEM_SPK_N [16]

R101 0/R1005

TP33

TP37

TP28

PVDD_SS

TP39

TP20

XnBATF [2,3]

WLED_OUT1[16]

PVDD_ARM

R104 0/R1005

TP18

R99 0/R1005

PMIC_XEINT12_IRQn [3]

PVDD_OTG

PMIC_MODEM_MIC_P [16]

TP23

PMIC_MIC2_P [16]

TP44

R102 0/R1005

TP30

<Silk>

TP13

XPWRRGTON [3,7]

Xi2cSCL0 [3,15,16]


TP40

PVDD_LCD

XVBUS[3,7]

PVDD_EXT

PMIC_MONO_SPK_P [16]

PVDD_HI

PVDD_RTC

TP29

VCHGR

PVCCAUX1

PMIC_ONKEYn [2]

PMIC_STEREO_CH1 [16]

Xi2cSDA0 [3,15,16]

XPCM_SIN0/I2S_DI0/AC97_SDI0 [3,16]

PMIC_MIC1_N [16]

R106 0/R1005

TP15

WHITE_LED[16]

R105 0/R1005

PVCCM3BT

VBATTP19

PVCCAUX2

R98 0/R1005

TP35

PVCCAUX3

LED3LED-Red (SMD 3216)

12

TP27

XPCM_FSYNC1/I2S_LRCLK1/AC97_SYNC0 [3,16]

TP14

Figure 14 PMIC Connector

CPU BASE


35

BASE BOARD

COMPOSITE & S-VIDEO Connector SMDK6410 provides COMPOSITE & S-VIDEO output connector

R389

0/R1608

JACK9

COMPOSITE RCA

12

VIDEOGND

R3870/R1608

YC

Yn Cn

JACK10

CONN_SVIDEO_12P (MD-40S)

34

12

Figure 15 Composite & S-VIDEO Connector

CPU BASE


36

LINE IN, MIC IN & SPEAKER OUT connector SMDK6410 provides LINE IN, MIC IN and SPEAKER OUT as an audio connector.

R78

100/R1608

Headphone/Front LR

WM8580_MIC[7]

WM8580_LINEIN_L[7]

R79 6.8K/R1608

R81 1.5K/R1608

Gnd

L

R

JACK3

PJ-327-2

3

2

1

CB21100nF/C1608

AVDD_ext

CB24100nF/C1608

Line In Right

AVDD_ext

AVDD_ext

+CTB2247uF,6.3V/T3528

C3

220pF/C1608

Line In

Line In Left

Gnd

L

R

JACK5

PJ-327-2

3

2

1

+

CTB2710uF,6.3V/T2012

+

CTB2610uF,6.3V/T2012

Rear LR

0 : NC ON1 : NO ON

R801.5K/R1608

+ CTB25

10uF,6.3V/T2012

AVDD_ext

Center/Sub

CB23100nF/C1608

+

CTB2110uF,6.3V/T2012

AVDD_ext

WM8580_OUT_Sub[7]

Speaker_nWM8753/WM9713 [4]

Gnd

L

R

JACK2

PJ-327-2

3

2

1

AVDD_ext

LineIn_nWM8753/WM9713 [4]

WM9713_OUT_L[6]

Speaker_nWM8753/WM9713[4]

Gnd

L

R

JACK4

PJ-327-2

3

2

1

WM8753_OUT_FL[7]Gnd

L

R

JACK1

PJ-327-2

3

2

1

WM8580_OUT_RR[7]

U7

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

Mic In

WM9713_LINE_R[6]

U6

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

PMIC_STEREO_CH1[2]

WM9713_OUT_R[6]

Mic_nWM8753/WM9713 [4]

WM8753_OUT_FR[7]

WM8580_OUT_RL[7]

PMIC_MIC1_N[2,6]

U9

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

+

CTB2010uF,6.3V/T2012

WM8580_OUT_Center[7]

U8

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

WM9713_MIC[2,6]

CB22100nF/C1608WM8580_LINEIN_R[7]

WM9713_LINE_L[6]

PMIC_STEREO_CH2[2]

Figure 16 Audio Line In, Mic In & Speaker Out Connector

CPU BASE


37

ETHERNET connector SMDK6410 provides Ethernet 10Mbps (CON6) and 100Mbps (JACK8) connector.

R235 8 ohm, 1%/R1608

C42

NC (100nF)/C1608

C43

100nF/C1608

R26

349

.9 o

hm/R

1608

R269

49.9 ohm/R1608

R240

100 ohm,1%/R1608

R2730/R1608

R26849.9 ohm/R1608

R26

249

.9 o

hm/R

1608

CON6

Single_Ports_Combo

12345678

910

CT_T2TD-

CT_T1TD+RD+

CT_R1RD-

CT_R2ShieldShield

C39

580pF/C1608

C49

NC (1000pF,2KV)

JACK8

RJHS-5380

12345678

1615

1211

1413

109

(XFMRS / XF10B11A-COMBO1-4S)

C40

0.1uF 2KV(NC)

C41

0.1uF 2KV (NC)

R26

049

.9 o

hm/R

1608

R26

149

.9 o

hm/R

1608

R239 8 ohm, 1%/R1608

Figure 17 Ethernet Socket

CPU BASE


38

UART interface The S3C6410 UART unit provides three independent asynchronous serial I/O (SIO) ports including IrDA. In SMDK6410 board, COM1 port is only used for UART0. No jumper setting is required. You can change UART by setting related jumpers.

JACK7

BOXCONN_DB9

594837261

JACK6

BOXCONN_DB9

594837261

nRTS1nRTS0

UART0 OnlyCOM2 port

nDSR0

RXD0nCTS1nCTS0

UART1/2/3

nDTR0TXD0

COM1 port

TXD1/2/3

RXD1/2/3

Figure 18 UART Sockets

xD Picture Card Connector SMDK6410 provides xD Picture Card Connector.

CON1

xD_CARD Socket

23456789

101112131415161718

191 R/B

RECECLEALEWEWPGNDD0D1D2D3D4D5D6D7VCC

GNDGND

B_DATA2

B_FREn[2]nCS_XD

B_FWEn[2]B_ALE[2]

B_DATA1

B_DATA7

VDD3.3V

B_DATA4

B_DATA6

B_DATA[15:0][2,8,10..12]

B_DATA3

B_RnB[2]

B_DATA0

B_CLE[2]

B_DATA5

R234.7K/R1608

XD PICTURE CARD

Figure 19 xD Picture Card Socket

CPU

CPU

BASE

BASE


39

CF Card Slot SMDK6410 provides CF/ATA Card Slot Connector.

P_DATA9

R160 0/R1608

R15810K/R1608

nIOWR_CF

TP29

CD2_CF

+

CTB41

10uF,6.3V/T2012

CE_CF0

B_ADDR3

P_ADDR1

CB43

100nF/C1608

B_ADDR4

P_DATA10

Xhi_A5/KP_COL5/Xm0INPACKata[2,10,13,14]B_ADDR[19:0] [2,3,10..12]

P_DATA6

R157 NC/R1608

VDD_CF

B_ADDR6

P_DATA12

P_DATA1

B_OEata[2]

Xhi_A6/KP_COL6/Xm0REGata[2,10,13,14]

B_INTata[2] P_DATA7

Xhi_A4/KP_COL4/Xm0RSTata[2,10,13]

P_DATA13

P_DATA[15:0]

R156 0/R1608

P_DATA15

CD1_CFB_WEata[2]

B_ADDR[19:0][2,3,10..12]

TP27

B_ADDR10

VDD_CF

TP31

P_DATA8

R165 NC/R1608

P_DATA11

TP28

Xhi_A3/KP_COL3/Xm0INTata[2,10,13]

nIORD_CF

B_RESET[2]

CON4

CompactFlash (55358-5021)

212223234564748492728293031501214151617181920

7323435421

373839404124434445469

13333626258

1011

D0D1D2D3D4D5D6D7D8D9

D10D11D12D13D14D15

GND2A7A6A5A4A3A2A1A0

nCE1nCE2nIORDnIOWRnWAITGND1IREQVCC2nCSELnVS2/OPENRESETWPnINPACKnREGnSPKRnSTSCHGnOEVCC1nVS1/GNDnWECD1CD2A10A9A8

IORDY_CF

P_DATA3

P_DATA0

P_DATA2

R155 10K/R1608

P_ADDR[2:0]

P_DATA14

B_ADDR5

B_REGata[2]

TP30

R152 0/R1608

B_INPACKata[2]

R162 10K/R1608

B_ADDR7

P_ADDR0

R164 0/R1608

VDD_CF

R161 10K/R1608

R150

10K/R1608

VDD_CF

P_DATA4

P_ADDR2

R154 10K/R1608

CE_CF1

B_ADDR9B_ADDR8

CB42

100nF/C1608

P_DATA5

R159 NC/R1608

R151 NC/R1608

Figure 20 CF/ATA Interface Connector

PWM connector SMDK6410 provides PWM out0&1.

(HDR4-2.54-MALE)

J1

A2-4PA-2.54DSA

1234

PWM_TOUT0[2,16]XPWM_ECLK[2,16]

PWM_TOUT1[2,16]

Figure 21 PWM out pins

CPU BASE

CPU BASE


40

EXTERNAL CONNECTOR INTERFACE

ROM BUS Interface

B_ADDR5

B_DATA6B_DATA4

B_DATA3

B_ADDR8

TP42

nCS_EXT[3]

B_ADDR6

B_DATA7

B_ADDR14

B_DATA15B_DATA12

B_ADDR15

B_ADDR17

XnRSTOUT [2,11..16]

B_ADDR[19:0] [2,3,8,11,12]B_ADDR0B_ADDR[19:0][2,3,8,11,12]B_OEn/nIORD_CF [2,3,8,11,12]

R215

10K/R1608

B_ADDR2

B_WEn/nIOWR_CF[2,3,8,11,12]

B_nBE1[2,3,11]

B_ADDR16

ROM Bus

B_DATA1

B_DATA14

B_DATA0

B_nBE0[2,3]XuRXD_0 [2,9,14]

+CTB44

10uF,6.3V/T2012

B_DATA[15:0][2,3,8,11,12]

CB52

100nF/C1608

B_DATA11B_DATA9

B_DATA5

B_WAITn/IORDY [2,8,11]

VDD_EXHI

B_DATA8

RP5

0/R1608

RP4

0/R1608

B_ADDR1

B_ADDR9B_ADDR10

XuTXD_2/ExdACK/IrTXD/ADDR_CF1[2,8,9]

B_ADDR11

R217

10K/R1608

B_ADDR12

XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1 [2,5,8,9]

B_DATA10

B_ADDR7

B_ADDR19

B_ADDR3

XEINT4/KP_ROW4[2,13,15,16]

XuTXD_0 [2,9,14]

B_ADDR4

B_ADDR18

B_DATA[15:0] [2,3,8,11,12]

B_ADDR13

Modem_nReset [2]

R21610K/R1608

B_DATA2

B_DATA13

VDD_EXHI

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0 [2,8,9]R230 0/R1608

XEINT3/KP_ROW3[2,13,15]

XuTXD_3/ExdACK/IrTXD/Xi2cSDA1[2,5,9]

R229 0/R1608

JF1

QTE-040-01-L-D-EM2

13579

1113151719212325272931333537394143454749515355575961636567697173757779

2468101214161820222426283032343638404244464850525456586062646668707274767880

Figure 22 External ROM Bus Connector


41

# of pin Descriptions # of pin Descriptions # of pin Descriptions # of pin Descriptions1 VDD_3.3V 21 B_ADDR10 41 B_DATA0 61 - 2 VDD_3.3V 22 B_ADDR11 42 B_DATA1 62 - 3 nCS_EXT 23 B_ADDR12 43 B_DATA2 63 - 4 - 24 B_ADDR13 44 B_DATA3 64 -

5 B_WEn/nIOWR_CF 25 B_ADDR14 45 B_DATA4 65 -

6 B_OEn/IORD_CF 26 B_ADDR15 46 B_DATA5 66 Modem_nRes

et 7 - 27 GND 47 B_DATA6 67 XEINT4 8 GND 28 GND 48 B_DATA7 68 XnRSTOUT 9 B_ADDR0 29 B_ADDR16 49 GND 69 XEINT3 10 B_ADDR 1 30 B_ADDR17 50 GND 70 XrWAITn 11 B_ADDR 2 31 B_ADDR18 51 B_DATA8 71 B_nBE1 12 B_ADDR 3 32 B_ADDR19 52 B_DATA9 72 XuRXD_0 13 B_ADDR 4 33 - 53 B_DATA10 73 B_nBE0 14 B_ADDR 5 34 - 54 B_DATA11 74 XuTXD_0 15 B_ADDR 6 35 - 55 B_DATA12 75 XuTXD_2 16 B_ADDR 7 36 - 56 B_DATA13 76 XuRXD_2 17 GND 37 - 57 B_DATA14 77 XuTXD_3 18 GND 38 - 58 B_DATA15 78 XuRXD_3 19 B_ADDR 8 39 - 59 - 79 GND 20 B_ADDR 9 40 GND 60 - 80 GND

CPU BASE


42

HOST/MODEM INTERFACE

Xhi_A2/ADDR_CF2/KP_COL2 [2,8,13]

Xhi_A10/IORD_CF [2,8,15]

XhiWEn/CF_IOWR[2,8]

XhiCSnmain/CE_CF1[2,8]

VDD_EXHI

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0 [2,8,9]


Xhi_D9/DATA_CF9/KP_ROW1 [2,8,13]

R22

110

K/R

1608

Xhi_D5/DATA_CF5 [2,8,14]

R228

NC/R1608

XhiOEn/CF_IORDY [2,8,15]

+

CTB45

10uF,6.3V/T2012

Host/MODEM I/F

Xhi_A11/IOWR_CF[2,8,15]

J3

A2-3PA-2.54DSA

123

R22

410

K/R

1608

Xhi_D4/DATA_CF4[2,8]

TP41

Xhi_D15/DATA_CF15/KP_ROW7 [2,8,13]Xhi_D14/DATA_CF14/KP_ROW6[2,8,13]



Xhi_A12/IORDY_CF [2,8]

Xhi_D10/DATA_CF10/KP_ROW2[2,8,13]




R232NC/R1608



R22

310

K/R

1608

R21

910

K/R

1608

XEINT8/ADDR_CF0 [2,8,14]

RP6

0/R

1608

Xhi_A5/KP_COL5/Xm0INPACKata[2,8,13,14]


XuTXD_2/ExdACK/IrTXD/ADDR_CF1[2,8,9]

Xhi_A1/ADDR_CF1/KP_COL1[2,8,13]

R231

NC/R1608

R226 0/R1608

R22

010

K/R

1608

JF2

QSE-040-01-L-D-EM2

13579

1113151719212325272931333537394143454749515355575961636567697173757779

2468101214161820222426283032343638404244464850525456586062646668707274767880

Xhi_A4/KP_COL4/Xm0RSTata [2,8,13]



R225 0/R1608

VDD_EXHI

AP_nReset[2]

R21

810

K/R

1608

XhiINTR[2,16]

Xhi_A8/CE_CF0 [2,8]

Xhi_D1/DATA_CF1 [2,8]


TP40

Xhi_D16/DATA_CF8[2]R

P70/

R16

08

Xhi_A7/KP_COL7/Xm0CData[2,8,13,14]

XhiCSn/CE_CF0[2,8]

Xhi_D6/DATA_CF6[2,8,14]

Xhi_A6/KP_COL6/Xm0REGata [2,8,13,14]

Xhi_A9/CE_CF1[2,8,14]

TP39

R22

210

K/R

1608

R227100K/R1608


CB53

100nF/C1608

XhiCSn_sub/CF_IORD [2,8,15]


Figure 23 Host/Modem Interface Connector


43

# of pin Descriptions # of pin Descriptions # of pin Descriptions # of pin Descriptions1 VDD_3.3V 21 Xhi_A9 41 Xhi_D0 61 - 2 VDD_3.3V 22 Xhi_A10 42 Xhi_D1 62 - 3 XhiCSn 23 Xhi_A11 43 Xhi_D2 63 - 4 XhiCsn_sub 24 Xhi_A12 44 Xhi_D3 64 - 5 XhiWEn 25 - 45 Xhi_D4 65 - 6 XhiOEn 26 - 46 Xhi_D5 66 XEINT8 7 XhiCSnmain 27 GND 47 Xhi_D6 67 XhiINTR 8 GND 28 GND 48 Xhi_D7 68 - 9 - 29 - 49 GND 69 AP_nReset 10 Xhi_A0 30 - 50 GND 70 - 11 Xhi_A1 31 - 51 Xhi_D8 71 - 12 Xhi_A2 32 - 52 Xhi_D9 72 - 13 Xhi_A3 33 - 53 Xhi_D10 73 - 14 Xhi_A4 34 - 54 Xhi_D11 74 - 15 Xhi_A5 35 - 55 Xhi_D12 75 XuTXD_2 16 Xhi_A6 36 - 56 Xhi_D13 76 XuRXD_2 17 GND 37 - 57 Xhi_D14 77 XuTXD_3 18 GND 38 - 58 Xhi_D15 78 XuRXD_3 19 Xhi_A7 39 GND 59 Xhi_D16 79 GND 20 Xhi_A20 40 GND 60 Xhi_D17 80 GND

CPU BASE


44

EXTERNAL KEYPAD CONNECTOR

kp_COL4

kp_ROW1

CON8

HIF3H-24DA-2.54DS (Female,Right Angle)

1 23 45 67 89 10

11 1213 1415 1617 1819 202123

2224

kp_ROW4

VDD3.3V

+

CTB52

10uF,6.3V/T2012

kp_ROW5

kp_COL7

kp_COL1

kp_ROW7

kp_COL5

kp_COL2

kp_ROW6

kp_ROW3

CB69

100nF/C1608

kp_COL6

VDD3.3V

kp_COL0

kp_ROW2

kp_ROW0

kp_COL3

Figure 24 External Keypad Connector

# of pin Descriptions # of pin Descriptions 1 VDD_3.3V 13 Kp_ROW4 2 VDD_3.3V 14 Kp_COL4 3 VDD_3.3V 15 Kp_ROW5 4 VDD_3.3V 16 Kp_COL5 5 Kp_ROW0 17 Kp_ROW6 6 Kp_COL0 18 Kp_COL6 7 Kp_ROW1 19 Kp_ROW7 8 Kp_COL1 20 Kp_COL7 9 Kp_ROW2 21 GND 10 Kp_COL2 22 GND 11 Kp_ROW3 23 GND 12 Kp_COL3 24 GND

CPU BASE


45

kp_ROW6

kp_ROW2

kp_ROW4

kp_COL5

TP46XnRSTOUT[2,10..12,14..16]

kp_ROW3

kp_COL4

TP48

CON7

GF056-30S-LSS-P2000

123456789

101112131415161718192021222324252627282930

kp_COL0

kp_ROW7

VDD3.3V

kp_ROW5

kp_COL1

kp_COL7

TP47

kp_ROW0kp_ROW1

kp_COL3

kp_COL6

kp_COL2

Figure 25 External Qwerty Keypad Connector

# of pin Descriptions # of pin Descriptions 1 VDD_3.3V 16 TP47 2 VDD_3.3V 17 GND 3 GND 18 Kp_ROW5 4 Kp_COL0 19 Kp_ROW6 5 Kp_COL1 20 Kp_ROW7 6 Kp_COL2 21 Kp_COL5 7 Kp_COL3 22 Kp_COL6 8 Kp_COL4 23 Kp_COL7 9 Kp_ROW0 24 VDD_3.3V 10 Kp_ROW1 25 VDD_3.3V 11 Kp_ROW2 26 GND 12 Kp_ROW3 27 VDD_3.3V 13 Kp_ROW4 28 GND 14 TP46 29 GND 15 XnRSTOUT 30 GND


46

MODULE1 INTERFACE CONNECTOR (FOR GPS DAUGHTER BOARD)

GPS (UART0, SPI0)

TP54

R317 0/R1608

MODEM_RST

+

CTB55

10uF,6.3V/T2012

CB70

100nF/C1608

R312 0/R1608

TP52

R309 0/R1608

PVCCAUX1

R314 0/R1608

CB73

100nF/C1608

TP49

M1

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

TP50

CB72

100nF/C1608

+

CTB54

10uF,6.3V/T2012

TP57

TP60

CB71

100nF/C1608

R319 0/R1608

R313 0/R1608

TP53

R310 0/R1608XuRTSn_0/ADDR_CF1[2,9]

XEINT8/ADDR_CF0[2,8,10]

XEINT13 [2,16,17]

R304

0/R1608

R311 0/R1608

B_SPI0_MOSI/ADDR_CF2 [2,3,15,16]TP59

XEINT9/ADDR_CF1[2,17]

B_SPI0_CLK/ADDR_CF1 [2,16]

VDD3.3V

XEINT10/ADDR_CF2[2,11,12,17]

MODULE 1

R315 0/R1608

XuCTSn_0/ADDR_CF0[2,9]TP55

B_SPI0_CSn [2,16]

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0[2,8..10]

MODEM_PWR_ON

R306 0/R1608

TP61

R458 0/R1608

B_SPI0_MISO/ADDR_CF0 [2,15,16]

XEINT15[2,16,17]

PVDD_SS

XuTXD_0[2,9,10]XuRXD_0[2,9,10]

R316 0/R1608

TP51

MODEM_WAKEUP

R307 NC/R1608

R459 0/R1608

B_PWR_5V

XuTXD_2/ExdACK/IrTXD/ADDR_CF1[2,8..10]

R305

0/R1608

XnRSTOUT[2,10..13,15,16]

MODEM_RI

TP58

+

CTB53

10uF,6.3V/T2012

TP56

+ CTB56

10uF,16V/T3216

R318 0/R1608

TP62

MODEM_RTC_PWR(2.8V)

R308 NC/R1608

Figure 26 Module1 Connector


47

# of pin Descriptions # of pin Descriptions # of pin Descriptions 1 PVDD_SS 21 XuCTSn_0/ADDR_CF0 41 TP 2 VDD3.3V 22 - 42 B_SPI0_CLK/ADDR_CF1 3 PVDD_SS 23 TP 43 TP 4 VDD3.3V 24 TP 44 B_SPI0_MOSI/ADDR_CF25 - 25 GND 45 - 6 TP 26 - 46 B_SPI0_MISO/ADDR_CF07 - 27 XEINT8/ADDR_CF0 47 TP 8 PVCCAUX1 28 GND 48 B_SPI0_CSn 9 TP 29 XEINT9/ADDR_CF1 49 GND 10 GND 30 - 50 B_PWR_5V 11 TP 31 XEINT10/ADDR_CF2 51 - 12 - 32 XEINT13 52 B_PWR_5V 13 - 33 XEINT15 53 XnRSTOUT 14 TP 34 - 54 B_PWR_5V 15 XuTXD_0 35 - 55 TP 16 TP 36 - 56 B_PWR_5V 17 XuRXD_0 37 TP 57 - 18 - 38 TP 58 B_PWR_5V

19 XuRTSn_0/ADDR_CF1 39 TP 59 GND

20 - 40 GND 60 GND

CPU BASE


48

MODULE2 INTERFACE CONNECTOR (FOR MOBILE TV, HD RADIO DAUGHTER BOARD)

TP71

TP66

CB74

100nF/C1608


R338 0/R1608

R324 0/R1608

+

CTB57

10uF,6.3V/T2012

R326 0/R1608

+ CTB59

10uF,16V/T3216

TP75

PVCCM2MTV

R331 0/R1608

R335 NC/R1608

B_PWR_5V

R333 0/R1608

Mobile TV (SPI1, IIC)

R330 0/R1608

CB75

100nF/C1608

TP63

Xi2cSCL0 [2,5,7,15]R323 0/R1608

R329 0/R1608

TP65

TP72

HD Radio (SPI1, IIS for Module 4)

VDD3.3V

+

CTB58

10uF,6.3V/T2012

MODULE 2

R334 NC/R1608

TP74

CB76

100nF/C1608

R337 0/R1608

TP67

TP64

R336 NC/R1608

TP70

R321

0/R1608

TP68R327 0/R1608

Xhi_D3/DATA_CF3[2,8,10]Xhi_A7/KP_COL7/Xm0CData[2,8,10,13]

B_SPI1_MOSI [2,15]

TP69

M2

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

Xhi_D7/DATA_CF7[2,8,10] B_SPI1_CSn/i2sV40_DO2 [2,7,15]

Xi2cSDA0 [2,5,7,15]

R322 0/R1608

TP73

R328 0/R1608

B_SPI1_CLK/MMC2_CLK/i2sV40_DO1 [2,7,15]


M2_Port0_I2SLRCLK/AC_SYNC[4]

Xhi_A9/CE_CF1[2,8,10]

M2_Port0_I2SDO/AC97_SDO[4]

M2_Port0_I2SSCLK/AC_BITCLK[4]

B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 [2,7,15]Xhi_D5/DATA_CF5[2,8,10]

R320

0/R1608

M2_Port0_I2SCDCLK/AC_RSTn[4]

M2_Port0_I2SSDI/AC_SDI[4]

R332 NC/R1608

R325 0/R1608

XnRSTOUT[2,10..13,15,16]




49

# of pin Descriptions # of pin Descriptions # of pin Descriptions

1 PVCCM2MTV 21 M2_Port0_I2SLRCLK/AC_SYNC 41 Xhi_A9/CE_CF1

2 VDD3.3V 22 TP 42 B_SPI1_CLK/MMC2_CLK/i2sV40_DO1

3 PVCCM2MTV 23 M2_Port0_I2SSCLK/AC_BITCLK 43 Xhi_D5/DATA_CF5

4 VDD3.3V 24 TP 44 B_SPI1_MOSI

5 GND 25 M2_Port0_I2SSDI/AC_SDI 45 Xhi_D6/DATA_CF6

6 - 26 TP 46 B_SPI1_MISO/MMC2_CMD/i2sV40_DO0

7 - 27 M2_Port0_I2SDO/AC97_SDO 47 Xhi_D7/DATA_CF7

8 TP 28 - 48 B_SPI1_CSn/i2sV40_DO29 - 29 GND 49 - 10 TP 30 - 50 B_PWR_5V

11 - 31 Xhi_A5/KP_COL5/Xm0INPACKata 51 -

12 Xi2cSCL0 32 TP 52 B_PWR_5V

13 - 33 Xhi_A6/KP_COL6/Xm0REGata 53 XnRSTOUT

14 Xi2cSDA0 34 TP 54 B_PWR_5V

15 - 35 Xhi_A7/KP_COL7/Xm0CData 55 TP

16 GND 36 TP 56 B_PWR_5V 17 TP 37 Xhi_D3/DATA_CF3 57 TP 18 - 38 TP 58 B_PWR_5V

19 M2_Port0_I2SCDCLK/AC_RSTn 39 GND 59 GND

20 TP 40 GND 60 GND

CPU BASE


50

MODULE3 INTERFACE CONNECTOR (FOR BLUETOOTH DAUGHTER BOARD)

M3_Port1_FSYNC[4]

XuRTSn_1/ADDR_CF1[2,9]

Xhi_A10/IORD_CF[2,8,10]

R347 0/R1608

B_SPI1_MOSI[2,14]

R346 0/R1608

R344 0/R1608

XuCTSn_1/ADDR_CF0[2,9]

R345 0/R1608

XuRXD_1[2,9]

M3_Port1_PCM_DCLK [4]

CB77

100nF/C1608

MODULE 3

TP77

B_PWR_5V

TP76

R352 0/R1608

SD_PWR_EN

+

CTB60

10uF,6.3V/T2012

BT_PCM_FSYNC

B_SPI1_MISO/MMC2_CMD/i2sV40_DO0[2,7,14]

R353 0/R1608

BT_PCM_SDO

R351 0/R1608

NCD_SD0

M3_Port1_PCM_SOUT[4]

R340

0/R1608

+ CTB62

10uF,16V/T3216

CB79

100nF/C1608

BT (UART1, PCM for PMIC Audio Codec)

R339

0/R1608

R348 0/R1608

BT_PCM_CLK

R343 0/R1608

PVCCM3BT

XuTXD_1[2,9]

WP_SD0

XhiOEn/CF_IORDY[2,8,10]

M3

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

R341 0/R1608

VDD3.3V

R342 0/R1608


BT_PCM_SDI

XEINT2/KP_ROW2[2,13]

M3_Port1_PCM_SIN [4]


R350 0/R1608

B_SPI1_CLK/MMC2_CLK/i2sV40_DO1[2,7,14]

R349 0/R1608

XnRSTOUT[2,10..14,16]

CB78

100nF/C1608

+

CTB61

10uF,6.3V/T2012

M3_Port1_PCM_EXTCLK [4]



51

# of pin Descriptions # of pin Descriptions # of pin Descriptions 1 PVCCM3BT 21 - 41 XuTXD_1 2 VDD3.3V 22 - 42 - 3 PVCCM3BT 23 - 43 XuRXD_1 4 VDD3.3V 24 - 44 XhiCSn_sub/CF_IORD5 M3_Port1_PCM_SOUT 25 - 45 XhiOEn/CF_IORDY 6 M3_Port1_PCM_SIN 26 - 46 - 7 M3_Port1_FSYNC 27 - 47 GND 8 M3_Port1_PCM_DCLK 28 - 48 GND 9 GND 29 Xhi_A11/IOWR_CF 49 GND

10 M3_Port1_PCM_EXTCLK 30 - 50 B_PWR_5V

11 - 31 Xhi_A10/IORD_CF 51 - 12 TP 32 - 52 B_PWR_5V 13 XuCTSn_1/ADDR_CF0 33 XEINT2/KP_ROW2 53 XnRSTOUT 14 GND 34 GND 54 B_PWR_5V

15 XuRTSn_1/ADDR_CF1 35 B_SPI1_CLK/MMC2_CLK/i2sV40_DO1 55 TP

16 - 36 - 56 B_PWR_5V 17 - 37 B_SPI1_MOSI 57 - 18 - 38 - 58 B_PWR_5V

19 - 39 B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 59 GND

20 - 40 - 60 GND

CPU BASE


52

MODULE4 INTERFACE CONNECTOR (FOR AUDIO DAUGHTER BOARD)

TP84

B_SPI0_MOSI/ADDR_CF2 [2,14,16]

R369 0/R1608

B_HSMMC_DAT4/i2sV40_BCLK [2,7,8,13]

TP83


Xi2cSDA0[2,5,7,14]

XnRSTOUT[2,10..14,16]


M4_Port0_I2SSCLK/AC_BITCLK[4]M4_Port0_I2SCDCLK/AC_RSTn[4]

TP82


TP78

MODULE 4

R381 0/R1608

B_HSMMC_DAT7/i2sV40_DI [2,7]


B_HSMMC_DAT6/i2sV40_LRCLK [2,7,8]

R357 NC/R1608

XEINT3/KP_ROW3[2,10,13]M4_Port1_I2SSCLK/AC_BITCLK[4]

+ CTB65

10uF,16V/T3216

XEINT6/KP_ROW6[2,9,13,16]





B_SPI1_CSn/i2sV40_DO2 [2,7,14]

TP80

R360 NC/R1608



+

CTB64

10uF,6.3V/T2012


Xi2cSCL0[2,5,7,14]


M4

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 [2,7,14]

R371 NC/R1608

R378 0/R1608

Audio (AC97, IIS, IIC)

TP87

R355

0/R1608


B_HSMMC_DAT5/i2sV40_CDCLK [2,7,8,13]

R379 0/R1608

R373 0/R1608


R358 0/R1608

R377 0/R1608

R359 0/R1608

CB80

100nF/C1608

R372 0/R1608

TP88

TP79

R363 0/R1608

+

CTB63

10uF,6.3V/T2012

CB82

100nF/C1608

PVDD_AUDIO

R375 NC/R1608

R367 0/R1608

R356 0/R1608

R374 NC/R1608

R380 NC/R1608

CB81

100nF/C1608

TP85

VDD3.3V

R362 0/R1608

B_PWR_5V

TP90TP89

R3540/R1608

R364 NC/R1608

TP81

R382 0/R1608

R361 0/R1608

R368 0/R1608

R376 0/R1608TP86

R370 0/R1608


R383 0/R1608

XEINT4/KP_ROW4[2,10,13,16]


# of pin Descriptions # of pin Descriptions # of pin Descriptions

1 PVDD_AUDIO 21

M4_Port1_I2SSCLK/AC_BITCLK

(M4_Port1_I2SLRCLK/AC_SYNC)

41 XEINT3/KP_ROW3

2 VDD3.3V 22 - 42 B_SPI0_MISO/ADDR_CF0

3 PVDD_AUDIO 23

M4_Port1_I2SLRCLK/AC_SYNC

(M4_Port1_I2SSCLK/AC_BITCLK)

43 XEINT4/KP_ROW4

4 VDD3.3V 24 - 44 B_SPI0_MOSI/ADDR_CF2

5 M4_Port1_I2SCDCLK/AC_RSTn 25 M4_Port1_I2SSDI/AC_S

DI 45 TP

6 B_HSMMC_DAT5/i2sV40_CDCLK 26 - 46 TP

7 M4_Port0_I2SDO/AC97_SDO 27 M4_Port1_I2SDO/AC97

_SDO 47 XEINT6/KP_ROW6

8 B_HSMMC_DAT4/i2sV40_BCLK 28 - 48 TP


53

9 M4_Port0_I2SSDI/AC_SDI 29 GND 49 XEINT7/KP_ROW7

10 B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 30 - 50 B_PWR_5V

11

M4_Port0_I2SLRCLK/AC_SYNC

(M4_Port0_I2SSCLK/AC_BITCLK)

31 TP 51 GND

12 B_SPI1_CLK/MMC2_CLK/i2sV40_DO1 32 TP 52 B_PWR_5V

13

M4_Port0_I2SCDCLK/AC_RSTn

(M4_Port0_I2SLRCLK/AC_SYNC)

33 TP 53 XnRSTOUT

14 B_SPI1_CSn/i2sV40_DO2 34 TP 54 B_PWR_5V

15

M4_Port0_I2SSCLK/AC_BITCLK

(M4_Port0_I2SCDCLK/AC_RSTn)

35 TP 55 TP

16 B_HSMMC_DAT7/i2sV40_DI 36 TP 56 B_PWR_5V

17 Xi2cSDA0 37 TP 57 TP

18 B_HSMMC_DAT6/i2sV40_LRCLK 38 TP 58 B_PWR_5V

19 Xi2cSCL0 39 - 59 GND 20 - 40 GND 60 GND

CPU BASE


54

MODULE5 INTERFACE CONNECTOR (FOR LCD BOARD) (with Touch Screen) TFT LCD controllers are equipped in the S3C6410X. TFT LCD, touch panel and LCD backlight driver are supported in the SMDK6410.

Part Name Module 5 Model Name LTE480WV-F01

Pannel Size 4.8”

#pixels 800x480

I/F type 24bit RGB

Back-Light Unit 14 LED(4pin)

Connector type 60pin


55

XPWM_ECLK[2,5]

XVD2

CB86

100nF/C1608

R394 0/R1608

LCD_SPIMISO

U40

ECLAMP2378P

12345678

161514131211109

17

XVD12

TP92

R412 0/R1608

XVD5

+ CTB70

10uF,16V/T3216

LCD_SPIMOSI

WLED_OUT1[2]

XVD1

R411 NC/R1608

PWM_TOUT0[2,5]R403 0/R1608

R399 0/R1608

B_PWR_5V

U42

ECLAMP2378P

12345678

161514131211109

17

XVD18

CB87

100nF/C1608

R400 NC/R1608

R446 0/R1608

LCD_SPICLK

R447 0/R1608

XhiINTR[2,10]

XVD21

R410 0/R1608

VDD3.3V

XVD10

LCD_PANNEL_ON

XVD8

XVD7

XVD15

XHSYNC[2]

R406 NC/R1608

XVD4

LCD_RESET

R448 0/R1608

R414 0/R1608

PWM_TOUT1[2,5]


XVD23

TFT LCD

XVD0

CB85

100nF/C1608

R397 0/R1608

M5

GF056-60S-LSS-P2000

123456789

101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960

+

CTB69

10uF,6.3V/T2012

XVD[23:0][2]

B_SPI0_MISO/ADDR_CF0[2,14,15]

XVD14

XVD22

U41

ECLAMP2378P

12345678

161514131211109

17

Xadc_AIN7_XP[2]

R452 0/R1608

XVD19

R401 0/R1608

B_SPI0_CLK/ADDR_CF1[2,14]

WHITE_LED[2]

PVDD_LCD

XVD16

Xadc_AIN5_YP[2]Xadc_AIN6_XM[2]

B_SPI0_CSn[2,14]

PVDD_LCD

B_SPI0_MOSI/ADDR_CF2[2,14,15]

XVD20

XEINT4/KP_ROW4[2,10,13,15]

R398 0/R1608

R396 0/R1608

R405 NC/R1608

R395 NC/R1608

Xadc_AIN4_YM[2]


XVD11

MODULE 5

R402 NC/R1608

XVCLK[2]

C57100pF/C1608

XVD3


R404 0/R1608

XnRSTOUT[2,10..15]

XVD9

R413 0/R1608

TP91+

CTB68

10uF,6.3V/T2012

VDD3.3V

XVD6

XVSYNC[2]XVDEN[2]

XVD13

XVD17

R449 NC/R1608 LCD_NSS

R415 NC/R1608

Figure 30 Module5 TFT LCD Connector (4.8”)


56

# of pin Descriptions # of pin Descriptions # of pin Descriptions 1 XVD0 21 XVD21 41 Xadc_AIN5_YP 2 XVD2 22 XVD22 42 Xadc_AIN6_XM 3 XVD3 23 XVD23 43 Xadc_AIN7_XP 4 XVD4 24 XVD24 44 GND 5 XVD5 25 GND 45 PWM_TOUT1 6 XVD6 26 VDD3.3V (PVDD_LCD) 46 GND 7 XVD7 27 VDD3.3V (PVDD_LCD) 47 XPWM_ECLK

8 XVD8 28 TP 48 XEINT5/KP_ROW5 (PWM_TOUT0, XnRSTOUT)

9 XVD9 29 WHITE_LED 49 XEINT5/KP_ROW5 (PWM_TOUT0, XnRSTOUT)

10 XVD10 30 WHITE_LED 50 GND

11 XVD11 31 TP 51 XEINT4/KP_ROW4 (B_SPI0_CLK/ADDR_CF1)

12 XVD12 32 XVCLK 52 XEINT6/KP_ROW6 (B_SPI0_MOSI/ADDR_CF2)

13 XVD13 33 XHSYNC 53 XEINT7/KP_ROW7 (B_SPI0_MISO/ADDR_CF0)

14 XVD14 34 XVSYNC 54 XhiINTR (B_SPI0_CSn) 15 XVD15 35 XVDEN 55 VDD3.3V (PVDD_LCD) 16 XVD16 36 - 56 VDD3.3V (PVDD_LCD) 17 XVD17 37 WLED_OUT1 57 B_PWR_5V 18 XVD18 38 WLED_OUT1 58 B_PWR_5V 19 XVD19 39 GND 59 GND 20 XVD20 40 Xadc_AIN4_YM 60 GND

CPU BASE


57

SMDK SCHEMATIC REVISION POINTS This document contains information of corrected points on the schematic of SMDK6410. The corrected points are highlighted in pink-circled in schematic of SMDK6410 Rev 0.2.

REVISION POINTS TABLE

Boards Page Contents Corrected points (ECN: Engineer Change Note)

Damping resistor Add R969 0 ohm. 9

Support Battery by PMIC module

Jack1 peripheral circuit changed.

CPU Board

10 Changed mDDR U20 and U22 are changed part number from K4X51163PC-FGC3 to K4X51163PE-FGC3 (FGC6).

3 Selectable NAND write protection function

Add CFG7 switch, and write protection control signal changed from XEINT1/KP_ROW1 to B_SPIO_MOSI/ADDR_CF2.

14 M1 connector R458 and R459 are added. R307 and R308 are changed from 0 ohm to NC (Not connection).

Base Board

17 Over voltage protection

Add ZD1.


58

SMDK SCHEMATIC There are 2 parts of SMDK Schematic.

1. CPU Board Rev0.2 (SMC805C)

2. Base Board Rev0.2 (SMC807C)

3. LCD Board Rev0.1 (SMT710B)

Note. It is easy to find schematic parts by using Bookmarks on PDF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Table of Contents

Description

SMDK6410 CPU B'd (S3C6410 Evaluation Board) SchematicsDateRevision

Page Function-------------------------------------------------------01 Revision History02 S3C6410 (Addr/Data)/SW-TACT03 S3C6410 (I/O 1)04 S3C6410 (I/O 2)/ADC05 S3C6410 (Power)06 Power (ARM,INT)07 Power (PLL,Alive,RTC)/USB Host/USB OTG08 Power (I/O)09 PMIC Socket10 Memory (mDDR)11 Buffers (SROM IF)12 Buffers Control (SROM IF)13 SD_MMC/SPI14 oneNAND/MIPI/JTAG/CLK15 Camera Interface16 B2B Connector

Rev 0.0 2008. 02.20 Preliminary Version

Part Reference<Component><Number>---------------------------------------------------U : Component or Regurator ICC : CapacitorCB : Capacitor BypassCT : Capacitor TantalCTB : Capacitor Tantal BypassJ : JumperJB : CPU or Base connectorJP : Jumper PowerR : ResistorRA : Resistor ArrayRP : Resistor PowerVR : Variable ResistorL : InductorFB : Ferrite BeadOSC : OscillatorX : X-tal (Crystal)Q : Transistor or FETD : DiodeZD : Zener DiodeLED : LED DiodeSW : SWitch Tact/PushCON : CONnectorCFG : ConFiGure switch (DIP/Slide)TP : Test Point (SMD)TPH : Test Point Hole (Through Hole)MTH: Mount Through HoleMOD : MODule Interface connector

Rev 0.1 2008. 04.02 Second Version (Refer to Sheet 2,4,6,7,8,9,13,14 and 15)Rev 0.2 2008. 04.30 Third Version (Refer to Sheet 3, 8, 9 and 10)

2008. 06.18 Changed boot mode table (Refer to Sheet 14), U21 not available.

Revision History 0.2

SMDK6410 CPU Board (S3C6410 Evaluation Board)

A3

1 16Wednesday, June 18, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

<Silk>nRESET

WRESET<Silk>

<Silk>nBATF

<Silk>PMIC ON

S3C6410 (Addr/Data)/SW-TACT 0.2


A3




Date: Sheet of

Xm0DATA14

Xm0DATA3

Xm0ADDR6

Xm0DATA4

Xm0ADDR7

Xm1ADDR0

Xm1ADDR5

Xm0ADDR2

Xm0ADDR12

Xm0DATA7

Xm0ADDR5

Xm1ADDR4

Xm1ADDR12

Xm0DATA13

Xm0DATA11

Xm0DATA2

Xm1ADDR3

Xm0ADDR10

Xm0ADDR1

Xm0DATA12

Xm0ADDR11

Xm0DATA6

Xm0ADDR4

Xm1ADDR8

Xm0DATA10

Xm0DATA1

Xm1ADDR15

Xm0DATA0

Xm0ADDR15

Xm0ADDR9

Xm1ADDR2

Xm0ADDR0

Xm0ADDR13

Xm0DATA5

Xm0ADDR3

Xm1ADDR7

Xm0DATA9

Xm1ADDR11

Xm1ADDR14

Xm0DATA15

Xm0ADDR14

Xm0ADDR8

Xm1ADDR1

Xm1ADDR6

Xm1ADDR9

Xm0DATA8

Xm1ADDR10

Xm1ADDR13

Xm

1DA

TA28

Xm

1DA

TA0

Xm

1DA

TA24

Xm

1DA

TA27

Xm

1DA

TA14

Xm

1DA

TA19

Xm

1DA

TA22

Xm

1DA

TA7

Xm

1DA

TA12

Xm

1DA

TA13

Xm

1DA

TA8

Xm

1DA

TA17

Xm

1DA

TA31

Xm

1DA

TA26

Xm

1DA

TA30

Xm

1DA

TA21

Xm

1DA

TA16

Xm

1DA

TA6

Xm

1DA

TA4

Xm

1DA

TA11

Xm

1DA

TA2

Xm

1DA

TA10

Xm

1DA

TA1

Xm

1DA

TA29

Xm

1DA

TA18

Xm

1DA

TA3

Xm

1DA

TA20

Xm

1DA

TA25

Xm

1DA

TA15

Xm

1DA

TA23

Xm

1DA

TA5

Xm

1DA

TA9

XnBATF [3,9]

XWRESET [3]

Xm0ADDR17 [11]Xm0ADDR18 [11]Xm0ADDR19 [11]

Xm0ADDR16 [11]

Xm0ADV[14]

Xm0OEata/SS_GPO2[12]

Xm0RDY1/CLE[11,14]

Xm0CASn [10]

Xm0CData/SS_GPO3[12]

Xm1CKE1 [10]

Xm0SMCLK[14]

Xm0INTsm0/FWEn[11,14]

Xm1RASn [10]

Xm1CSn0 [10]

Xm0AP [10]

Xm0DQM1/BE1 [10,11]

Xm0CSn0[11,12]

Xm0INTsm1/FREn[11,12,14]

Xm1CASn [10]

Xm0WEndmc [10]

Xm1CSn1 [10]

Xm0CSn1[11,12]

Xm0RPn/RnB[14]

Xm0CKE [10]

Xm1WEn [10]

Xm1ADDR[15:0] [10]

Xm0DQS1 [10]

Xm0RASn [10]

Xm0DQM0/BE0 [10,11]

Xm0RASn[10]

Xm0DATA[15:0][10,11,14]

Xm0CSn2[14]

Xm0RSTata/SS_IMG_IN[12]

Xm0WEata/SS_GPO1[12]

Xm0SCLKn [10]

Xm0ADDR[15:0][10,11]

Xm0CSn5[11,12]

Xm0DQS0 [10]Xm0CSn3[14]

Xm0WAITn/IORDY[11]

Xm0SCLK [10]

Xm0CASn[10]

Xm1DATA[31:0] [10]

Xm0REGata/SS_GPO0[12]

Xm0AP[10]

Xm0OEn/nIORD_CF[11,12,14]

Xm0CSn4[11,12]

Xm0INTata/SS_REAL_IN[12]

Xm0CSn7[10,12]


Xm0INPACKata/SS_TCXO_CLK[12]

Xm0RDY0/ALE[11,14]

Xm1CKE0 [10]

AP_nRESET[16]Modem_nRESET[16]

XnRESET [3,6,14,16]

nRESET [9]

nRESET[9]

PMIC_nRST_OUT[9]

PMIC_ONKEYn [9]

Xm0WEndmc[10]

Xm1DQS2 [10]

Xm1DQM2 [10]

Xm1DQS0 [10]Xm1DQS1 [10]

Xm1DQS3 [10]

Xm1DQM0 [10]

Xm1DQM3 [10]

Xm1DQM1 [10]

Xm1SCLKn [10]Xm1SCLK [10]

VDD_D

VDD_D

VDD_D

VDD_D

C_PWR_5V

VDD_D

R17 0/R1005

R12

100K/R1005

R960 10/R1005

R13

10K/R1005

R8

10K

/R10

05

TP4XnRESET

R2 NC/R1005R1 NC/R1005

R962 10/R1005

R1410K/R1005

U2

SN74LVC1G17DBV

5

2

3

4

R5

10K

/R10

05

U4

MAX6412UK22

1

4

5

3

2

nRESET

SRT

VCC

nMR

GND

CB1 100nF

SW1SW-TACT (Gray)

3 41 2

R955 10/R1005

R10

100K/R1005

TP1nBATF

R956 10/R1005

R3 NC/R1005

CB2 100nF

U5

SN74LVC1G17DBV

5

2

3

4

U3

SN74LVC1G17DBV

5

2

3

4

R4 NC/R1005

R957 10/R1005

R966 10/R1005

TP3ONKEYn

Memory Port0

Memory Port1

U1AS3C6410

C1E3D1D2H7E1F2G4F1J8G2G1H4H2J4H3

N2N1M7N3M8P2N4P3M2M4L7M3L8L2K4K1

L4J2Y2L3

H23

G25

G23

E24

G24

F25

F24

F23

D16

B15

D15

C15

C13

A12

B13

B12

D10

C11

B10

A11

D11

C12

A10

D12

C9

A9

C8

C6

B7

C7

A6

B6

N7

R3

P4

R2

T3 N8

T2 P7

R4

R8

W2

Y3

U4

Y1

R7

W3

AA

2A

A3

V4

AB

3U

7

L1 K7

U2

P8

T1 U1

V3

T4 V2

U3

J1

L25M17K22K24K19M23J22K23K18J25K25L19H25J23J24H24

L18L23

E25B14G9D9H22D14G8A5

M19L24L22A14A13M24M18

Xm0ADDR0Xm0ADDR1Xm0ADDR2Xm0ADDR3Xm0ADDR4Xm0ADDR5Xm0ADDR6/GPO6Xm0ADDR7/GPO7Xm0ADDR8/GPO8Xm0ADDR9/GPO9Xm0ADDR10/GPO10Xm0ADDR11/GPO11Xm0ADDR12/GPO12Xm0ADDR13/GPO13Xm0ADDR14/GPO14Xm0ADDR15/GPO15

Xm0DATA0Xm0DATA1Xm0DATA2Xm0DATA3Xm0DATA4Xm0DATA5Xm0DATA6Xm0DATA7Xm0DATA8Xm0DATA9Xm0DATA10Xm0DATA11Xm0DATA12Xm0DATA13Xm0DATA14Xm0DATA15

Xm0OEn/nIORD_CFXm0WEn/nIOWR_CFXm0ADV/GPP0Xm0SMCLK/GPP1

Xm

1DA

TA31

Xm

1DA

TA30

Xm

1DA

TA29

Xm

1DA

TA28

Xm

1DA

TA27

Xm1D

ATA2

6/Xm

0AD

DR

26Xm

1DAT

A25/

Xm0A

DD

R25

Xm1D

ATA2

4/Xm

0AD

DR

24Xm

1DAT

A23/

Xm0A

DD

R23

Xm1D

ATA2

2/Xm

0AD

DR

22Xm

1DAT

A21/

Xm0A

DD

R21

Xm1D

ATA2

0/Xm

0AD

DR

20Xm

1DAT

A19/

Xm0A

DD

R19

Xm1D

ATA1

8/Xm

0AD

DR

18Xm

1DAT

A17/

Xm0A

DD

R17

Xm1D

ATA1

6/Xm

0AD

DR

16X

m1D

ATA

15X

m1D

ATA

14X

m1D

ATA

13X

m1D

ATA

12X

m1D

ATA

11X

m1D

ATA

10X

m1D

ATA

9X

m1D

ATA

8X

m1D

ATA

7X

m1D

ATA

6X

m1D

ATA

5X

m1D

ATA

4X

m1D

ATA

3X

m1D

ATA

2X

m1D

ATA

1X

m1D

ATA

0

Xm

0CS

n0X

m0C

Sn1

Xm

0CS

n2/G

PO

0X

m0C

Sn3

/GP

O1

Xm

0CS

n4/G

PO

2X

m0C

Sn5

/GP

O3

Xm

0CS

n6/G

PO

4X

m0C

Sn7

/GP

O5

Xm

0WA

ITn/

IOR

DY

/GP

P2

Xm

0RD

Y0/

ALE

/GP

P3

Xm

0RD

Y1/

CLE

/GP

P4

Xm

0IN

Tsm

0/FW

En/

GP

P5

Xm

0IN

Tsm

1/FR

En/

GP

P6

Xm

0RP

n/R

nB/G

PP

7

Xm

0IN

Tata

/SS

_RE

ALI

N/G

PP

8X

m0R

STa

ta/S

S_I

MG

IN/G

PP

9X

m0I

NP

AC

Kat

a/S

S_T

CX

O/G

PP

10X

m0R

EG

ata/

SS

_GP

O0/

GP

P11

Xm

0WE

ata/

SS

_GP

O1/

GP

P12

Xm

0OE

ata/

SS

_GP

O2/

GP

P13

Xm

0CD

ata/

SS

_GPO

3/G

PP14

Xm

0DQ

M0/

BE

0X

m0D

QM

1/B

E1

Xm

0RA

S/A

DD

R18

/GP

Q0

Xm

0CA

S/A

DD

R19

/GP

Q1

Xm

0SC

LK/G

PQ

2X

m0S

CLK

n/G

PQ

3X

m0C

KE

/GP

Q4

Xm0D

QS0

/GPQ

5Xm

0DQ

S1/G

PQ6

Xm

0WE

ndm

c/A

DD

R17

/GP

Q7

Xm

0AP

dmc/

AD

DR

16/G

PQ

8

Xm1ADDR15Xm1ADDR14Xm1ADDR13Xm1ADDR12Xm1ADDR11Xm1ADDR10

Xm1ADDR9Xm1ADDR8Xm1ADDR7Xm1ADDR6Xm1ADDR5Xm1ADDR4Xm1ADDR3Xm1ADDR2Xm1ADDR1Xm1ADDR0

Xm1CSn1Xm1CSn0

Xm1DQS3Xm1DQS2Xm1DQS1Xm1DQS0Xm1DQM3Xm1DQM2Xm1DQM1Xm1DQM0

Xm1WEnXm1CASnXm1RASn

Xm1SCLKnXm1SCLKXm1CKE1Xm1CKE0

R7

10K

/R10

05

SW4SW-TACT (Red)

3 41 2

R958 10/R1005

CB4

100nF

R16 0/R1005

R18 NC/R1005

R963 10/R1005

R965 10/R1005

U6

SN74LVC1G11DBV

13

25

46

CB3 100nF

R15

0/R1005

R961 10/R1005

SW2SW-TACT (Gray)

3 41 2

R964 10/R1005

R6

10K

/R10

05

SW3SW-TACT (Red)

3 41 2

C1

100nF

TP2WRESET

R959 10/R1005

R11

100K/R1005

R967 10/R1005

R9

100K/R1005

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Changed on04/30/2008

S3C6410 (I/O 1) 0.2


A3




Date: Sheet of

XuRXD_0[16]XuTXD_0[16]

XuCTSn_0/ADDR_CF0[16]XuRTSn_0/ADDR_CF1[16]

XuRXD_1[16]XuTXD_1[16]

XuCTSn_1/ADDR_CF0[16]XuRTSn_1/ADDR_CF1[16]

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0[16]XuTXD_2/ExdACK/IrTXD/ADDR_CF1[16]

XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1[11,16]XuTXD_3/ExdACK/IrTXD/Xi2cSDA1[16]

XirSDBW[12,15,16]

Xi2cSCL0[9,15,16]Xi2cSDA0[9,15,16]

XspiMISO0/ADDR_CF0[13]XspiCLK0/ADDR_CF1[13]XspiMOSI0/ADDR_CF2[13]

XspiCS0[13]XspiMISO1/mmcCMD2[13]XspiCLK1/mmcCLK2[13]

XspiMOSI1[13]XspiCS1[13]

XusbhDP[7]XusbhDN[7]

XotgDP[7]XotgDM[7]XotgTI[7]XotgTO[7]XREXT[7]XVBUS[7,9]XotgID[7]

XotgDRV_VBUS[7]

XmmcCLK0/ADDR_CF0[13]XmmcCMD0/ADDR_CF1[13]

XmmcDATA0_0/ADDR_CF2[13]XmmcDATA0_1[13]XmmcDATA0_2[13]XmmcDATA0_3[13]

XmmcCDN0/mmcCDN1[13]XmmcCLK1/ADDR_CF0[13]XmmcCMD1/ADDR_CF1[13]

XmmcDATA1_0/ADDR_CF2[13]XmmcDATA1_1[13]XmmcDATA1_2[13]XmmcDATA1_3[13]

XmmcDATA1_4/mmcDATA2_0/ADDR_CF0[13]XmmcDATA1_5/mmcDATA2_1/ADDR_CF1[13]XmmcDATA1_6/mmcDATA2_2/ADDR_CF2[13]


XPCM_SOUT1/I2S_DO1/AC97_SDO0[9,16]

XPCM_FSYNC1/I2S_LRCLK1/AC97_SYNC0[9,16]XPCM_EXTCLK1/I2S_CDCLK1/AC97_RSTn0[9,16]

XPCM_DCLK1/I2S_CLK1/AC97_BITCLK0[9,16]

XPCM_SIN1/I2S_DI1/AC97_SDI0[9,16]

XPCM_SOUT0/I2S_DO0/AC97_SDO0[9,16]XPCM_SIN0/I2S_DI0/AC97_SDI0[9,16]

XPCM_DCLK0/I2S_CLK0/AC97_BITCLK0/ADDR_CF0[9,16]XPCM_EXTCLK0/I2S_CDCLK0/AC97_RSTn0/ADDR_CF1[9,16]XPCM_FSYNC0/I2S_LRCLK0/AC97_SYNC0/ADDR_CF2[9,16]

XTRSTn[14]XTMS[14]XTCK[14]XTDI[14]XTDO[14]XRTCK[14]

XDBGSEL[14]

XOM0[14]XOM1[14]XOM2[14]XOM3[14]XOM4[14]

XnRSTOUT [16]XWRESET [2]XnRESET [2,6,14,16]

XSELNAND [14]XnBATF [2,9]XPWRRGTON [7,9]

XXTI [14]XXTO [14]

X27MXTO [14]X27MXTI [14]XrtcXTO [14]XrtcXTI [14]

XPWM_TOUT1XPWM_TOUT0XPWM_ECLK [8,13,16]

XEINT0/KP_ROW0 [16]XEINT1/KP_ROW1 [16]XEINT2/KP_ROW2 [16]XEINT3/KP_ROW3 [16]XEINT4/KP_ROW4 [16]XEINT5/KP_ROW5 [16]XEINT6/KP_ROW6 [16]XEINT7/KP_ROW7 [8,16]XEINT8/ADDR_CF0 [16]XEINT9/ADDR_CF1 [16]XEINT10/ADDR_CF2 [16]XEINT11 [6,16]

XEINT12 [6,13,16]XEINT13 [6,13,16]XEINT14 [6,16]XEINT15 [6,16]

XEXTCLK [14]

PMIC_XEINT12_IRQn [9]

Xi2cSCL0[9,15,16]

PWM_TOUT1 [16]XPWM_TOUT1

Xi2cSDA0[9,15,16]

PWM_TOUT0 [16]XPWM_TOUT0

VDD_D

TP5XEFFVDD

R25 0/R1005

R21 NC/R1005

R22

2K/R1005

R19

0/R1005

UART/IrDA

I2C

HS-SPI

USBH

OTG2.0

HS-MMC

Audio

PWM Timer

CLOCK

JTAG

EINT

U1BS3C6410

D20A23G16A22J15B22H15C22D19A21J14B21G15

A20G14

B20H14A19C20B19H12C19D17

N22P22

AE10AE9AD7AD8AC8AD9

AD10AE11

A18

G13

B18

H13

C18

G12

A17

J11

A16

H11

C17

B16

H10

A15

G11

C16

H9

D7

B5

D6

B4

A3

C5

B3

C4

B2

C3

AE17V10AD17AB17AE18AC18V11AC19W12AE19AB18AD19V12AE20W13AD20

C23H16D23

AB9AD12AB15AB14AC16AC17

AB

10A

E12

AB

11A

B12

AC

12A

E13

AB

13

AD

13W

9A

C13

V8

AE

14

AD

14A

E15

AB

16T7 V

9A

D15

AD

16

W11

XuRXD0/GPA0XuTXD0/GPA1XuCTSn0/GPA2/ADDR_CF0XuRTSn0/GPA3/ADDR_CF1XuRXD1/GPA4XuTXD1/GPA5XuCTSn1/GPA6/ADDR_CF0XuRTSn1/GPA7/ADDR_CF1XuRXD2/ExdREQ/IrRXD/GPB0/ADDR_CF0XuTXD2/ExdACK/IrTXD/GPB1/ADDR_CF1XuRXD3/IrRXD/ExdREQ/GPB2/ADDR_CF2/Xi2cSCL1XuTXD3/IrTXD/ExdACK/GPB3/Xi2cSDA1XirSDBW/XcamFIELD/BUF_DIR/GPB4

Xi2cSCL0/GPB5Xi2cSDA0/GPB6

XspiMISO0/ADDR_CF0/GPC0XspiCLK0/ADDR_CF1/GPC1XspiMOSI0/ADDR_CF2/GPC2XspiCS0/GPC3XspiMISO1/mmcCMD2/GPC4/Xi2sV40_DO0XspiCLK1/mmcCLK2/GPC5/Xi2sV40_DO1XspiMOSI1/GPC6XspiCS1/GPC7/Xi2sV40_DO2

XusbDPXusbDN

XotgDPXotgDMXotgTIXotgTOXREXTXVBUSXotgIDXotgDRV_VBUS

Xmm

cCLK

0/AD

DR

_CF0

/GPG

0Xm

mcC

MD

0/AD

DR

_CF1

/GPG

1X

mm

cDA

TA0_

0/A

DD

R_C

F2/G

PG

2X

mm

cDA

TA0_

1/G

PG

3X

mm

cDA

TA0_

2/G

PG

4X

mm

cDA

TA0_

3/G

PG

5

Xmm

cCD

N0/

mm

cCD

N1/

GPG

6Xm

mcC

LK1/

kpC

OL0

/AD

DR

_CF0

/GPH

0Xm

mcC

MD

1/kp

CO

L1/A

DD

R_C

F1/G

PH1

Xm

mcD

ATA

1_0/

kpC

OL2

/AD

DR

_CF2

/GP

H2

Xm

mcD

ATA

1_1/

kpC

OL3

/GP

H3

Xm

mcD

ATA

1_2/

kpC

OL4

/GP

H4

Xm

mcD

ATA

1_3/

kpC

OL5

/GP

H5

Xm

mcD

ATA

1_4/

mm

cDA

TA2_

0/kp

CO

L6/i2

sV40

_BC

LK/A

DD

R_C

F0/G

PH

6X

mm

cDA

TA1_

5/m

mcD

ATA

2_1/

kpC

OL7

/i2sV

40_C

DC

LK/A

DD

R_C

F1/G

PH

7X

mm

cDA

TA1_

6/m

mcD

ATA

2_2/

i2sV

40_L

RC

LK/A

DD

R_C

F2/G

PH

8X

mm

cDA

TA1_

7/m

mcD

ATA

2_3/

i2sV

40_D

I/GP

H9

Xpc

mD

CLK

0/I2

sCLK

/BIT

CLK

/AD

DR

_CF0

/GP

D0

Xpc

mE

XTC

LK0/

i2sC

DC

LK/R

ES

ETn

/AD

DR

_CF1

/GP

D1

Xpc

mFS

YN

C0/

i2sL

RC

K/S

YN

C/A

DD

R_C

F2/G

PD

2X

pcm

SIN

0/i2

sDI/S

DI/G

PD

3X

pcm

SO

UT0

/i2sD

O/S

DO

/GP

D4

Xpc

mD

CLK

1/i2

sCLK

/BIT

CLK

/GP

E0

Xpc

mE

XTC

LK1/

i2sC

DC

LK/R

ES

ETn

/GP

E1

Xpc

mFS

YN

C1/

i2sL

RC

K/S

YN

C/G

PE

2X

pcm

SIN

1/i2

sDI/S

DI/G

PE

3X

pcm

SO

UT1

/i2sD

O/S

DO

/GP

E4

XEINT0/kpROW0/GPN0XEINT1/kpROW1/GPN1XEINT2/kpROW2/GPN2XEINT3/kpROW3/GPN3XEINT4/kpROW4/GPN4XEINT5/kpROW5/GPN5XEINT6/kpROW6/GPN6XEINT7/kpROW7/GPN7

XEINT8/ADDR_CF0/GPN8XEINT9/ADDR_CF1/GPN9

XEINT10/ADDR_CF2/GPN10XEINT11/GPN11XEINT12/GPN12XEINT13/GPN13XENT14/GPN14

XEINT15/GPN15

XpwmECLK/GPF13XpwmTOUT0/XCLKOUT/GPF14

XpwmTOUT1/GPF15

XrtcXTIXrtcXTO

X27MXTIX27MXTO

XXTIXXTO

XTR

STn

XTM

SX

TCK

XTD

IX

TDO

XR

TCK

XD

BG

SE

L

XOM

0XO

M1

XOM

2XO

M3

XOM

4

XP

WR

RG

TON

XnB

ATF

XS

ELN

AN

DX

EFF

VD

D

XnR

ES

ET

XW

RE

SE

TX

nRS

TOU

T

XEXTCLK

R23

2K/R1005

TP8XCLKOUT

TP7XPWRRGTON

TP6XnRSTOUT

R24 0/R1005

R20 0/R1005

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ADC

S3C6410 (I/O 2)/ADC 0.2


A3




Date: Sheet of

XV

D0

XV

D1

XV

D2

XV

D3

XV

D4

XV

D5

XV

D6

XV

D7

XV

D8

XV

D9

XV

D10

XV

D11

XV

D12

XV

D13

XV

D14

XV

D15

XV

D16

XV

D17

XV

D18

XV

D19

XV

D20

XV

D21

XV

D22

XV

D23

XciYDATA4XciYDATA5XciYDATA6XciYDATA7

XciYDATA1XciYDATA0

XciYDATA2XciYDATA3

XciCLK[15]XciHREF[15]XciPCLK[15]

XciVSYNC[15]XciRSTn[15]

Xadc_AIN0Xadc_AIN1Xadc_AIN2Xadc_AIN3

XdacOUT_0[16]XdacOUT_1[16]

XciYDATA[7:0][15]

XVD[23:0][16]XHSYNC[16]XVSYNC[16]XVDEN[16]XVCLK[16]

Xhi_A12/IORDY_CF[16]Xhi_A11/IOWR_CF[16]Xhi_A10/IORD_CF[6,16]Xhi_A9/CE_CF1[6,16]Xhi_A8/CE_CF0[6,16]

Xhi_A7/KP_COL7/Xm0CData[16]Xhi_A6/KP_COL6/Xm0REGata[16]Xhi_A5/KP_COL5/Xm0INPACKata[16]Xhi_A4/KP_COL4/Xm0RSTata[16]Xhi_A3/KP_COL3/Xm0INTata[16]Xhi_A2/ADDR_CF2/KP_COL2[16]Xhi_A1/ADDR_CF1/KP_COL1[16]Xhi_A0/ADDR_CF0/KP_COL0[16]

Xhi_D0/rxREADY/DATA_CF0[14]Xhi_D1/rxWAKE/DATA_CF1[14]Xhi_D2/rxFLAG/DATA_CF2[14]Xhi_D3/rxDATA/DATA_CF3[14]Xhi_D4/txREADY/DATA_CF4[14]Xhi_D5/txWAKE/DATA_CF5[14]Xhi_D6/txFLAG/DATA_CF6[14]Xhi_D7/txDATA/DATA_CF7[14]

XhiINTR[8,12,16]XhiOEn/CF_IORDY[16]XhiWEn/CF_IOWR[16]XhiCSn_sub/CF_IORD[16]XhiCSn/CE_CF0[16]XhiCSnmain/CE_CF1[16]

Xhi_D17/DATA_CF9[16]Xhi_D16/DATA_CF8[16]

Xhi_D15/DATA_CF15/KP_ROW7[16]Xhi_D14/DATA_CF14/KP_ROW6[16]Xhi_D13/DATA_CF13/KP_ROW5[16]Xhi_D12/DATA_CF12/KP_ROW4[16]Xhi_D11/DATA_CF11/KP_ROW3[16]Xhi_D10/DATA_CF10/KP_ROW2[16]Xhi_D9/DATA_CF9/KP_ROW1[16]Xhi_D8/DATA_CF8/KP_ROW0[16]

Xadc_AIN3

Xadc_AIN0Xadc_AIN1Xadc_AIN2

Xadc_AIN7_XP [16]

Xadc_AIN5_YP [16]Xadc_AIN4_YM [16]

Xadc_AIN6_XM [16]

Xadc_AIN7



Xadc_AIN7

VDD_DAC

R26

6.49K/R1005

TP9DACVREF

CB5

100nF

C3

1.8nF

CAM I/F

DAC(TV)

ADC

DISPLAY

Host I/F

U1C

S3C6410

G22D25F22H19D24C25E23C24G18H17B24G17B23

AC6AE5AE6AE7AC7

AC1AC2AD2AD3AE3AD4AE4AC3

Y4

AE

21W

14A

E22

V13

AD

21A

B20

W15

AE

23V

14A

C21

AC

22W

16V

15A

D23

W17

AC

24V

16A

D24

Y22

AC

25A

B25

AB

24W

18A

B23

AA

25W

22A

A24

V19

U19

W24

U18

W23

U22

V25

V23

T18

U25

T19

U24

U23

R19

T25T22T24T23R23R22R24R25P25P19P23P18N25N24N18N23N17M25

AA23V18

Y24Y23V22W25

XciCLK/GPF0XciHREF/GPF1XciPCLK/GPF2XciRSTn/GPF3XciVSYNC/GPF4XciYDATA0/GPF5XciYDATA1/GPF6XciYDATA2/GPF7XciYDATA3/GPF8XciYDATA4/GPF9XciYDATA5/GPF10XciYDATA6/GPF11XciYDATA7/GPF12

XdacOUT_0XdacOUT_1XdacIREFXdacVREFXdacCOMP

Xadc_AIN0Xadc_AIN1Xadc_AIN2Xadc_AIN3Xadc_AIN4Xadc_AIN5Xadc_AIN6Xadc_AIN7

XpllEFLITER

XvV

D0/

GP

I0X

vVD

1/G

PI1

XvV

D2/

GP

I2X

vVD

3/G

PI3

XvV

D4/

GP

I4X

vVD

5/G

PI5

XvV

D6/

GP

I6X

vVD

7/G

PI7

XvV

D8/

GP

I8X

vVD

9/G

PI9

XvV

D10

/GP

I10

XvV

D11

/GP

I11

XvV

D12

/GP

I12

XvV

D13

/GP

I13

XvV

D14

/GP

I14

XvV

D15

/GP

I15

XvV

D16

/GP

J0X

vVD

17/G

PJ1

XvV

D18

/GP

J2X

vVD

19/G

PJ3

XvV

D20

/GP

J4X

vVD

21/G

PJ5

XvV

D22

/GP

J6X

vVD

23/G

PJ7

XvH

SY

NC

/GP

J8X

vVS

YN

C/G

PJ9

XvV

DE

N/G

PJ1

0X

vVC

LK/G

PJ1

1

Xhi

AD

DR

0/kp

CO

L0/C

F_A

DD

R0/

GP

L0X

hiA

DD

R1/

kpC

OL1

/CF_

AD

DR

1/G

PL1

Xhi

AD

DR

2/kp

CO

L2/C

F_A

DD

R2/

GP

L2X

hiA

DD

R3/

kpC

OL3

/Xm

0IN

Tata

/GP

L3X

hiA

DD

R4/

kpC

OL4

/Xm

0RS

Tata

/GP

L4X

hiA

DD

R5/

kpC

OL5

/Xm

0IN

PA

CK

ata/

GP

L5X

hiA

DD

R6/

kpC

OL6

/Xm

0RE

Gat

a/G

PL6

Xhi

AD

DR

7/kp

CO

L7/X

m0C

Dat

a/G

PL7

Xhi

AD

DR

8/E

INT1

6/G

PL8

Xhi

AD

DR

9/E

INT1

7/G

PL9

Xhi

AD

DR

10/E

INT1

8/G

PL1

0X

hiA

DD

R11

/EIN

T19/

GP

L11

Xhi

AD

DR

12/E

INT2

0/G

PL1

2

XhiDATA0/rxREADY/CF_DATA0/GPK0XhiDATA1/rxWAKE/CF_DATA1/GPK1XhiDATA2/rxFLAG/CF_DATA2/GPK2XhiDATA3/rxDATA/CF_DATA3/GPK3

XhiDATA4/txREADY/CF_DATA4/GPK4XhiDATA5/txWAKE/CF_DATA5/GPK5XhiDATA6/txFLAG/CF_DATA6/GPK6XhiDATA7/txDATA/CF_DATA7/GPK7

XhiDATA8/kpROW0/CF_DATA8/GPK8XhiDATA9/kpROW1/CF_DATA9/GPK9

XhiDATA10/kpROW2/CF_DATA10/GPK10XhiDATA11/kpROW3/CF_DATA11/GPK11XhiDATA12/kpROW4/CF_DATA12/GPK12XhiDATA13/kpROW5/CF_DATA13/GPK13XhiDATA14/kpROW6/CF_DATA14/GPK14XhiDATA15/kpROW7/CF_DATA15/GPK15

XhiDATA16/EINT21/GPL13XhiDATA17/EINT22/GPL14

XhiCSn/CE_CF0/EINT23/GPM0XhiCSnmain/CE_CF1/EINT24/GPM1

XhiCSn_sub/CF_IORD/EINT25/GPM2XhiWEn/CF_IOWR/EINT26/GPM3XhiOEn/CF_IORDY/EINT27/GPM4

XhiINTR/BUF_DIR/GPM5

R30 0/R1005R29 0/R1005

R27 0/R1005R28 0/R1005

C2

100nF

CON1

HDR10-2.54-MALE

6810

3

79

24

5

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S3C6410 (Power) 0.2


A3




Date: Sheet of

VDD_MMCVDD_LCDVDD_RTC

VDD_INTVDD_ARM

VDD_MEM0

VDD_APLL VDD_EPLL VDD_ALIVE

VDD_APLLVDD_EPLLVDD_MPLL

VDD_MEM1

VDD_HI

VDD_DAC VDD_MPLL

VDD_MEM1

VDD_SYS VDD_PCM

VDD_HI VDD_EXT VDD_OTGVDD_OTGI

VDD_UH

VDD_OTG1

VDD_MEM0

VDD_SS

VDD_SYS

VDD_OTGI

VDD_LCD

VDD_INT

VDD_OTG1

VDD_ARM

VDD_ALIVE

VDD_UH

VDD_RTC

VDD_MMC

VDD_DAC

VDD_PCMVDD_EXT

VDD_OTG

VDD_SSVDD_ADC

CB46

100nF

CB32

100nF

CB37

100nF

+CTB4

10uF/6.3V/T2012

+CTB23

10uF/6.3V/T2012

CB51

100nF

+CTB16

10uF/6.3V/T2012

CB10

100nF

CB43

100nF

+CTB12

10uF/6.3V/T2012

+CTB20

10uF/6.3V/T2012

CB19

1uF

CB28

100nF

CB8

100nF

U1D

S3C6410

A8B11C2

C10D3D8E2F3J3K3

A7D13D18

H1J18L17M22

P1W1Y25

AC20AE16

R18U15

AB19W10

AA1AB1AB2

AC

11

F4 G3

K2

M1

R1

V1

B8

B9

C14

G10

J19

AC

15A

D18

AC

23A

D22

B17

A4

P24

V24

C21

N19

AC

9A

D11

AC

10

AC

4A

D6

H8J12K8L9N9R9P17U13

W4V7T8

J7M9

P9

U8W8AB6

H18J13R17U11U12U14V17AC14

AD5AC5

AB7AE8AB8

B1

A2

A24

B25

AE

24A

D25

AD

1A

E2

VDD_ARM0VDD_ARM1VDD_ARM2VDD_ARM3VDD_ARM4VDD_ARM5VDD_ARM6VDD_ARM7VDD_ARM8VDD_ARM9

VDD_INT0VDD_INT1VDD_INT2VDD_INT3VDD_INT4VDD_INT5VDD_INT6VDD_INT7VDD_INT8VDD_INT9VDD_INT10VDD_INT11

VDD_ALIVE0VDD_ALIVE1VDD_ALIVE2VDD_ALIVE3

VDD_APLLVDD_EPLLVDD_MPLL

VD

D_R

TC

VDD

_MEM

0_0

VDD

_MEM

0_1

VDD

_MEM

0_2

VDD

_MEM

0_3

VDD

_MEM

0_4

VD

D_S

S

VDD

_MEM

1_0

VDD

_MEM

1_1

VDD

_MEM

1_2

VDD

_MEM

1_3

VDD

_MEM

1_4

VD

D_S

YS

0V

DD

_SY

S1

VDD

_LC

D0

VDD

_LC

D1

VDD

_MM

CV

DD

_PC

MV

DD

_HI0

VD

D_H

I1V

DD

_EX

TVD

D_U

HVD

D_O

TG0

VDD

_OTG

1VD

D_O

TGI

VD

D_A

DC

VD

D_D

AC VSS_IP0

VSS_IP1VSS_IP2VSS_IP3VSS_IP4VSS_IP5VSS_IP6VSS_IP7

VSS_APLLVSS_EPLLVSS_MPLL

VSS_MEM0VSS_MEM1

VSS_SS

VSS_MEM3VSS_MEM4VSS_MEM5

VSS_PERI0VSS_PERI1VSS_PERI2VSS_PERI3VSS_PERI4VSS_PERI5VSS_PERI6VSS_PERI7

VSS_ADCVSS_DAC

VSS_OTG0VSS_OTG1VSS_OTGI

NC

0N

C1

NC

2N

C3

NC

4N

C5

NC

6N

C7

CB50

100nF

CB49

100nF

CB42

100nF

+CTB13

10uF/6.3V/T2012

+CTB21

10uF/6.3V/T2012

CB33

100nF

+CTB24

10uF/6.3V/T2012

+CTB6

1uF/6.3V/T2012

CB48

100nF

CB25

100nF

+CTB17

10uF/6.3V/T2012

+CTB8

10uF/6.3V/T2012

+CTB5

10uF/6.3V/T2012

+CTB3

10uF/6.3V/T2012

+CTB7

10uF/6.3V/T2012

CB36

100nF

CB18

10nF

CB41

100nF

CB26

100nF

CB31

100nF

CB13

100nF

+CTB14

10uF/6.3V/T2012

CB24

100nF

+CTB1

10uF/6.3V/T2012

CB12

100nF

R204 0/R1005

CB20

100nF

CB35

100nF

CB23

100nF

CB14

100nF

CB34

100nF

+CTB25

10uF/6.3V/T2012

CB44

100nF

CB17

100nF

CB40

100nF

FB1

BLM18BPG121

+CTB26

10uF/6.3V/T2012

CB45

100nF

CB30

100nF

+CTB22

10uF/6.3V/T2012

CB52

100nF

CB7

100nF

CB38

100nF

CB16

1uF

+CTB15

10uF/6.3V/T2012

CB56

100nF

CB22

1uF

+CTB27

10uF/6.3V/T2012

CB11

100nF

+CTB11

10uF/6.3V/T2012

FB2

BLM18BPG121

CB21

10nF

+CTB10

10uF/6.3V/T2012

+CTB9

10uF/6.3V/T2012

CB6

100nF

CB27

100nF

CB54

100nF

+CTB2

10uF/6.3V/T2012

+CTB19

10uF/6.3V/T2012

CB55

100nF

CB9

100nF

+CTB18

10uF/6.3V/T2012

CB29

100nF

CB15

100nF

CB53

100nF

CB39

100nF

CB47

100nF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

[4]

ON (1)

PWRControl Enable

[3]

OFF (0)

VDD_INT 1.2V

INT_REG_LE

VDD_INT 1.0V

CORE_REG_OE"Output H : LatchOutput Enable"

VDD_ARM 11=1.0V 10=1.1V[2][1] 01=1.2V 00=1.3V

nARM_REG_LE"Output H : DataChange"

[1]

PWRControl Disable

CFG1

[2]

ARM<Silk>

INT<Silk>

Power (ARM, INT) 0.2


A3




Date: Sheet of

CORE_PWR_OK[8]

XEINT13[3,13,16]XEINT14[3,16]

XEINT14[3,16]XEINT15[3,16]

XEINT15[3,16]

XPWRRGTON_SW [7]

XnRESET[2,3,14,16]

Xhi_A9/CE_CF1[4,16]

Xhi_A8/CE_CF0[4,16]

XEINT11[3,16]

XEINT13[3,13,16]XEINT12[3,13,16]

Xhi_A10/IORD_CF[4,16]

XPWRRGTON_SW[7]

XEINT12[3,13,16]

XEINT11[3,16]

CORE_REG_OE

VDD_ARM_VID1VDD_ARM_VID2VDD_INT_VIDCORE_REG_OE

VDD_INT_VID

VDD_ARM_VID1VDD_ARM_VID2

VDD_D

C_PWR_5V

VDD_D

VDD_D

VDD_D

VDD_D

VDD_D

VDD_D

C_PWR_5V

VDD_INT

VDD_D VDD_D

VDD_ARM

PVDD_ARM

PVDD_INT

VDD_D

C13100pF

D2

CMPSH-3

1 3RP20/R1608

R61100K/R1005

C11 330pF

R41

10K/R1005

R63100K/R1005

U7

LTC3714EG

10

12

789

2425

11

14

20

22

17

19

18

21

27

5

4

6

15

28

3

1

2

16

2313

26

RUN/SS

PGDOD

VID0VID1VID2VID3VID4

VON

ITH

FCB

VFB

OP+

SGND

OPOUT

ION

VIN

TG

SW

BOOST

OPVIN

INTVCC

SENSE

BG

PGND

OP-

VOSENSEVRNG

EXTVCC

R55

10K

/R10

05

U9A

SN74LVC2G08DCTR

1

2

84

7 +

CT3

4.7uF/6.3V/T3216

JP1A2-2PA-2.54DSA

12

R33100K/R1005

R62100K/R1005

R60

20K/R1005

R50330K/R1005

R43

10K/R1005

R39 1/R1005

U12

SN74LVC573APW

1

10

11

20

1918171615141312

23456789

OE GN

DLE

VDD

_D Q1Q2Q3Q4Q5Q6Q7Q8

D1D2D3D4D5D6D7D8

C15500pF

C12 6.8nF

JP2A2-2PA-2.54DSA

12

U10

SN74LVC1G00DBV

1

24

53

R31 10/R1005R

5610

K/R

1005

R35330K/R1005

R40

20K/R1005

+

CT5

330uF/16V/T6032

L12.2uH (LQH32CN2R2M33)

C5 330pF

CFG1

KHS04

1234

8765

R46

100K

/R10

05

R36100K/R1005

R57

10K

/R10

05C4100nF

Q2AFDS6982

2

187

R49

100K

/R10

05

C8100pF

RP10/R1608

R53 NC/R1005

R34100K/R1005

R440/R1005

R45 10/R1005

R58100K/R1005

U11

LTC3714EG

10

12

789

2425

11

14

20

22

17

19

18

21

27

5

4

6

15

28

3

1

2

16

2313

26

RUN/SS

PGDOD

VID0VID1VID2VID3VID4

VON

ITH

FCB

VFB

OP+

SGND

OPOUT

ION

VIN

TG

SW

BOOST

OPVIN

INTVCC

SENSE

BG

PGND

OP-

VOSENSEVRNG

EXTVCC

+

CT2

330uF/16V/T6032

R52 NC/R1005

Q1B

FDS6982

4

365

R47

NC

/R10

05


R32100K/R1005

R38

0/R1005

+

CT4

100uF/16V/T6032

C9500pF

D1

CMPSH-3

1 3

C14100pF

R59 1/R1005

R37 NC/R1005

R48

100K

/R10

05

Q1AFDS6982

2

187

R51

100K

/R10

05

R42

10K/R1005

+

CT6

4.7uF/6.3V/T3216

R54 0/R1005

C7100pF

U8

SN74LVC573APW

1

10

11

20

1918171615141312

23456789

OE GN

DLE

VDD

_D Q1Q2Q3Q4Q5Q6Q7Q8

D1D2D3D4D5D6D7D8

C6 6.8nF

+

CT1

100uF/16V/T6032

U9BSN74LVC2G08DCTR

5

6

84

3

Q2B

FDS6982

4

365

C10100nF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

(1.2V)

Vout=0.8(1+R1/R2)R1=R2(Vout/0.8V-1)

fundermentalOscillatortolerance +-100ppmpeak jitter 100psduty cycle40/60~60/40swing 3.3V

DN and DP should be routed evenly

USB(HOST)SOCKET

For USB Clock

USB(HOST)SOCKET

S3C6400 : 3.4K, 1%S3C6410 : 44.2ohm, 1%

(1.2V)

R1

R2

R1

R2

Vout=0.8(1+R1/R2)R1=R2(Vout/0.8V-1)

R1R2

Vout=0.6(1+R2/R1)R2=R1(Vout/0.6V-1)

(2.5V)

APLL<Silk>

<Silk>MPLL

<Silk>EPLL

<Silk>Alive

<Silk>RTC

CFG5

Use Adapter

Use PMIC

Power (PLL, Alive, RTC)/USB Host/USB OTG 0.2


A3




Date: Sheet of

XPWRRGTON_SW[6]

XVBUS [3,9]

XVBUS[3,9]

XotgID[3]

XotgDRV_VBUS[3]

XotgTO [3]

XusbhDP[3]

XotgTI [3]

XusbhDN[3] XotgDM[3]

XREXT[3]

XotgDP[3]

XotgTO [3]

XPWRRGTON[3,9]

XPWRRGTON_SW [6]

REG_EN[8,15]

REG_EN[8,15]

REG_EN[8,15]

VDD_D

C_PWR_5V

PVDD_ALIVE

VDD_RTC

VDD_AliveVDD_D

VDD_EPLL

VDD_MPLL

VDD_APLL

C_PWR_5V

VDD_D

C_PWR_5V

C_PWR_5V

PVDD_PLL

PVDD_RTC

C_PWR_5V

VDD_D

CON3

USB-MINIAB

12345

VBUSD-D+IDGND

R946

NC (1M)/R1005

RP40/R1608

+

CT9

10uF/6.3V/T2012

JP3A2-2PA-2.54DSA

12

TP10USBH_D-

R952 NC (10K)/R1005

R72 0/R1005

C19

1uF

CON2A

USB DUAL Port - A Type (Host)

1234

VBUSD-D+GNDR67 33/R1005

+

CT11

10uF/6.3V/T2012

R78169K,1%/R1005

R70169K,1%/R1005

R74

15K/R1005TP11USBH_D+

JP7A2-2PA-2.54DSA

12

X1

NC (48MHz,CRYSTAL_SX-8)

1

3 2

4

R80316K,1%/R1005

R76 100K/R1005

C22 22pF

RP70/R1608

C20

15pF

R950 100K/R1005

+CT10

10uF/6.3V/T2012

R69

15K/R1005

JP5A2-2PA-2.54DSA

12

+CT13

10uF/6.3V/T2012

R79 1M,1%/R1005+

CT12

10uF/6.3V/T2012

R75

44.2 ohm,1%/R1005


JP6A2-2PA-2.54DSA

12

R7115K/R1005

C18

2.2uF

RP30/R1608

C16

100nF

RP60/R1608

+CT7

10uF/6.3V/T2012

U16

LTC3406ES5

4

1

3

5

2

VIN

RUN

SW

VFB

GN

D

R64 100K/R1005R6515K/R1005

U15

MAX1806EUA15

1

3

2

8

6

4

7

5

IN0

POK

IN1

OUT1

SET

SHDN

OUT0

GND

U14

MAX682ESA

1

2

3

4 5

6

7

8nSKIP

nSHDN

IN

GND PGND

CXN

CXP

OUT

R951

100K/R1005

OSC1

48MHz (SMD,SCO-103)

1 2

34

OE GND

OUTVDD

C21

15pF

CON2B

USB DUAL Port - A Type (Host)

5678

VBUSD-D+GND

R66 33/R1005

C17

0.47uF

U13

MAX1806EUA15

1

3

2

8

6

4

7

5

IN0

POK

IN1

OUT1

SET

SHDN

OUT0

GND

TP12XotgTO

R77

84.5K,1%/R1005

RP50/R1608

R68

84.5K,1%/R1005 JP4A2-2PA-2.54DSA

12

CFG5CAS220A1

123

456

A1

C1

B1

A2

C2

B2

+

CT8

10uF/6.3V/T2012

R73 110K/R1005

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

<Silk>3.3V

CORE

(3.3V)

(1.2V)

<Silk>

Vout=0.8(1+R1/R2)R1=R2(Vout/0.8V-1)

Vout=0.8(1+R1/R2)R1=R2(Vout/0.8V-1)

R1

R1

R2

R2

Vout=0.6(1+R2/R1)R2=R1(Vout/0.6V-1)

R2

R1

<Silk>SYS

<Silk>PCM

<Silk>ADC

<Silk>DAC

<Silk>UH

<Silk>MMC

<Silk>EXT

<Silk>LCD

<Silk>MEM0

<Silk>MEM1

<Silk>DMEM

<Silk>SMEM

<Silk>SS

<Silk>OTGI

<Silk>OTG

Added on04/30/2008

Power (I/O) 0.2


A3




Date: Sheet of

XhiINTR[4,12,16]

USB20_EN


CORE_PWR_OK[6]

XPWM_ECLK[3,13,16]

REG_EN[7,15]

USB20_EN

REG_EN[7,15]

VDD_D

VDD_D

VDD_1.8V

VDD_D C_PWR_5V

PVDD_HI

PVDD_EXT

PVDD_UH_MMC

PVDD_LCD

PVDD_SYS

PVDD_AUDIOVDD_PCM

VDD_SYS

VDD_UH

VDD_EXT

VDD_LCD

VDD_MMC

VDD_DAC

VDD_ADC

VDD_HI

PVDD_SS

VDD_MEM0

PVDD_MEM

VDD_1.8VVDD_DMEM

VDD_MEM1

VDD_SS

VDD_SMEM

C_PWR_5V

C_PWR_5V

C_PWR_5VVDD_OTGI

VDD_D

PVDD_OTGI

PVDD_OTG

VDD_OTG

PVDD_UH_MMC

PVDD_AUDIO

VDD_D

VDD_D

RP21 NC/R1608

TPH6GND

RP8 0/R1608

JP16A2-2PA-2.54DSA

12

U18

MAX1806EUA15

1

3

2

8

6

4

7

5

IN0

POK

IN1

OUT1

SET

SHDN

OUT0

GND

RP12 0/R1608

R92169K,1%/R1005

RP23 0/R1608


12

R91

84.5K,1%/R1005

R85

1K/R1005

R8910K/R1005

R90 100K,1%/R1005

+

CT1710uF/6.3V/T2012

TPH1GND

RP20 0/R1608

RP11 0/R1608

R9540/R1005

RP25 0/R1608

RP22 0/R1608

MTH1GND

Q3MMBT3904LT1

1

23

R82510/R1005

TPH5GND

R9530/R1005

MTH3GND

+CT16

10uF/6.3V/T2012

TPH4GND

MTH4GND

JP17A2-2PA-2.54DSA

12

JP19A2-2PA-2.54DSA

12

R87 NC/R1005

JP14A2-2PA-2.54DSA

12

VR1

500K

1 3

2

RP18 0/R1608

MTH2GND

R86 0/R1005

R83

500K,1%/R1005C23

100nF

RP19 NC/R1608

+

CT1410uF/6.3V/T2012

JP23A2-2PA-2.54DSA

12

+CT18

10uF/6.3V/T2012

RP16 0/R1608

RP10 0/R1608

JP8A2-2PA-2.54DSA

12

JP12A2-2PA-2.54DSA

12

+

CT1910uF/6.3V/T2012

+CT15

33uF/6.3V/T3528

TPH2GND

U19

MAX1806EUA33

1

3

2

8

6

4

7

5

IN0

POK

IN1

OUT1

SET

SHDN

OUT0

GND

R81510/R1005

RP17 0/R1608

RP14 0/R1608

JP10A2-2PA-2.54DSA

12

R9524.3K,1%/R1005

JP15A2-2PA-2.54DSA

12

JP22

A2-3PA-2.54DSA

123

U17

LTC3406ES5

4

1

3

5

2

VIN

RUN

SW

VFB

GN

D

RP24 0/R1608

TPH3GND

RP9 0/R1608

JP21A2-2PA-2.54DSA

12

R96810K/R1005

R88 NC/R1005


RP13 0/R1608

RP15 0/R1608

JP11A2-2PA-2.54DSA

12

R94

75K,1%/R1005

JP13A2-2PA-2.54DSA

12

JP18A2-2PA-2.54DSA

12

JP20A2-2PA-2.54DSA

12

JP9A2-2PA-2.54DSA

12

R93 100K,1%/R1005

R8480K,1%/R1005

U39

SN74AUC1G08DBV

1

2

35

4


12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

<Silk>

PMIC


<Silk>OFF<Silk>

DC 5V,3A PWR ON<Silk>

BatteryConnector

SW5

O : Insertion (Placement)X : Don't care

O

O

CON3(USBOTG)

O

CON4(Battery)

JACK1 (DC)

X

X

Power Off XOperation & Chargingby DC

CFG2

Charging by USB

X X

O


Added on04/30/2008

PMIC Socket 0.2


A3




Date: Sheet of

XVBUS[3,7]

WHITE_LED[16]WLED_OUT1[16]


XPCM_FSYNC0/I2S_LRCLK0/AC97_SYNC0/ADDR_CF2 [3,16]XPCM_DCLK0/I2S_CLK0/AC97_BITCLK0/ADDR_CF0 [3,16]XPCM_EXTCLK0/I2S_CDCLK0/AC97_RSTn0/ADDR_CF1 [3,16]


XPCM_SOUT1/I2S_DO1/AC97_SDO0 [3,16]XPCM_SIN1/I2S_DI1/AC97_SDI0 [3,16]XPCM_FSYNC1/I2S_LRCLK1/AC97_SYNC0 [3,16]XPCM_DCLK1/I2S_CLK1/AC97_BITCLK0 [3,16]

Xi2cSCL0 [3,15,16]Xi2cSDA0 [3,15,16]

PMIC_MIC2_P [16]PMIC_MIC2_N [16]PMIC_MIC1_P [16]PMIC_MIC1_N [16]

XnBATF [2,3]

XPWRRGTON [3,7]PMIC_XEINT12_IRQn [3]

PMIC_ONKEYn [2]

PMIC_nRST_OUT [2]

nRESET [2]PMIC_REM_IN [16]

PMIC_STEREO_VMID [16]

PMIC_MODEM_MIC_P [16]PMIC_STEREO_CH2 [16]PMIC_STEREO_CH1 [16]PMIC_BEAR_SPK_N [16]PMIC_BEAR_SPK_P [16]PMIC_MONO_SPK_N [16]PMIC_MONO_SPK_P [16]

PMIC_MODEM_SPK_N [16]PMIC_MODEM_SPK_P [16]


XVBUS [3,7]

PVDD_ARM

PVDD_INT

PVDD_MEM

PVCCAUX1

PVDD_PLL

PVDD_HI

PVCCAUX3

PVDD_UH_MMC

PVCCAUX2

PVDD_EXT

PVCCM3BT

PVDD_OTGI

PVDD_SYS

PVCCM2MTV

PVDD_LCD

PVDD_SS

PVDD_OTG

PVDD_ALIVE

PVDD_RTCVBAT

VCHGR

PVDD_AUDIO

DC_5V

VBATC_PWR_5V

DC_5V

VCHGR

TP25

(1.5A, SMD, Poly Switch)F1

MicroSMD150-2

1 2

TP22

TP27TP15

CON4

5268-02A

1

2

+

-

TP13

CON5

SEAM-20-02.0-SM-10-2-A

E2

E3E4

E5E6E7F5F6F7

E8F8

E9

E10

E11

E12

F11

F12

E13E14E15F13F14F15

E17F17

E18

E19F19

F2

F3

F4

F18

H1H20J1J20

H2J2

H3J3

H4H5

H6J6

H7J7

H8

J8 J4

J5

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

K1

K2

K3

K4

K5

K6

K7

K8

K9

K10

K11

K12

K13

K14

K15

K16

K17

K18

K19

K20

E1

E16

E20

F1 F9 F10

F16

F20

B1

B20

B19B18B17

B16

B15

B14

B13B12B11B10

B9B8

B7B6

B5B4B3B2D19

D18

D4D3D15D14D13

D12

D11

D10

D9

D8

D7D6D5

D17D16

D2

D20

D1

C19C18

C17

C16C15C14C13C12

C11

C10C9C8

H9

H10

H11

J9 J10

J11

H12

J12

H13J13

H14J14

H15J15

H17J17

H18J18

H19

J19

H16

J16

G1

G20

G2

G3

G4

G5G6

G7

G8

G9

G10

G11

G12

G13

G14

G15

G16

G17

G18

G19

C1

C20

C2

C3

C4

C5

C6

C7

MCLK

VLDO5_VDDUH/VDDMMCVLDO5_VDDUH/VDDMMC

BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1BUCK3_VDDMEM0/VDDMEM1

I2S_DATAINI2S_DATAOUT

VCH

GR

VCH

GR

TSI_

YM

TSI_

YP

TSI_

XM

TSI_

XP

BUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARMBUCK1_VDDARM

VLDO3_VDDHIVLDO3_VDDHI

Res

erve

d


VLDO8_VCCM3BT



LED

_PC

GNDGNDGNDGND

VLDO15_VDDALIVEVLDO15_VDDALIVE

VLDO11_VCCM2MTVVLDO11_VCCM2MTV

VLDO_ADC(Reserved)VBUS_XVBUS



MIC

1_N

MIC

1_P

Res

erve

d

VLDO_AUDIO_VDDPCM/VDDADC/VDDDAC

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

AUD_AUX3_INAUD_AUX2_INAUD_AUX1_IN

Reserved

nVDD_FAULT

Reserved

nBATT_FAULTSYS_EN

PWR_ENnPMIC_IRQ

I2C_SDAI2C_SCL

ReservedReserved

nSLEEPEXT_WAKEUP1EXT_WAKEUP0

nONKEYnEXTON

I2S_CDCLK

ReservedReservedReservedReservedReserved

FLA

SH

_EN

PWR_I2C_SCL

VCH

GR

VCH

GR

AUD_AMP_EN

nRST_INREM_IN

nRST_OUT

I2S_SYNCI2S_BITCLK

TBA

TG

ND

GN

D

AUDIO_LINEOUTSTEREO_CH2

VMID

STEREO_CH1BEAR_SPK_NBEAR_SPK_P

MONO_SPK_NMONO_SPK_P

PWR_I2C_SDA

PCM_CLKPCM_FSYNC

PCM_SDI

VB

AT_

INV

BA

T_IN

VB

AT_

INV

BA

T_IN

VB

AT_

INV

BA

T_IN

VR

TC_V

DD

RTC

VR

TC_V

DD

RTC

VLDO9_VDDOTGIVLDO9_VDDOTGI

VLDO7_VDDEXTVLDO7_VDDEXT

VLDO12_VDDLCDVLDO12_VDDLCD

VLDO14_VDDOTGVLDO14_VDDOTG

VLDO10_VDDSYSVLDO10_VDDSYS

MIC

_BIA

S_I

NT

MIC

_BIA

S_E

XT

Res

erve

d

Res

erve

d

GN

DG

ND

VLDO8_VCCM3BT



BUCK2_VDDINTBUCK2_VDDINT

Res

erve

d

LDO8_EN(Reserved)

VB

AT_

INV

BA

T_IN

VB

AT_

IN

LED

_DR

V1LE

D_D

RV2

MIC

2_N

MIC

2_P

WLE

D_B

OO

STW

LED

_OU

T1W

LED

_OU

T2

VV

IB

GN

DG

ND

Res

erve

d

AD

C_I

N4

AD

C_I

N5

AD

C_I

N6

AD

C_I

N7

PCM_SDO

TP17

R104 0/R1005

TP44

RP290/R1608

R100 0/R1005

TP33

JACK1

POWER JACK (DC-JACK, DC-003)

1

23

P

GG

TP23

TP30

ZD1Onsemi 1SMB5920BT3G (6.2V)

12

RP30NC/R1608

TP40

R106 0/R1005

TP37

RP28

NC/R1608

R97 0/R1005

TP28

TP31

TP43

R99 0/R1005

R102 0/R1005

TP18 TP26

RP26

0/R1608

TP36

TP29

TP20

TP42

TP24

TP35

TP16

RP27 0/R1608

RP320/R1608

CFG2CAS220A1

123

456

A1

C1

B1

A2

C2

B2

TP41

TP38

TP32

R101 0/R1005

TP14 TP21TP19

RP33NC/R1608

R105 0/R1005

R103 0/R1005


12

TP34

SW5CAS220A1123

456

A1

C1

B1

A2

C2

B2

R969 0/R1608

R96

1K/R1005

R98 0/R1005

RP310/R1608

TP39

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

!!SAMEROUTELENGTH

!!SAMEROUTELENGTH

Just Only PADS on Lines


* Note: U21 not available on 06/18/2008


Memory (mDDR) 0.2


A3




Date: Sheet of

Xm1DATA7

Xm1DATA0

Xm1DATA5

Xm1DATA13

Xm1DATA1

Xm1DATA15

Xm1DATA3

Xm1DATA11

Xm1DATA6

Xm1DATA9

Xm1DATA12

Xm1DATA2

Xm1DATA4

Xm1DATA8

Xm1DATA14

Xm1DATA10

Xm1ADDR12

Xm1ADDR6

Xm1ADDR10

Xm1ADDR7Xm1ADDR8

Xm1ADDR3

Xm1ADDR5

Xm1ADDR11

Xm1ADDR2

Xm1ADDR0

Xm1ADDR4

Xm1ADDR1

Xm1ADDR9

Xm1DATA25

Xm1ADDR3

Xm1ADDR0

Xm1DATA20Xm1DATA19

Xm1ADDR1

Xm1ADDR10

Xm1DATA31

Xm1ADDR8

Xm1DATA30

Xm1ADDR9

Xm1ADDR5

Xm1DATA28

Xm1ADDR4

Xm1DATA26

Xm1DATA16

Xm1ADDR7

Xm1DATA29

Xm1DATA24

Xm1DATA18

Xm1DATA27

Xm1DATA21Xm1ADDR6

Xm1ADDR2

Xm1ADDR12

Xm1DATA23

Xm1ADDR11

Xm1DATA17

Xm1DATA22

Xm1CKE0[2]

Xm1DQM1[2]Xm1DQM0[2]

Xm1SCLK[2]

Xm1DQS0[2]Xm1DQS1[2]

Xm1SCLKn[2]

Xm1DATA[31:0] [2]

Xm1WEn [2]Xm1CASn [2]Xm1RASn [2]Xm1CSn0 [2]

Xm1ADDR14[2]Xm1ADDR15[2]

Xm1ADDR[15:0][2]

Xm1SCLK[2]

Xm1DQS2[2]

Xm1WEn [2]Xm1DQS3[2]


Xm1CASn [2]

Xm1DQM2[2]Xm1DQM3[2]

Xm1RASn [2]

Xm1CKE0[2]

Xm1SCLKn[2]

Xm1ADDR[15:0][2]

Xm1CSn0 [2]

Xm1DATA[31:0] [2]

Xm1RASn[2]

Xm1DQM2[2]

Xm1DQM3[2]

Xm1DQS3[2]

Xm1DQM0[2]

Xm1ADDR0[2]

Xm1DQM1[2]

Xm1CKE0[2]

Xm1DQS2[2]

Xm1CASn[2]

Xm1WEn[2]

Xm1DATA0[2]

Xm1CKE1[2]

Xm1SCLK[2]

Xm1SCLKn[2]

Xm1DQS0[2]

Xm1DQS1[2]

Xm0DQS0[2]

Xm0DQM0/BE0[2,11]

Xm0DATA0[2,11,14]

Xm0SCLKn[2]

Xm0SCLK[2]

Xm0CKE[2]

Xm0ADDR0[2,11]

Xm0DQS1[2]

Xm0DQM1/BE1[2,11]

Xm0RASn[2]

Xm0CASn[2]

Xm0WEndmc[2]

Xm1CSn1[2]

Xm0AP[2]

Xm0CSn7[2,12]

Xm0ADDR10[2,11]

Xm1ADDR13[2]

Xm1CSn0[2]

VDD_DMEM

VDD_DMEM

TP78 Xm1CSn0

TP59 M1CASn

TP65 M1DQM1

TP74 Xm0A10

TP60 M0RASn

CB70

100nF

CB72

100nF

TP56 M0WEn

TP50 M0CKE0

TP46 M0A0

TP64 M0DQM1

TP69 M1DQM3

CB62

100nF

TP53 M1SCLK

TP67 M1DQM2

TP58 M0CASn

CB74

100nF

TP47 M1D0

TP79 Xm1A13

CB60

100nF

TP66 M0DQS0

TP63 M1DQM0

TP54 M0SCLKn

CB61

100nF

TP71 M1DQS0

TP76 M1DQS3

TP55 M1SCLKn

CB71

100nF

TP52 M0SCLK

TP61 M1RASn

CB58

100nF

CB69

100nF

U20

K4X51163PE-L(F)E/GC6

J8J9K7K8K2K3J1J2J3H1J7H2H3

H8H9

F8F2E8

A9

E2

G1G2G3

A8

H7G9G8G7

F3

K1

F7

A1F1F9

K9

C9E9A7B1D1 D9

B9A3E1C1

B7B8C7

D7C8

D8E7E3D2D3C2C3

B3B2

A2

A0A1A2A3A4A5A6A7A8A9A10/APA11A12

BA0BA1

LDMUDMLDQS

VDD

UDQS

CKECKnCK

DQ0

nCSnRASnCASnWE

NC

VSS

NC

VSSVSSVDD

VDD

VDDQVDDQVDDQVDDQVDDQ VSSQ

VSSQVSSQVSSQVSSQ

DQ1DQ2DQ3

DQ5DQ4

DQ6DQ7DQ8DQ9

DQ10DQ11DQ12

DQ14DQ13

DQ15

U22

K4X51163PE-L(F)E/GC6

J8J9K7K8K2K3J1J2J3H1J7H2H3

H8H9

F8F2E8

A9

E2

G1G2G3

A8

H7G9G8G7

F3

K1

F7

A1F1F9

K9

C9E9A7B1D1 D9

B9A3E1C1

B7B8C7

D7C8

D8E7E3D2D3C2C3

B3B2

A2

A0A1A2A3A4A5A6A7A8A9A10/APA11A12

BA0BA1

LDMUDMLDQS

VDD

UDQS

CKECKnCK

DQ0

nCSnRASnCASnWE

NC

VSS

NC

VSSVSSVDD

VDD

VDDQVDDQVDDQVDDQVDDQ VSSQ

VSSQVSSQVSSQVSSQ

DQ1DQ2DQ3

DQ5DQ4

DQ6DQ7DQ8DQ9

DQ10DQ11DQ12

DQ14DQ13

DQ15

TP68 M0DQS1

CB57

100nF

CB73

100nF

+CTB30

10uF/6.3V/T2012

TP70 M0AP

TP72 M0CSn7

TP73 M1DQS1

TP57 M1WEn

TP49 M1CKE0

TP45 M1A0

TP75 M1DQS2

TP62 M0DQM0

TP48 M0D0

+CTB28

10uF/6.3V/T2012

TP77 M1CSn1

TP51 M1CKE1

CB59

100nF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DIR L : B->ADIR H : A->B

Propagation DelayA->B 1.6nS ~ 4.3nSB->A 1.8nS ~ 5.5nS

sn74AVCA164245(A(1.8V) <-> B(3.3V))A->B 1.6nS ~ 4.3nSB->A 1.8nS ~ 5.5nS

<Silk>BUF

Buffers (SROM IF) 0.2


A3




Date: Sheet of

Xm0DATA2B_DATA1

B_ADDR15

Xm0DATA8

Xm0DATA6

Xm0ADDR11

Xm0ADDR4

B_DATA10B_DATA11

Xm0ADDR13

B_DATA14

Xm0ADDR2

Xm0DATA3

B_DATA7

Xm0DATA14

B_ADDR2

Xm0ADDR0

B_DATA5

B_DATA8

Xm0DATA5

Xm0DATA0

B_ADDR3

Xm0DATA11

B_ADDR7

Xm0DATA15

Xm0DATA9

B_ADDR4

Xm0ADDR10

Xm0DATA13

B_ADDR11

Xm0ADDR1

B_DATA13

B_ADDR14

Xm0ADDR8 B_ADDR8

B_DATA0

B_DATA4

B_DATA15

Xm0ADDR9

B_ADDR12

B_ADDR0

Xm0ADDR15

B_DATA12

Xm0DATA4

B_DATA2

B_ADDR5

Xm0ADDR3

Xm0ADDR6 B_ADDR6

B_ADDR9

Xm0DATA10B_DATA9

B_DATA6

Xm0DATA1

Xm0ADDR7

Xm0ADDR14

Xm0ADDR12

B_ADDR1

B_ADDR13

Xm0DATA7

Xm0DATA12

B_DATA3

B_ADDR10

Xm0ADDR5

Xm0RDY0/ALE[2,14]

B_nBE0 [16]

B_ADDR[15:0] [16]

B_OEata [16]

B_CSn_5 [16]

B_CSn_0 [16]


B_CSn_4 [16]

Xm0ADDR[15:0][2,10]

B_ALE [16]

B_CSn_3 [16]Xm0CSn4[2,12]

Xm0DATA[15:0][2,10,14]

B_FREn [16]

Xm0WEata[12]

Xm0REGata[12]

B_DATA[15:0] [16]

B_WEata [16]

M0CSn2[12,14]

Xm0RDY1/CLE[2,14]

XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1[3,16]

Xm0RSTata[12]

Xm0CSn5[2,12]

Xm0OEata[12]

Xm0CSn1[2,12]

B_REGata [16]

B_nBE1 [16]

B_FWEn [16]

Xm0DQM0/BE0[2,10]

B_RESET [16]

M0CSn3[12,14]

B_CSn_1 [16]


B_CSn_2 [16]

Xm0DQM1/BE1[2,10]

B_CLE [16]

Xm0CSn0[2,12]


B_ADDR18 [16]

B_CData [16]

B_INPACKata [16]B_RnB [16]

Xm0INPACKata[12]

B_WAITn/IORDY [16]


Xm0ADDR17[2]

B_WEn/nIOWR_CF [16]

Xm0INTata[12]


RnB[14]

B_OEn/nIORD_CF [16]

B_ADDR17 [16]

Xm0CData[12]

B_INTata [16]

Xm0ADDR16[2]

B_ADDR19 [16]

B_ADDR16 [16]

Xm0WAITn/IORDY[2]

BCtrl_I0[12]

BCtrl_I1[12]

BUF_DIR [12]

VDD_SMEM

VDD_BUF

VDD_BUF

VDD_BUFVDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_BUF

VDD_SMEM

VDD_D VDD_BUF

VDD_BUF

CB81

100nF

U25

SN74AVCA164245DGG

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

TP82

R111 0/R1005

R1104.7K/R1005

CB80 100nF

U26

SN74AVCA164245DGG

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4 U27B

SN74AUC2G08DCT

6

53

TP81

CB79 100nF

R109

4.7K/R1005

R112

100K/R1005

R113

100K/R1005

CB75 100nF

TP83

R108

100K/R1005

CB82100nF

U23

SN74AVCA164245DGG

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

TP80

R114

NC/R1005

R107

100K/R1005

CB77 100nF

CB76 100nF

CB78 100nFU24

SN74AVCA164245DGG

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

U27A

SN74AUC2G08DCT

1

2

84

7

JP24A2-2PA-2.54DSA

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SN74AUC2G08Propagation Delay (CL30pF)Typ: 1.5nS ( 1.2 ~ 2.1)

SN74AUC2G08Propagation Delay (CL30pF)Typ: 1.5nS ( 1.2 ~ 2.1)

Buffers Control (SROM IF)/GPS 0.2


A3




Date: Sheet of

Xm0CSn1[2,11]

Xm0REGata/SS_GPO0[2]

Xm0CSn0[2,11]

M0CSn3[11,14]

Xm0CSn5[2,11]

Xm0CSn4[2,11]

M0CSn2[11,14]

XhiINTR[4,8,16]

XIrSDBW[3,15,16]

BUF_DIR [11]



nOE_CF

MP0_DOEn

BCtrl_I1 [11]

BCtrl_I0 [11]

Xm0CSn7[2,10]

XhiINTR [4,8,16]

MP0_DOEn

XIrSDBW[3,15,16]

nOE_CFXm0OEata/SS_GPO2[2]

Xm0WEata/SS_GPO1[2]Xm0REGata/SS_GPO0[2]

SS_GPO0

SS_TCXO_CLK

SS_GPO2

Xm0REGata [11]

Xm0RSTata/SS_IMG_IN[2]

Xm0WEata [11]

SS_GPO3

SS_GPO0

Xm0CData [11]

Xm0INTata/SS_REAL_IN[2]

SS_REAL_IN

Xm0CData/SS_GPO3[2]

SS_GPO1

Xm0OEata/SS_GPO2[2] SS_GPO2

Xm0INPACKata [11]

SS_GPO3

Xm0OEata [11]

SS_TCXO_CLK

Xm0INPACKata/SS_TCXO_CLK[2]

SS_REAL_IN

SS_GPO1

Xm0RSTata [11]Xm0INTata [11]

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM VDD_SMEMVDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM VDD_SMEM

VDD_SMEM

VDD_SMEM

C_PWR_5V

R119 100K/R1005

R939 0/R1005

R945 0/R1005

U29A

SN74AUC2G08DCT

1

2

84

7

R129 NC/R1005

R944 0/R1005

R124 100K/R1005

U30B

SN74AUC2G08DCT

6

53

U32B

SN74AUC2G08DCT

6

53

R932 0/R1005

U33

SN74AUC1G125DBV

1

2

3

5

4

nOE

A

GND

VCC

Y

R125 NC/R1005R123 100K/R1005

R134 0/R1005

R941 0/R1005

CON14

QSE-060-01-L-D-A

13579

111315171921232527293133353739414345474951535557596163656769717375777981838587899193959799

101103105107109111113115117119

2468101214161820222426283032343638404244464850525456586062646668707274767880828486889092949698100102104106108110112114116118120

GN

D

U28B

SN74AUC2G08DCT

6

53

R934 0/R1005

R133

100K/R1005

U31B

SN74AUC2G08DCT

6

53R128 NC/R1005

R943 0/R1005

R116

100K/R1005

R936 0/R1005

R132

NC (100K)/R1005

U32A

SN74AUC2G08DCT

1

2

84

7

U30A

SN74AUC2G08DCT

1

2

84

7

R135 0/R1005

R120 100K/R1005

R1300/R1005

R942 0/R1005

R938 0/R1005

R933 0/R1005

R1224.7K/R1005

U28A

SN74AUC2G08DCT

1

2

84

7

R935 0/R1005

R940 0/R1005

U34

TS5A3159DBV_SPDT

5

61

2

3 4

VCC

INNO

GND

NC COM

U29B

SN74AUC2G08DCT

6

53

R117 100K/R1005

R1270/R1005

U31A

SN74AUC2G08DCT

1

2

84

7

R118

0/R1005

R126 0/R1005

R121NC/R1005

R1310/R1005

R937 0/R1005

R115 100K/R1005

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

For HS-SPI test

SDDATA & CLK path must besame length and route SDDATA & CLK path must be

same length and route

<Silk>MMCD

<Silk>MMC CD

<Silk>Channel 1 <Silk>

Channel 0

[3]

[2]

CFG6

[4]

[ON]

IIS 5.1[OFF]IIS 5.1 [ON]

[1]

[OFF]

[OFF]

[OFF]

[OFF]

[ON]

[ON]

[ON]

SD_MMC/SPI 0.2


A3




Date: Sheet of

SD0_nWP

B_MMC_CLKXspiMISO0/ADDR_CF0[3]


B_SPI0_MOSI/ADDR_CF2 [16]

XspiMISO1/mmcCMD2[3]

XmmcDATA0_3[3]

B_MMC_DATA1

B_SPI1_MOSI [16]B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 [16]

B_HSMMC_DAT5/i2sV40_CDCLK [16]

B_SPI0_CLK/ADDR_CF1 [16]

XmmcDATA1_4/mmcDATA2_0/ADDR_CF0[3] B_MMC_DATA3

B_HSMMC_DAT6/i2sV40_LRCLK [16]


B_MMC_DATA0


B_MMC_DATA2

B_MMC_CMD

XmmcDATA1_3[3]

XmmcDATA0_2[3]B_MMC_DATA1B_MMC_DATA2

B_MMC_CMDXspiCS0[3]

XEINT13[3,6,16]

XspiMOSI1[3]

B_MMC_CLK

B_MMC_DATA0


B_MMC_DATA3B_SPI0_MISO/ADDR_CF0 [16]


B_SPI1_CSn/i2sV40_DO2 [16]

XEINT12[3,6,16]


B_MMC_DATA3

XspiCS1[3]

XspiCLK1/mmcCLK2[3]

XmmcDATA1_1[3]

B_SPI1_CLK/MMC2_CLK/i2sV40_DO1 [16]

B_MMC_DATA2


B_MMC_DATA0

B_HSMMC_DAT7/i2sV40_DI [16]

XmmcCDN0/mmcCDN1[3]

XspiCLK0/ADDR_CF1[3]

B_MMC_CLK

XmmcDATA1_2[3]

XmmcDATA0_1[3]

XPWM_ECLK[3,8,16]

XspiMOSI0/ADDR_CF2[3]


B_SPI0_CSn [16]

XmmcCDN0/mmcCDN1[3]

B_MMC_CMD

B_MMC_DATA1


B_HSMMC_DAT4/i2sV40_BCLK [16]

XmmcCDN0/mmcCDN1[3]

XspiCS0[3]XspiMISO0/ADDR_CF0[3]XspiMOSI0/ADDR_CF2[3]XspiCLK0/ADDR_CF1[3]

XspiMISO1/mmcCMD2[3]XspiCS1[3]

XspiMOSI1[3]XspiCLK1/mmcCLK2[3]

XmmcDATA1_0/ADDR_CF2[3]XmmcCMD1/ADDR_CF1[3]XmmcCLK1/ADDR_CF0[3]

XmmcDATA1_1[3]

B_XmmcCMD1/ADDR_CF1 [16]B_XmmcCLK1/ADDR_CF0 [16]

B_XmmcDATA1_0/ADDR_CF2 [16]B_XmmcDATA1_1 [16]

B_XmmcDATA1_3 [16]B_XmmcDATA1_2 [16]XmmcDATA1_2[3]

XmmcDATA1_3[3]





VDD_MMCD

VDD_MMCD

VDD_MMCD

PVDD_UH_MMC

VDD_MMCD

VDD_D

VDD_MMCD

VDD_MMCD

R152

NC/R1005R

137

50K

/R10

05

R160 0/R1005

R14

450

K/R

1005

R14

350

K/R

1005

RA4 NC

R13

910

K/R

1005

R15

050

K/R

1005

R157 NC/R1005

R15

150

K/R

1005

RA5 0

CON9

IEEE1394/SD-54030

1234

5

6

D1+D1-D2+D2-

GND

GND

R153

NC/R1005

RA1 0

RA3 NC

R161 NC/R1005R162 NC/R1005

R13

650

K/R

1005

R156 0/R1005

R159 0/R1005

R14

550

K/R

1005

R14

750

K/R

1005

R155 NC/R1005

R930 0/R1005

JP25

A2-3PA-2.54DSA

123

RA8 0

CON6


12

3

4

56789

101112

131415

16171819202122232425

26

27

28

2930

NCNC

DAT2

DAT3


NCVDDNC


DAT1

SD_CD

SD_WP

P29

/GN

DP

30/G

ND

CFG6

KHS04

1234

8765

R14

910

K/R

1005

R158 NC/R1005

R931 0/R1005

R14

250

K/R

1005

LED4LED-Green (SMD 3216)

12

R14

650

K/R

1005

CON7


12

3

4

56789

101112

131415

16171819202122232425

26

27

28

2930

NCNC

DAT2

DAT3


NCVDDNC


DAT1

SD_CD

SD_WP

P29

/GN

DP

30/G

ND

R14

150

K/R

1005

R154330/R1005

R14

050

K/R

1005

R14

850

K/R

1005

R13

850

K/R

1005

CON8

IEEE1394/SD-54030

1234

5

6

D1+D1-D2+D2-

GND

GND

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

[1,2]: OFF[3,4]: ON

NANDC(CS2)

CFG4

OneNANDC(CS2)

NAND/ONENAND[1,2]: ON[3,4]: OFF

MIPI Connector

Clocks

0

[4]

0

1

[5]

1 1

[6]

10

Booting Mode

OneNAND

1

Internal ROM(SD/MMC)

1

1

0:8bit1:16bit

Modem

CFG3

1

0 1

NOR/SROM

X

1X

0

ON:EXTCLK

OFF:XTI

0

0

oneNAND Connector

<Silk>

VDD_D

<Silk>JTAG

XDBGSELGND

[1][2][3]

Internal ROM(OneNAND)

Internal ROM(NAND) 111 1 1

1X 1 11


oneNAND/MIPI/JTAG/CLK 0.2


A3




Date: Sheet of

Xm0DATA5Xm0DATA7

Xm0DATA15

Xm0DATA9

Xm0DATA14

Xm0DATA11

Xm0DATA1Xm0DATA3

Xm0DATA12

Xm0DATA0

Xm0DATA10Xm0DATA13

Xm0DATA4Xm0DATA6

Xm0DATA2

Xm0DATA8


Xhi_D7/DATA_CF7 [16]Xhi_D5/DATA_CF5 [16]


Xm0RDY0/ALE[2,11]

Xm0CSn3[2]

Xm0RPn/RnB[2]


Xm0CSn2[2] M0CSn2 [11,12]RnB [11]

M0CSn3 [11,12]

Xm0RDY1/CLE[2,11]


XTDO[3]XnRESET[2,3,6,16]

XTCK[3]XRTCK[3]

XTDI[3]XTMS[3]

XTRSTn[3]

XrtcXTI [3]

XDBGSEL[3]

XrtcXTO [3]XXTO [3]

XEXTCLK [3]

X27MXTO [3]

XXTI [3]

X27MXTI [3]

XOM0[3]

XSELNAND[3]

XOM2[3]

XOM3[3]

XOM4[3]

XOM1[3]

nCS_EXT_ONE

nCS_EXT_TWO

RDY_EXT_ONE

RDY_EXT_TWO

INT_EXT_ONE

INT_EXT_TWO

nCS_EXT_ONERPn_EXT

INT_EXT_TWO

Xm0OEn/nIORD_CF [2,11,12]

Xm0SMCLK[2]

nCS_EXT_ONE

RPn_EXTINT_EXT_ONE

Xm0DATA[15:0] [2,10,11]

nCS_EXT_TWO RDY_EXT_TWO

Xm0WEn/nIOWR_CF[2,11]Xm0ADV[2]

Xm0DATA[15:0][2,10,11]

RDY_EXT_ONE

Xhi_D1/rxWAKE/DATA_CF1[4]

Xhi_D3/rxDATA/DATA_CF3[4]

Xhi_D2/rxFLAG/DATA_CF2[4]

Xhi_D0/rxREADY/DATA_CF0[4]



Xhi_D6/txFLAG/DATA_CF6 [4]

Xhi_D7/txDATA/DATA_CF7 [4]

Xhi_D4/txREADY/DATA_CF4 [4]

Xhi_D5/txWAKE/DATA_CF5 [4] VDD_D

VDD_D

VDD_D

VDD_D

VDD_D

VDD_D

VDD_D

VDD_SMEMVDD_SMEM

R185 NC/R1005

R164

10K/R1005

R175 100K/R1005

CB83

100nF

C29

13pF

TP84EXTCLK

R948

1M/R1005

C28

13pF

R165

10K/R1005

X312MHz (SMD,SX-8)

1

32

4

R174 100K/R1005

CON10

AXK7L16227G

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

R191

0/R1005

R947

1M/R1005

CFG3KHS06

123487

6 59 10 11 12

R167 0/R1005

R190

100K/R1005

R193

NC/R1005

CFG4

KHS04

1234

8765

R192

0/R1005

J1

A2-3PA-2.54DSA

123

CON12

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

C26

15pF

C25

25pF

+CTB31

10uF/6.3V/T2012

R186 0/R1005

R172 100K/R1005

R173 100K/R1005

R188

100K/R1005

X432.768KHz (CH-308)

12

3

OSC2

12MHz (SMD,SCO-103)

1 2

34

OE GND

OUTVDD

R189

NC/R1005

R184 0/R1005

R163

NC/R1005

R170 100K/R1005

R187

NC/R1005

C27

15pF

R179 NC/R1005

R169

470/R1005

R183 0/R1005

RA6 0

X227MHz (SMD,SX-8)

1

32

4

R166

10K/R1005

R171

10K/R1005

R168 100K/R1005

R182 NC/R1005

R177

100K/R1005

R180 0/R1005

R178 0/R1005

R949

5M/R1005

R176100K/R1005

CON11

HIF3F-20PA-2.54DS (Box,Male,Right Angle)

1 23 45 67 89 10

11 1213 1415 1617 1819 20

1 23 45 67 89 1011 1213 1415 1617 1819 20

C24

25pF

RA7 0

R181 0/R1005

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Camera Interface

L : B to AH : A to B

(VDDIO 2.8V)

(VDDA 2.8V)

R1

(2.8V)

Vout=0.6(1+R2/R1)R2=R1(Vout/0.6V-1)

R2

<Silk>CAM IF

<Silk>CAM_EXT

<Silk>CAMIP

Camera Interface 0.2


A3




Date: Sheet of

B_CAMDATA0

B_CAMDATA7

B_CAMDATA5B_CAMDATA4

B_CAMDATA6

B_CAMDATA2B_CAMDATA1

B_CAMDATA3

B_CAMDATA3

B_CAMDATA6

B_CAMDATA0

B_CAMDATA5

B_CAMDATA2

B_CAMDATA4

B_CAMDATA7

B_CAMDATA1

XciYDATA5XciYDATA6

XciYDATA0

XciYDATA2

XciYDATA4XciYDATA3

XciYDATA7

XciYDATA1

B_CAMVSYNC

B_CAMDATA6

B_XirSDBW

B_CAMDATA2

B_CAMDATA4

B_CAMDATA7

B_CAMPCLK

B_CAMDATA0

B_CAMHREF

B_CAMDATA5

B_CAMDATA1

B_CAMDATA3

Xi2cSCL0[3,9,16]Xi2cSDA0[3,9,16]

B_CAMRST

B_CAMCLK

B_CAMPCLK

B_CAMVSYNC

B_CAMDATA[7:0]

B_CAMHREF

B_CAMCLKB_CAMRST

XciRSTn [4]XciCLK [4]

B_CAMDATA[7:0]

B_CAMHREFB_CAMVSYNC

B_CAMPCLK

B_XirSDBW

XciYDATA[7:0] [4]

XciVSYNC [4]XciHREF [4]XciPCLK [4]

XirSDBW [3,12,16]

REG_EN[7,8]

VDD_CAM_EXT

VDD_CAM_1.5V

VDD_CAM_EXT

VDD_D

VDD_CAM_1.5V

VDD_CAM_1.5V

VDD_CAM_EXT

VDD_CAM_EXTPVDD_EXT PVDD_EXT

VDD_D

VDD_CAMIPVDD_CAM_EXT

VDD_CAM_EXTVDD_CAMIP

VDD_CAM2.8V

C_PWR_5V VDD_CAM2.8V

VDD_CAM_EXT

VDD_CAMIPVDD_CAM_EXT

CB85100nF

C33

1uF

+CTB32

10uF/6.3V/T2012

CB87

100nF

R198

0/R1005

TP96 B_CAMDATA7

+CT21

10uF/6.3V/T2012

R195

0/R1005

TP88 B_CAMDATA1

U38

LTC3406ES5

4

1

3

5

2

VIN

RUN

SW

VFB

GN

D

CB84

100nF

C32 22pF


CB88

100nF

+CTB34

10uF/6.3V/T2012

C30

100nF

TP89 B_CAMVSYNC

TP92 B_CAMDATA3

R196

0/R1005

R194 0/R1005

CON13

AXK8L20125B_Header

1 23 45 67 89 10

11 1213 1415 1617 1819 20

U37

FAN2558S18X-SOT23

1

3

2

5

4

VIN

EN

GND

OUT

PG

R199 47K/R1005

R202 257K,1%/R1005

TP85 B_XirSDBW

TP91 B_CAMHREF

CB90

100nF

R201

0/R1005

R20370K,1%/R1005

TP90 B_CAMDATA2

U36

SN74AVC8T245-DGV

123456789

101112

242322212019181716151413

VCCADIRA1A2A3A4A5A6A7A8GNDGND

VCCBVCCB

OEnB1B2B3B4B5B6B7B8

GND

TP86 B_CAMDATA0

JP26

A2-3PA-2.54DSA

123

R200

0/R1005

JP27

A2-3PA-2.54DSA

123

+CTB362.2uF/6.3V/T2012

C31

100nF

+CT20

10uF/6.3V/T2012

CB91

100nF

U35

SN74AVCA164245DGG

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

+CTB33

10uF/6.3V/T2012

+CTB35

10uF/6.3V/T2012

TP93 B_CAMDATA4

CB89

100nF

TP94 B_CAMDATA5

R197 10K/R1005

TP95 B_CAMDATA6

CB86

100nF

TP87 B_CAMPCLK

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Mem

ory

Port

0(R

OM

I/F

)U

AR

T0, 2

UA

RT

1, 3

(IrD

A)

PW

M

Aud

io P

ort

0

Aud

io P

ort

1

AT

A/G

PS

AT

A/G

PS

MO

DE

M/H

ost/

Key

pad

Inte

rfac

eD

ispl

ay

Dis

play

Exte

rnal

Inte

rrup

t/K

eypa

d

Exte

rnal

Inte

rrup

t/K

eypa

d

SPI P

ort

0

SPI P

ort

1

Touc

hSc

reen

Touc

hSc

reen

TV

TV

I2C

I2C

I2S

Mem

ory

Port

0(R

OM

I/F

)

MO

DE

M/H

ost/

Key

pad

Inte

rfac

e

B2B Connector 0.2


A3




Date: Sheet of

XVD22

B_DATA0

B_DATA4

B_ADDR11

XVD19

B_ADDR14

XVD3

XVD7XVD9XVD11

XVD20

B_DATA13

B_ADDR1

XVD23

XVD10

XVD2

B_DATA14

B_ADDR5

XVD14

B_ADDR6

B_DATA9

XVD6

B_DATA2

B_DATA15

XVD8

B_DATA6

B_ADDR0

B_ADDR8

B_ADDR13

XVD4

XVD12

B_DATA1

B_ADDR4

B_DATA12

B_ADDR10B_ADDR12

XVD13

XVD0

B_DATA3

B_DATA10B_DATA7

XVD5

XVD15XVD18B_ADDR3

XVD1

XVD16

B_DATA8

B_ADDR2

XVD21

XVD17

B_DATA5

B_DATA11

B_ADDR9B_ADDR7

B_ADDR15

Xhi_D8/DATA_CF8/KP_ROW0[4]

Xhi_A9/CE_CF1 [4,6]

B_CLE[11]

B_nBE1 [11]

XuTXD_2/ExdACK/IrTXD/ADDR_CF1[3]

XnRSTOUT[3]


XVD[23:0][4]

B_ADDR[15:0][11]

XEINT9/ADDR_CF1 [3]

XPCM_DCLK1/I2S_CLK1/AC97_BITCLK0 [3,9]

XdacOUT_0[4]

XuTXD_1 [3]

B_SPI0_CSn[13]

B_ADDR19 [11]


Xhi_A11/IOWR_CF [4]

Xhi_A2/ADDR_CF2/KP_COL2[4]

B_ALE[11]

B_CSn_1 [11]

B_ADDR18[11]


Xhi_A1/ADDR_CF1/KP_COL1 [4]

XEINT8/ADDR_CF0[3]XEINT7/KP_ROW7 [3,8]


Xadc_AIN7_XP [4]

XirSDBW [3,12,15]

XuRTSn_0/ADDR_CF1[3]

B_SPI1_CLK/MMC2_CLK/i2sV40_DO1 [13]

B_ADDR17 [11]

Xhi_D6/DATA_CF6[14]

XhiCSn/CE_CF0 [4]

Xhi_A6/KP_COL6/Xm0REGata[4]

B_CSn_5 [11]

XEINT6/KP_ROW6[3]


Xhi_A0/ADDR_CF0/KP_COL0[4]

B_OEata [11]

B_WAITn/IORDY[11]

XEINT4/KP_ROW4[3]

XEINT15 [3,6]

XPCM_SOUT0/I2S_DO0/AC97_SDO0[3,9]

Xi2cSCL0 [3,9,15]

B_SPI1_CSn/i2sV40_DO2 [13]

Xhi_D2/DATA_CF2[14]

XhiCSn_sub/CF_IORD [4]XhiWEn/CF_IOWR[4]

B_DATA[15:0][11]

XEINT0/KP_ROW0[3]

XPCM_FSYNC0/I2S_LRCLK0/AC97_SYNC0/ADDR_CF2[3,9]

Xadc_AIN6_XM[4]

Xhi_D15/DATA_CF15/KP_ROW7 [4]

B_nBE0[11]

XEINT2/KP_ROW2[3]

XEINT14[3,6]

XPCM_DCLK0/I2S_CLK0/AC97_BITCLK0/ADDR_CF0[3,9]

XuRTSn_1/ADDR_CF1 [3]XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1 [3,11]

B_INTata[11]

B_HSMMC_DAT5/i2sV40_CDCLK [13]

XHSYNC[4]


XhiOEn/CF_IORDY [4]XhiCSnmain/CE_CF1[4]

B_CData [11]

XEINT5/KP_ROW5 [3]

XPCM_SIN0/I2S_DI0/AC97_SDI0[3,9]

XuRXD_0[3]


B_CSn_4[11]

XEINT12[3,6,13]

XPCM_EXTCLK0/I2S_CDCLK0/AC97_RSTn0/ADDR_CF1[3,9]

XuCTSn_1/ADDR_CF0 [3]

XuTXD_3/ExdACK/IrTXD/Xi2cSDA1 [3]

B_INPACKata[11]

B_HSMMC_DAT7/i2sV40_DI [13]


Xhi_A3/KP_COL3/Xm0INTata [4]

XhiINTR[4,8,12]

B_WEata [11]

B_DATA[15:0] [11]

XEINT13 [3,6,13]

B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 [13]

Xadc_AIN4_YM[4]

XuTXD_0[3]


Xhi_A10/IORD_CF[4,6]

B_CSn_0[11]

XuRXD_1 [3]

Xi2cSDA0[3,9,15]

B_REGata[11]

B_HSMMC_DAT6/i2sV40_LRCLK [13]

Xhi_D16/DATA_CF8[4]


Xhi_A5/KP_COL5/Xm0INPACKata [4]

Xhi_A8/CE_CF0[4,6]

XVCLK [4]

B_FREn [11]

XEINT3/KP_ROW3 [3]


B_SPI1_MOSI [13]

XdacOUT_1 [4]

XPWM_ECLK[3,8,13]



B_WEn/nIOWR_CF[11]

B_CSn_2[11]

XuCTSn_0/ADDR_CF0[3]

Xhi_D0/DATA_CF0[14]

XVD[23:0] [4]

Xhi_A12/IORDY_CF[4]

B_ADDR[15:0] [11]

B_OEn/nIORD_CF [11]

B_RESET[11]

XEINT1/KP_ROW1 [3]


B_SPI0_MISO/ADDR_CF0[13]

XnRESET [2,3,6,14]

XVDEN[4]

Xhi_A7/KP_COL7/Xm0CData [4]

XVSYNC[4]

B_FWEn[11]

B_CSn_3 [11]

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0[3]

Xhi_D4/DATA_CF4[14]

Xhi_A4/KP_COL4/Xm0RSTata[4]

B_RnB [11]

XEINT10/ADDR_CF2[3] XEINT11 [3,6]

XPCM_FSYNC1/I2S_LRCLK1/AC97_SYNC0 [3,9]

B_SPI0_MOSI/ADDR_CF2[13]

Xadc_AIN5_YP [4]

B_SPI0_CLK/ADDR_CF1[13]

B_ADDR16[11]

B_HSMMC_DAT4/i2sV40_BCLK [13]

WHITE_LED[9]WLED_OUT1[9]

PMIC_MONO_SPK_N [9]PMIC_MONO_SPK_P [9]

PMIC_STEREO_VMID[9]PMIC_STEREO_CH1 [9]

PMIC_BEAR_SPK_P [9]

PMIC_REM_IN[9]

PMIC_MODEM_SPK_P [9]

PMIC_BEAR_SPK_N [9]

PMIC_MODEM_SPK_N [9]

PMIC_STEREO_CH2 [9]

PWM_TOUT1[3]PWM_TOUT0[3]

PMIC_MIC1_N [9]

PMIC_MIC2_N [9]PMIC_MIC2_P [9]

PMIC_MIC1_P [9]

PMIC_MODEM_MIC_P [9]

AP_nRESET [2]

Modem_nRESET [2]

B_XmmcCLK1/ADDR_CF0[13]B_XmmcDATA1_0/ADDR_CF2[13]

B_XmmcDATA1_2[13]

B_XmmcCMD1/ADDR_CF1 [13]B_XmmcDATA1_1 [13]B_XmmcDATA1_3 [13]

VDD_D

VDD_DC_PWR_5V

C_PWR_5V

C_PWR_5V VDD_D

VDD_D

C_PWR_5V

VDD_D

VDD_D

C_PWR_5V

C_PWR_5V

PVCCAUX1 PVCCAUX3 PVCCM3BT PVCCM2MTV PVDD_SS

PVCCAUX1

PVCCAUX2

PVCCAUX2

PVDD_SS

PVCCM3BT

PVCCM2MTV

PVCCAUX3

PVDD_EXT PVDD_SYSPVDD_AUDIO

PVDD_LCD

PVDD_AUDIO

PVDD_SYS

PVDD_LCD

PVDD_EXT

+CTB43

10uF/6.3V/T2012

CB95

100nF

CB105

100nF

+CTB38

10uF/6.3V/T2012CB104

100nF

CB98

100nF

CB100

100nF

+CTB41

10uF/6.3V/T2012

+CTB48

10uF/6.3V/T2012

CB103

100nF

CB97

100nF

CB93

100nF

+CTB42

10uF/6.3V/T2012

+CTB39

10uF/6.3V/T2012

+CTB37

10uF/6.3V/T2012

CB92

100nF

+CTB40

10uF/6.3V/T2012

JB1

QSS-075-01-F-D-A

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

+CTB50

10uF/6.3V/T2012

CB96

100nF

CB94

100nF

+CTB49

10uF/6.3V/T2012

+CTB47

10uF/6.3V/T2012

TP100

JB2

QSS-075-01-F-D-A

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

+CTB52

10uF/6.3V/T2012

CB99

100nF

CB101

100nF

+CTB46

10uF/6.3V/T2012

TP101

TP98

+CTB44

10uF/6.3V/T2012

TP97

+CTB45

10uF/6.3V/T2012

+CTB51

10uF/6.3V/T2012

CB102

100nF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Table of Contents

Description

SMDK6410 Base B'd (S3C6410 Evaluation Board) SchematicsDateRevision

Page Function-------------------------------------------------------01 Revision History02 B2B Connector(Base)03 NOR/SRAM/NAND/Config04 Audio(General0)05 Audio(Jack)/Multi-IIC/PWM06 Audio(WM9713_AC97)07 Audio(WM8580_IIS5.1CH)08 CF Socket (ATA)09 UART/IrDA10 Ext. Bus/ Modem I/F11 Ethernet 10Mbps(CS8900)12 Ethernet 100Mbp(LAN9115)13 Keypad14 Module Connector1_215 Module Connector3_416 Module Connector5 (LCD)/TV17 Power

Rev 0.0 2008. 02.22 Preliminary Version

Part Reference<Component><Number>---------------------------------------------------U : Component or Regurator ICC : CapacitorCB : Capacitor BypassCT : Capacitor TantalCTB : Capacitor Tantal BypassJ : JumperJB : CPU or Base connectorJP : Jumper PowerR : ResistorRA : Resistor ArrayRP : Resistor PowerVR : Variable ResistorL : InductorFB : Ferrite BeadOSC : OscillatorX : X-tal (Crystal)Q : Transistor or FETD : DiodeZD : Zener DiodeLED : LED DiodeSW : SWitch Tact/PushCON : CONnectorCFG : ConFiGure switch (DIP/Slide)TP : Test Point (SMD)TPH : Test Point Hole (Through Hole)MTH: Mount Through HoleM (MOD) : MODule Interface connector

Rev 0.1 2008. 04.02 Second Version (Changed sheet 3 ~ 10, 12, 13, 15, 16 and 17)Rev 0.2 2008. 04.30 Third Version (Changed sheet 3, 5, 14 and 17)

Revision History 0.2

SMDK6410 Base Board (S3C6410 Evaluation Board)

A3

1 17Wednesday, April 30, 2008



Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Touc

hSc

reen

UA

RT

1,3

(IrD

A)

Touc

hSc

reen

UA

RT0

, 2

SPI P

ort

1

SP

I Por

t 0

Exte

rnal

Inte

rrup

t/K

eypa

d

Mem

ory

Port

0(R

OM

I/F

) Exte

rnal

Inte

rrup

t/K

eypa

d

TV

Dis

play

MO

DE

M/H

ost/

Key

pad

Inte

rfac

e

Dis

play

Mem

ory

Port

0(R

OM

I/F

)

MO

DE

M/H

ost/

Key

pad

Inte

rfac

e

AT

A

I2S

AT

A

I2C

Aud

io P

ort

1

I2C

Aud

io P

ort

0

TV

PW

MPMIC_BEAR_SPK_NPMIC_BEAR_SPK_P

PMIC_MONO_SPK_NPMIC_MONO_SPK_PPMIC_MODEM_SPK_NPMIC_MODEM_SPK_P

PMIC_STEREO_VMID

PMIC_MODEM_MIC_P

PMIC_MIC1_PPMIC_MIC2_NPMIC_MIC2_P

PMIC_REM_IN

(Now, Not Used)

(Now, Not Used)

(Now, Not Used)

(Now, Not Used)

(Now, Not Used)

(Now, Not Used)(Now, Not Used) (Now, Not Used)

B2B Connector(Base) 0.2


A3




Date: Sheet of

XVD23B_ADDR9

B_ADDR19

XVD19B_ADDR2

B_DATA4

XVD10

B_DATA12

B_ADDR4B_ADDR6

B_ADDR14

XVD21

XVD3

B_ADDR10

B_DATA0

XVD22B_ADDR8

B_DATA3

B_ADDR15

B_ADDR11

B_ADDR5B_ADDR3 XVD18

B_DATA7

B_ADDR7

B_ADDR12

B_DATA8B_DATA5

XVD16

B_ADDR13

XVD12

B_ADDR0

XVD20

XVD15

B_DATA14

B_DATA10

B_DATA6

B_ADDR18

B_DATA15

B_ADDR17

XVD4XVD1

XVD11

XVD8

B_DATA13

B_DATA1

XVD0

XVD5

B_DATA2

XVD9

B_ADDR16

B_DATA9

XVD14 XVD13

XVD2

XVD17

XVD7

B_DATA11

B_ADDR1

XVD6

PMIC_STEREO_CH2 [5]


B_ADDR[19:0][3,8,10..12]

PMIC_STEREO_CH1 [5]

B_nBE1 [3,10,11]



B_OEn/nIORD_CF [3,8,10..12]

B_SPI1_MOSI [14,15]


XEINT12[17]

XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1 [5,8..10]


B_XmmcDATA1_0/ADDR_CF2[13]

XuRTSn_1/ADDR_CF1 [9,15]



XuTXD_3/ExdACK/IrTXD/Xi2cSDA1 [5,9,10]

B_WEata [8]

XHSYNC[16]

XuCTSn_1/ADDR_CF0 [9,15]


B_XmmcCMD1/ADDR_CF1 [13]

B_SPI0_MISO/ADDR_CF0[14..16]

B_HSMMC_DAT5/i2sV40_CDCLK [7,8,13,15]

B_CLE[3]

Xhi_A12/IORDY_CF[8,10]

XirSDBW [9]

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0[8..10,14]

B_CSn_3 [3]


XVD[23:0] [16]

B_ALE[3]

XuTXD_1 [9,15]

B_XmmcDATA1_3 [13]B_DATA[15:0][3,8,10..12]

Xhi_D17/DATA_CF9 [10]Xhi_D14/DATA_CF14/KP_ROW6[8,10,13]

B_CSn_1 [3]

XEINT4/KP_ROW4[10,13,15,16]

Xadc_AIN7_XP [16]

Xhi_A11/IOWR_CF [8,10,15]

B_CSn_5 [3]


PMIC_MIC1_N [5,6]

B_SPI0_CSn[14,16]

E_XPCM_SOUT1/I2S_DO1/AC97_SDO0 [4]




Xhi_A9/CE_CF1 [8,10,14]

XEINT5/KP_ROW5 [10,13,16]

B_RESET[8]

XEINT1/KP_ROW1 [13]



Xi2cSCL0 [5,7,14,15]

E_XPCM_FSYNC0/I2S_LRCLK0/AC97_SYNC0/ADDR_CF2[4]

XEINT9/ADDR_CF1 [14,17]

E_XPCM_SIN1/I2S_DI1/AC97_SDI0 [4]


B_CData [8]

B_nBE0[3,10]

XVSYNC[16]

Xhi_A7/KP_COL7/Xm0CData [8,10,13,14]

XhiCSn/CE_CF0 [8,10]

B_SPI0_MOSI/ADDR_CF2[3,14..16]

B_FWEn[3]

XVCLK [16]


PWM_TOUT1[5,16]

XEINT0/KP_ROW0[13]

B_XmmcCLK1/ADDR_CF0[13]

Xhi_A3/KP_COL3/Xm0INTata [8,10,13]

XEINT15 [14,16,17]

WHITE_LED[16]


XhiINTR[10,16]

B_INPACKata[8]


XVDEN[16]

B_DATA[15:0] [3,8,10..12]

XuTXD_0[9,10,14]


E_XPCM_EXTCLK1/I2S_CDCLK1/AC97_RSTn0 [4]



B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 [7,14,15]

Xadc_AIN6_XM[16]

XdacOUT_0[16]

E_XPCM_EXTCLK0/I2S_CDCLK0/AC97_RSTn0/ADDR_CF1[4]

B_FREn [3]

XdacOUT_1 [16]

XEINT13 [14,16,17]

B_SPI1_CSn/i2sV40_DO2 [7,14,15]

Modem_nRESET [10]


E_XPCM_DCLK0/I2S_CLK0/AC97_BITCLK0/ADDR_CF0[4]


AP_nRESET [10]

B_CSn_0[3]

B_INTata[8]

B_CSn_2[3]

XEINT11 [17]

Xhi_A8/CE_CF0[8,10]

E_XPCM_DCLK1/I2S_CLK1/AC97_BITCLK0 [4]

XEINT14[16,17]



XVD[23:0][16]

XEINT3/KP_ROW3 [10,13,15]

XuTXD_2/ExdACK/IrTXD/ADDR_CF1[8..10,14]

B_XmmcDATA1_2[13]

B_WAITn/IORDY[8,10,11]

E_XPCM_FSYNC1/I2S_LRCLK1/AC97_SYNC0 [4]

XEINT10/ADDR_CF2[11,12,14,17]

Xadc_AIN5_YP [16]


E_XPCM_SOUT0/I2S_DO0/AC97_SDO0[4]E_XPCM_SIN0/I2S_DI0/AC97_SDI0[4]

B_RnB [3]

B_OEata [8]

Xhi_A5/KP_COL5/Xm0INPACKata [8,10,13,14]

B_WEn/nIOWR_CF[3,8,10..12]

XnRESET [3]


B_XmmcDATA1_1 [13]

B_REGata[8]

PWM_TOUT0[5,16]

XnRSTOUT[10..16]

Xadc_AIN4_YM[16]


XuRXD_0[9,10,14]

WLED_OUT1[16]

XPWM_ECLK[5,16]




XhiWEn/CF_IOWR[8,10]

XEINT6/KP_ROW6[9,13,15,16]

B_ADDR[19:0] [3,8,10..12]

Xhi_D16/DATA_CF8[10]

Xi2cSDA0[5,7,14,15]

B_CSn_4[3]

XuRXD_1 [9,15]


XEINT7/KP_ROW7 [9,13,15,16]

PVDD_EXT

PVCCM3BT

B_PWR_5V

PVDD_EXT

PVDD_SS

PVCCAUX3

PVCCM2MTVB_PWR_5V PVDD_AUDIOPVDD_SS

B_PWR_5VPVDD_SYS

PVCCAUX1

VDD3.3V

PVDD_SYS

PVDD_LCD

B_PWR_5V

B_PWR_5V

PVCCAUX3PVCCAUX2PVCCAUX1

VDD3.3V

PVCCM2MTV

PVCCAUX2

VDD3.3V

PVCCM3BT

VDD3.3V

PVDD_LCD

VDD3.3V

B_PWR_5V VDD3.3V

PVDD_AUDIOTP3

TP12

+

CTB1

10uF,6.3V/T2012

TP4TP5

+ CTB7

10uF,16V/T3216

+

CTB13

10uF,6.3V/T2012

TP6

JB2

QTS-075-03-F-D-A

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

TP2

CB8

100nF/C1608

+

CTB12

10uF,6.3V/T2012

CB10

100nF/C1608

CB14

100nF/C1608

CB12

100nF/C1608

+

CTB11

10uF,6.3V/T2012

TP1

+CTB6

10uF,16V/T3216

TP16

+

CTB10

10uF,6.3V/T2012

CB4

100nF/C1608

+

CTB9

10uF,6.3V/T2012

CB2

100nF/C1608

TP13

CB7

100nF/C1608

CB5

100nF/C1608

CB9

100nF/C1608

+

CTB5

10uF,6.3V/T2012

CB6

100nF/C1608

TP10

CB11

100nF/C1608

+

CTB8

10uF,6.3V/T2012

CB3

100nF/C1608

TP9

CB13

100nF/C1608

+

CTB16

10uF,6.3V/T2012

TP15

TP7

+ CTB4

10uF,16V/T3216

+

CTB15

10uF,6.3V/T2012

JB1

QTS-075-03-F-D-A

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

51 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121123125127129131133135137139141143145147149

122124126128130132134136138140142144146148150

TP14

TP8

+

CTB2

10uF,6.3V/T2012

TP11

CB1

100nF/C1608

+CTB3

10uF,16V/T3216

+

CTB14

10uF,6.3V/T2012

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SROM Selector

[1]

16-bit: R11,14,17,21,24,298-bit: R13,16,19,23,26,30

NAND

SROM Selector

XD PICTURE CARD

[3]

[3]

AMD FlashMemory(SOCKET)

Ethernet

SROM Selector

CF card

[1]

CFGB2:nCS1

SROM Selector

[4]

CFGB5:nCS4CFGB6:nCS5

[3]

External

XD card

SRAM

SRAM

[2]

<Silk>

[4]

NOR(AMD)

[1]

[4]

[2]

NOR(AMD)

[2]

SRAM

[1]

External

OR AM29LV160BB

NOR(AMD)

[3]

Ethernet

SRAM

Ethernet

CFGB1:nCS0

External

NAND Flash memory (SOCKET )

CFGB3:nCS2CFGB4:nCS3

[2]

<Silk>NOR

<Silk>NAND

GPC2

Add&Changedon 04/30/2008

NOR/SRAM/NAND/Config 0.2


A3




Date: Sheet of

IO4/IO12

B_DATA8

B_DATA14

B_DATA7

B_ADDR9

B_DATA2

B_DATA8

B_DATA12

B_ADDR6

B_DATA4

B_ADDR2

B_DATA15

B_DATA6

B_DATA14

B_DATA11

B_DATA7

B_DATA3

B_DATA1

B_DATA15

B_ADDR19

B_DATA14

B_ADDR8

B_DATA0

B_DATA13

B_DATA6

B_DATA3

IO7/IO6

B_ADDR1

B_DATA12

IO2/IO10

B_DATA4

B_DATA9

IO6/IO13

B_ADDR1

B_DATA10

B_DATA1

B_DATA8B_ADDR7

B_ADDR17

B_ADDR3

B_DATA5

B_DATA11B_ADDR13

B_DATA0

B_ADDR4

B_DATA11

B_DATA0

B_DATA6

B_DATA4

B_ADDR5

B_ADDR6

B_ADDR10

B_DATA5

B_ADDR12

B_DATA6

B_DATA1

B_DATA10

B_DATA5

B_DATA0

IO1/IO2

B_ADDR7

B_DATA9 B_DATA1

B_DATA13 B_ADDR13

B_DATA1

IO7/IO6

IO0/IO9

B_DATA7

B_ADDR17

B_DATA4

B_DATA7

B_DATA0

B_DATA2

B_DATA12

B_ADDR16

B_ADDR11

B_ADDR14B_ADDR14

B_ADDR9

B_DATA4

B_DATA6

B_ADDR18

B_DATA2B_ADDR2

B_DATA10

B_DATA9

IO1/IO2

B_DATA7

B_ADDR12

IO4/IO12

B_ADDR16

B_ADDR11

B_DATA3

IO6/IO13

IO0/IO9

B_DATA13

B_ADDR18

B_ADDR4B_ADDR5

B_DATA2

B_ADDR15

B_ADDR8

IO2/IO10

B_ADDR3

B_DATA2

B_ADDR15

B_DATA5

B_DATA3

B_DATA15

B_ADDR10

nCS_NAND

XnRESET [2]

nCS_ETH [12]

B_CLE[2]

nCS_EXT [10]

nCS_XD

nCS_SRAM

B_DATA[15:0][2,8,10..12]

nCS_AMD

nCS_AMD

B_ALE[2]

B_DATA[15:0][2,8,10..12]

nCS_ETH [12]

B_DATA[15:0][2,8,10..12]

nCS_XD

nCS_AMD

B_CSn_4[2]

B_nBE1 [2,10,11]

B_FWEn[2]

nCS_AMD

B_CSn_0[2]

B_FREn[2]

B_ADDR[19:0] [2,8,10..12]

nCS_EXT [10]

B_FREn[2]

B_WEn/nIOWR_CF [2,8,10..12]

B_CLE[2]

B_ALE[2]

nCS_SRAM

B_CSn_2[2]

nCS_ETH [12]

nCS_EXT [10]

B_CSn_1[2]


B_CSn_5[2]

nCS_CF0 [8]

B_ADDR[19:0] [2,8,10..12]

B_RnB[2]

B_FWEn[2]

B_CLE[2]

nCS_XD

nCS_XD

B_DATA[15:0][2,8,10..12]

nCS_AMD

B_CSn_3[2]

nCS_CF1 [8]

nCS_ETH [12]


B_CSn_5[2]

B_ALE[2]


nCS_ETH [12]

nCS_EXT [10]

B_RnB[2]

nCS_SRAM

B_nBE0 [2,10]

B_FWEn[2]

B_CSn_4[2]

nCS_SRAM

B_FREn[2]

nCS_NAND

nCS_NAND

nCS_SRAM

B_RnB[2]

nCS_NAND2

nCS_NAND3nCS_NAND4

nCS_NAND2

nCS_NAND3

nCS_NAND4

B_SPI0_MOSI/ADDR_CF2[2,14..16]

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

CB19

100nF/C1608

R25 0/R1608

R13 0/R1608

R234.7K/R1608

CB18

100nF/C1608

U1

Socket S-TSO-SM-048-A (with AM29LV800BB,1MB)

2524232221201918

87654321

481716

9

2746

26281115124737

29313335384042443032343639414345

10

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19

VSS0VSS1

nCEnOEnWE

nRY/BYnRESET

nBYTEVDD0

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

DQ10DQ11DQ12DQ13DQ14

DQ15/A-1

A20

R360/R1608

R7 0/R1608

R20 0/R1608

CFG7

CAS220A1

1

2

3

4

5

6

A1

C1

B1

A2

C2

B2

R26 0/R1608

R34 0/R1608

TP21 nFWE

CON1

xD_CARD Socket

23456789

101112131415161718

191 R/B

RECECLEALEWEWPGNDD0D1D2D3D4D5D6D7VCC

GNDGND

R12 0/R1608

R80/R1608

R2 100K/R1608

R3 100K/R1608

R18 NC/R1608

R24 NC/R1608

R32 0/R1608 R33 NC/R1608

R4570/R1608

R16 0/R1608

R35NC/R1608

+CTB18

10uF,6.3V/T2012

U3

Socket S-TSO-SM-048-A (With K9F2G08UOA-P)

123456789

101112131415161718192021222324

484746454443424140393837363534333231302928272625

NC0NC1NC2NC3NC4NC5R/nBnREnCENC6NC7VCC0VSS0NC8NC9CLEALEnWEnWPNC10NC11NC12NC13NC14

NC29/ VSS2NC28/ IO15

NC27/ IO7NC26/ IO14

IO7/ IO6IO6/ IO13

IO5IO4/ IO12

NC25/ IO4NC24NC23VCC1

VSS/ NC22NC21NC20

NC19/ IO11IO3

IO2/ IO10IO1/ IO2IO0/ IO9

NC18/ IO1NC17/ IO8NC16/ IO0

NC15/ VSS1

R4 100K/R1608

R31 0/R1608

CFGB6

KHS04

1234

8765

R37 NC/R1608

CB15

100nF/C1608

CFGB5

KHS04

1234

8765

R17 0/R1608

CB20

100nF/C1608

U2

K6X4016T3F_1

54321

4443422726252423222120

78910131415162930313235363738

6

17

41

3940

1234

1133

1918

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15

I/O1I/O2I/O3I/O4I/O5I/O6I/O7I/O8I/O9

I/O10I/O11I/O12I/O13I/O14I/O15I/O16

CS

WE

OE

LBUB

VSSVSS

VCCVCC

A16A17

R5 100K/R1608

+CTB19

10uF,6.3V/T2012

R29 0/R1608

CB17

100nF/C1608

CFGB4

KHS04

1234

8765

R28NC/R1608

R38 NC/R1608

CFGB3

KHS04

1234

8765

R22 0/R1608

R30 0/R1608

R6 100K/R1608

R45010K/R1608

R14 NC/R1608

CFGB2

KHS04

1234

8765

CFGB1

KHS04

1234

8765

R15NC/R1608

R21 NC/R1608

TP18 nFRE

R27 NC/R1608

R9 100K/R1608

+CTB17

10uF,6.3V/T2012

R39 NC/R1608

TP20 CLE

TP17 RnB

CB16

100nF/C1608

R19 0/R1608

R10 100K/R1608

TP19 ALE

R1 100K/R1608

R1110K/R1608

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Port 0 :Internal

Off: WM8580 (IIS)On: WM9713 (AC97)/PMIC

<Silk>

Selector

<Silk>

[3] : LineIn

[4] : Reserved

Off

Port 1 :External

[2] : Mic

CFG2

CFG1:AudioConnector

Port 1 :Internal

Reserved

[1] : Speaker

Port 0:AC97Port 1:IIS/PCM

[3][1]

On

[4][2]

Port 0 :External

Port 0 :IIS/PCMPort 1 :AC97

Audio Port 0

Audio Port 1

Audio(General0) 0.2


A3




Date: Sheet of

M3_Port1_PCM_SOUT [15]

M4_Port1_I2SLRCLK/AC_SYNC [15]

AC97_SYNC [6]

M4_Port1_I2SCDCLK/AC_RSTn [15]

E_XPCM_SOUT1/I2S_DO1/AC97_SDO0[2]


AC97_SDI [6]

E_XPCM_SIN1/I2S_DI1/AC97_SDI0[2]

M4_Port1_I2SSDI/AC_SDI [15]

XPCM_DCLK/I2S_CLK [6,7]

E_XPCM_SIN1/I2S_DI1/AC97_SDI0 [2]

XPCM_SIN/I2S_DI [6,7]

M3_Port1_PCM_SIN [15]


M4_Port1_I2SDO/AC97_SDO [15]

E_XPCM_FSYNC1/I2S_LRCLK1/AC97_SYNC0[2]E_XPCM_EXTCLK1/I2S_CDCLK1/AC97_RSTn0[2]

E_XPCM_SOUT1/I2S_DO1/AC97_SDO0 [2]

E_XPCM_FSYNC1/I2S_LRCLK1/AC97_SYNC0 [2]E_XPCM_FSYNC0/I2S_LRCLK0/AC97_SYNC0/ADDR_CF2[2]


E_XPCM_SIN0/I2S_DI0/AC97_SDI0[2]

AC97_BITCLK [6]

XPCM_SOUT/I2S_DO [6,7]

E_XPCM_EXTCLK0/I2S_CDCLK0/AC97_RSTn0/ADDR_CF1[2]E_XPCM_DCLK1/I2S_CLK1/AC97_BITCLK0 [2]

E_XPCM_DCLK1/I2S_CLK1/AC97_BITCLK0[2]XPCM_EXTCLK/I2S_CDCLK [6,7]

M3_Port1_FSYNC [15]

XPCM_FSYNC/I2S_LRCLK [6,7]

M4_Port1_I2SSCLK/AC_BITCLK [15]

E_XPCM_EXTCLK1/I2S_CDCLK1/AC97_RSTn0 [2]

AC97_SDO [6]


AC97_RSTn [6]

Speaker_nWM8753/WM9713 [5]Mic_nWM8753/WM9713 [5]LineIn_nWM8753/WM9713 [5]

nAudio1_EnAC97/IIS_PCM


E_XPCM_EXTCLK0/I2S_CDCLK0/AC97_RSTn0/ADDR_CF1[2]

XPCM_EXTCLK/I2S_CDCLK [6,7]

M4_Port0_I2SCDCLK/AC_RSTn [15]M4_Port0_I2SLRCLK/AC_SYNC [15]

nAudio0_En

M2_Port0_I2SCDCLK/AC_RSTn [14]

AC97_BITCLK [6]

XPCM_SIN/I2S_DI [6,7]


AC97_RSTn [6]



AC97_SDI [6]E_XPCM_FSYNC0/I2S_LRCLK0/AC97_SYNC0/ADDR_CF2[2]

XPCM_FSYNC/I2S_LRCLK [6,7]


M2_Port0_I2SLRCLK/AC_SYNC [14]

XPCM_SOUT/I2S_DO [6,7]

AC97_SYNC [6]




XPCM_DCLK/I2S_CLK [6,7]

E_XPCM_SIN0/I2S_DI0/AC97_SDI0[2]AC97_SDO [6]

AC97/IIS_PCM

AC97/IIS_PCM

nAudio1_EnnAudio0_En

AVDD_ext

VDD_ext

VDD_ext

VDD_ext

R75 0/R1608

R52 0/R1608

U4

SN74CBTLV3383DGVRE4

1

23

4 5

67

8 9

1011

12

24

2322

21 20

1918

17 16

1514

13nBE

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

BX

R64

0/R

1608

R44

0/R

1608

R69 NC/R1608

R53 0/R1608

R67

0/R

1608

R72 NC/R1608

CFG1

KHS04

1234

8765

R65

0/R

1608

R61

100K/R1608

R77 0/R1608

R54 NC/R1608

R46

0/R

1608

U5

SN74CBTLV3383DGVRE4

1

23

4 5

67

8 9

1011

12

24

2322

21 20

1918

17 16

1514

13nBE

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

BX

R40100K/R1608 R42

100K/R1608

R68 NC/R1608

R55 NC/R1608

R47

0/R

1608

R62100K/R1608

R76 0/R1608

R48

NC

/R16

08

R41100K/R1608

R43100K/R1608

R49 0/R1608

R56 NC/R1608

R60100K/R1608

R70 NC/R1608

(HDR12-2.54-MALE)

CON2

A1-12PA-2.54DSA

345

8

1011

12

9

7

6 12

C1 100nF/C1608

R50 0/R1608

R57 NC/R1608

R66

0/R

1608

CFG2

KHS04

1234

8765

C2 100nF/C1608

R73 0/R1608

R59100K/R1608

R45

0/R

1608

R74 0/R1608

R51 0/R1608

R58 NC/R1608

R63

0/R

1608

R71 NC/R1608

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

<--LINE!!

<Silk>Rear LR

Headphone/Front LR<Silk>

<Silk>Center/Sub

0 : NC ON1 : NO ON

<Silk>Line In Mic In<Silk>

Line In Left

Line In Right

8-TSSOP packageFor Multi_Master

IIC Interface

8-TSSOP package


Audio(Jack)/Multi-IIC/PWM 0.2


A3




Date: Sheet of

PMIC_STEREO_CH1[2]

WM8580_OUT_RR[7]

Speaker_nWM8753/WM9713 [4]

WM8753_OUT_FL[7]

WM8580_OUT_Sub[7]

Speaker_nWM8753/WM9713[4]

WM8580_OUT_Center[7]

WM9713_OUT_L[6]

WM8753_OUT_FR[7]

PMIC_STEREO_CH2[2]WM9713_OUT_R[6]

WM8580_OUT_RL[7]

LineIn_nWM8753/WM9713 [4]

Mic_nWM8753/WM9713 [4]

WM9713_LINE_L[6]

WM9713_LINE_R[6]

WM8580_LINEIN_R[7]

WM8580_LINEIN_L[7]

WM9713_MIC[2,6]

WM8580_MIC[7]

PMIC_MIC1_N[2,6]

XuTXD_3/ExdACK/IrTXD/Xi2cSDA1 [2,9,10]XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1 [2,8..10]

Xi2cSCL0 [2,7,14,15]Xi2cSDA0 [2,7,14,15]

Xi2cSDA0[2,7,14,15]Xi2cSCL0[2,7,14,15]

PWM_TOUT0[2,16]XPWM_ECLK[2,16]

PWM_TOUT1[2,16]

XuTXD_3/ExdACK/IrTXD/Xi2cSDA1 [2,9,10]XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1 [2,8..10]

AVDD_ext

VDD_ext

VDD3.3VVDD_ext

AVDD_ext

AVDD_ext

AVDD_ext

AVDD_extAVDD_ext

AVDD_ext

VDD3.3VVDD3.3V

CB26100nF/C1608 R83

100K/R1608

CB24100nF/C1608

C3

220pF/C1608

R81 1.5K/R1608

U9

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

CB25

100nF/C1608

(HDR4-2.54-MALE)

J1

A2-4PA-2.54DSA

1234

U6

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

CB21100nF/C1608

+ CTB2310uF,6.3V/T2012

R87 0/R1608

R93

NC/R1608

R84

100K/R1608

+CTB2410uF,6.3V/T2012

+ CTB25

10uF,6.3V/T2012

+CTB2247uF,6.3V/T3528

R89 0/R1608

+

CTB2010uF,6.3V/T2012

U10

S524AD0XD1

1234 5

678NC0

NC1NC2VSS SDA

SCLWP

VDD

R88 0/R1608

JP1

A2-2PA-2.54DSA

12

U7

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

R91NC/R1608

Gnd

L

R

JACK1

PJ-327-2

3

2

1

+

CTB2110uF,6.3V/T2012

CB23100nF/C1608

R852K/R1608

+

CTB2710uF,6.3V/T2012

+

CTB2610uF,6.3V/T2012

Gnd

L

R

JACK3

PJ-327-2

3

2

1

CB22100nF/C1608

FB1

BLM18PG121SN1

R78

100/R1608

FB2

BLM18PG121SN1

Gnd

L

R

JACK2

PJ-327-2

3

2

1

Gnd

L

R

JACK5

PJ-327-2

3

2

1

R92

NC/R1608

R801.5K/R1608

R90 0/R1608

U11

KS24C080C

1234 5

678NC0

NC1NC2VSS SDA

SCLWP

VDD

R862K/R1608

(HDR8-2.54-MALE)

CON3

A1-8PA-2.54DSA

68

3

7

24

5

1

R79 6.8K/R1608

R82100K/R1608

U8

MAX4764ETB

4

8

2

10

6 7

5

3

9

1NC1

NC2

NO1

NO2

GND IN2

IN1

COM1

COM2

VCC

Gnd

L

R

JACK4

PJ-327-2

3

2

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Vout = 1.242 (R2/R1+1)

R1

R2

Audio(WM9713_AC97) 0.2


A3




Date: Sheet of

AC

97_S

DO [4]

AC

97_S

YN

C [4]

AC

97_R

STn [4

]

XPCM_DCLK/I2S_CLK[4,7]

XPCM_SIN/I2S_DI[4,7]

WM9713_MIC [2,5]

XP

CM

_EX

TCLK

/I2S

_CD

CLK [4,7

]

WM9713_LINE_L [5]

AC

97_S

DI

[4]

WM9713_OUT_L[5]

XPCM_SOUT/I2S_DO[4,7]

XPCM_FSYNC/I2S_LRCLK[4,7]

AC

97_B

ITC

LK [4]

WM9713_OUT_R[5]

WM9713_LINE_R [5]

WM9713_MICBIAS

WM9713_MICBIAS

VDD_18V

AVDD_ext

B_PWR_5V

AVDD_ext

VDD_ext

VDD_18V

AVDD_ext

VDD_ext

+CTB32

4.7uF,6.3V/T3216

+CTB3510uF,6.3V/T2012

C161uF/C1608

C6

1uF/C1608

R119100K/R1608

CB29

100nF/C1608

+CTB29

4.7uF,6.3V/T3216

R4530/R1608

R94NC/R1608

+CTB33

4.7uF,6.3V/T3216

R104NC (47K)/R1608

C13

100nF/C1608

TP26

CB30100nF/C1608

CB32100nF/C1608

C11

100nF/C1608

C21

220pF/C1608

CB35

100nF/C1608

+

CTB31100uF,6.3V/T3528

R110

NC (100K)/R1608

OSC1

ISXO-5 (SMD 24.576MHz)

1 2

34

OE GND

OUTVDD

R99

8.2K/R1608

R95NC/R1608

C9

100nF/C1608

CB31100nF/C1608

C17

220pF/C1608

R105 NC/R1608

CB36

100nF/C1608

R102 0/R1608

R96

8.2K/R1608

R11

40/

R16

08

C22

220pF/C1608

R1018.2K/R1608

R118220K,1%/R1608

+CTB28

4.7uF,6.3V/T3216

TP22

R106 100K/R1608

CB33

100nF/C1608

R978.2K/R1608

+

CTB30

100uF,6.3V/T3528

R11

50/

R16

08

C5

100nF/C1608

R107 NC/R1608

C7

100nF/C1608

R100 680/R1608

R11

60/

R16

08

C15

220pF/C1608

U13

MIC5219BM5

1

2

3

5

4

IN

GND

EN

OUT

ADJ

R9847K/R1608

R108 NC/R1608

TP23

R1110/R1608

C181uF/C1608

TP24

R11

70/

R16

08

C14

1uF/C1608

CB34

4.7uF/C1608

R109 NC/R1608

R120

100K,1%/R1608

C12

1uF/C1608

C8

100nF/C1608

R10347K/R1608

TP25

C4

100nF/C1608

R11

30/

R16

08

C191uF/C1608

R11

2N

C/R

1608

CB28100nF/C1608

C23

1uF/C1608

WM9713LGEFL/RV

U12

WM9713LGEFL/RV1 2 3 4 5 6 7 8 9 10 11 12

24

23

22

21

20

19

18

17

16

15

14

13

36 35 34 33 32 31 30 29 28 27 26 25

37

38

39

40

41

42

43

44

45

46

47

48495051

DB

VD

D

MC

LKA

MC

LKB

DG

ND

1

SD

ATA

OU

T

BIT

CLK

DG

ND

2

SD

ATA

IN

DC

VDD

SY

NC

RE

SE

TB

WIP

ER

LINER

LINEL

MICOM

MIC1

MONOIN

PCBEEP

TPGND

Y-

X-

Y+

X+

TPVDD

SP

KR

SP

KL

SPKG

ND

OU

T4

CA

P2

MO

NO

MIC

2B

MIC

2A

MIC

BIA

S

VR

EF

AGN

D

AV

DD

OUT3

SPKVDD

HPL

HPGND

HPR

AGND2

HPVDD

GPIO1/PCMCLK

GPIO2/IRQ

GPIO3/PCMFS

GPIO4/PCMDAC

GPIO5/PCMADCGNDNCNC

CB27

1uF/C1608

+CTB34

10uF,6.3V/T2012

C10

1uF/C1608

C20

220pF/C1608

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SW mode

IIC slave addr =0x36

WM8580A

to test I2S0 5.1ch(extraly can testI2S1 2ch)

* Note:CT1 ~ 6should beplaced asclose as tothe codecchip

2-Wire Mode

<--LINE!!

WM8580_MasterCLKSelection

<Silk>

Audio(WM8580_IIS5.1CH) 0.2


A3




Date: Sheet of

XPCM_FSYNC/I2S_LRCLK[4,6]

WM8580_OUT_RR [5]

WM8753_OUT_FR [5]

WM8580_OUT_Center [5]

B_HSMMC_DAT6/i2sV40_LRCLK[2,8,15]

WM8580_OUT_RL [5]

WM8753_OUT_FL [5]

Xi2cSCL0[2,5,14,15]

B_HSMMC_DAT4/i2sV40_BCLK[2,8,13,15]

WM8580_LINEIN_L[5]

B_HSMMC_DAT7/i2sV40_DI[2,15]

WM8580_MIC[5]


WM8580_OUT_Sub [5]

B_SPI1_CSn/i2sV40_DO2[2,14,15]

WM8580_LINEIN_R[5]

Xi2cSDA0[2,5,14,15]


XPCM_DCLK/I2S_CLK[4,6]

I2SMCLK_WM8580

XPCM_SOUT/I2S_DO[4,6]XPCM_SIN/I2S_DI[4,6]

XPCM_EXTCLK/I2S_CDCLK [4,6]B_HSMMC_DAT5/i2sV40_CDCLK[2,8,13,15]

I2SMCLK_WM8580

B_PWR_5V

B_PWR_5V

AVDD_ext5V

AVDD_ext5V

VDD_ext

VDD_ext

R128 0/R1608

R131 10K/R1608

R143 0/R1608

CB40

100nF/C1608

+CTB37

10uF,6.3V/T2012

FB4

BLM18PG121SN1

R137 0/R1608

R145 NC/R1608

+

CT3

10uF,6.3V/T2012

R140 0/R1608

CB38

100nF/C1608

U14

WM8580A

162

171

34

14

242223192021

28262725

32333431

131211

5

9876

18

36

35

4045

3946

10

15

30

29

41

42

43

44

47

48

3738

DVDDPVDD

DGNDPGND

XTIXTO

SPDIFIN1

MCLKPAIFRX_LRCLKPAIFRX_BCLKDIN1DIN2DIN3

MFP2PAIFTX_LRCLKMFP1DOUT

SDINSCLKCSBSDO

MFP3MFP4MFP5MFP10

MFP6MFP7MFP8MFP9

MUTE

AINL

AINR

AVDDVREFP

AGNDVREFN

SPDIFOP

CLKOUT

SWMODE

HWMODE

VOUT1L

VOUT1R

VOUT2L

VOUT2R

VOUT3L

VOUT3R

ADCREFPVMID

R134 0/R1608

C25

15pF/C1608

C28

1uF/C1608

R130 0/R1608

R144 0/R1608

+CT7

10uF,6.3V/T2012

+

CT4

10uF,6.3V/T2012

R122 0/R1608

R132 0/R1608

FB3

BLM18PG121SN1

X112MHz (SMD, SX-8)

1

3

2

4

+CT810uF,6.3V/T2012

RP2

0/R1608

R133 0/R1608

+

CT5

10uF,6.3V/T2012

+ CTB3910uF,6.3V/T2012

R124 0/R1608

R135 0/R1608

+CTB4010uF,6.3V/T2012

R125 0/R1608

R123 0/R1608

R146 0/R1608

+

CT1

10uF,6.3V/T2012

C26470pF/C1608

+

CT6

10uF,6.3V/T2012

R139 0/R1608

C271uF/C1608

R126 0/R1608

R141 0/R1608

C29

100nF/C1608

R147 0/R1608

R129 10K/R1608

R138 0/R1608

R121 0/R1608

+

CT2

10uF,6.3V/T2012

R127 0/R1608

RP1

0/R1608

R142 0/R1608

CB39

100nF/C1608

+CTB36

10uF,6.3V/T2012

RP3

0/R1608

C30

100nF/C1608

+CTB3810uF,6.3V/T2012

R136 0/R1608

C24

15pF/C1608

CFG5CAS220A1

1 2 3

4 5 6

A1

C1

B1

A2

C2

B2

CB37

100nF/C1608

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CFGB7 : CF Mode

ON OFF

<Silk>

OFF

Indirect ModeDirect Mode

CF

[1]

ON[2]

<Silk>

CF 0.2


A3




Date: Sheet of

P_ADDR2

B_DATA4

B_DATA14

B_DATA10B_DATA9

B_DATA1

B_DATA5

B_DATA12

B_ADDR2

P_ADDR1

B_DATA0

B_ADDR0B_ADDR1

B_DATA11

B_DATA2

B_DATA13

B_DATA7B_DATA6

B_DATA3

B_DATA8

B_DATA15

P_ADDR0

B_ADDR6

P_ADDR2B_ADDR10

B_ADDR8

B_ADDR4B_ADDR3

P_ADDR0

B_ADDR5

B_ADDR9 P_ADDR1

B_ADDR7

P_DATA14

P_DATA3

P_DATA12

P_DATA3

P_DATA13

P_DATA10P_DATA9P_DATA8

P_DATA1

P_DATA13

P_DATA9

P_DATA7

P_DATA10

P_DATA12

P_DATA0

P_DATA0

P_DATA14

P_DATA2

P_DATA7

P_DATA8

P_DATA4

P_DATA15

P_DATA6

P_DATA6P_DATA5P_DATA11

P_DATA4

P_DATA2

P_DATA11

P_DATA1

P_DATA15

P_DATA5

Xhi_A8/CE_CF0 [2,10]

CD2_CF




B_DATA[15:0] [2,3,10..12]


nCS_CF1 [3]


CD1_CF

Xhi_A11/IOWR_CF [2,10,15]

B_DATA[15:0] [2,3,10..12]



B_WEata[2]





Xhi_A7/KP_COL7/Xm0CData [2,10,13,14]

B_RESET[2]




XhiCSnmain/CE_CF1 [2,10]

B_INTata[2]

Xhi_A9/CE_CF1 [2,10,14]

B_CData [2]





B_INPACKata[2]

B_OEata[2]


XhiCSn/CE_CF0 [2,10]


nCS_CF0 [3]

XhiWEn/CF_IOWR [2,10]

B_REGata[2]


B_ADDR[19:0] [2,3,10..12]




B_CData[2]

CD2_CF


Xhi_A5/KP_COL5/Xm0INPACKata[2,10,13,14]Xhi_A6/KP_COL6/Xm0REGata[2,10,13,14]

B_WEata[2]

B_ADDR[19:0] [2,3,10..12]

B_INTata[2]

B_ADDR[19:0][2,3,10..12]

B_OEata[2]

CD1_CF

B_INPACKata[2]

B_RESET[2]

B_REGata[2]


P_DATA[15:0]

P_ADDR[2:0]

P_DATA[15:0]

CE_CF0CE_CF1nIORD_CF

IORDY_CFnIOWR_CF

nIORD_CF

IORDY_CF

CE_CF1

nIOWR_CF

CE_CF0

P_DATA[15:0]

P_ADDR[2:0]



XuRXD_2/ExdREQ/IrRXD/ADDR_CF0 [2,9,10,14]

B_HSMMC_DAT5/i2sV40_CDCLK [2,7,13,15]B_HSMMC_DAT6/i2sV40_LRCLK [2,7,15]




XuTXD_2/ExdACK/IrTXD/ADDR_CF1 [2,9,10,14]

VDD3.3V

VDD_CFVDD3.3V

VDD_CF

VDD_CF

VDD_CF

VDD_CF

VDD_CF

VDD_CF

VDD_CF

R149 0/R1608

R16

710

0K/R

1608

TP35

R155 10K/R1608

R182 0/R1608

R17

8N

C/R

1608

CFGB7

KHS02

12

43

R187 NC/R1608

TP27TP31

R161 10K/R1608

R190

330/R1608

R170 0/R1608R171 0/R1608

Q1SI2333DS

3

1

2

TP36

R185 NC/R1608

R156 0/R1608

R184 0/R1608

R188 NC/R1608

R19210K/R1608

+

CTB41

10uF,6.3V/T2012

R162 10K/R1608

R172 0/R1608

U17

SN74LVC1G32DBV

41

2

53

CB45

100nF/C1608

U16

SN74CB3T16212-DGV

56

542

3 53

524

5 51

506

8

17

4412

11 45

4610

9 47

487

1

43413936343230

42403735333129

13151821232527

14162022242628

55193849

S1

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND1

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

S0

6B17B18B19B1

10B111B112B1

6B27B28B29B2

10B211B212B2

6A17A18A19A110A111A112A1

6A27A28A29A210A211A212A2

S2GND2GND3GND4

R163 0/R1608

R151 NC/R1608

TP37

R183 NC/R1608

TP38

R157 NC/R1608

R186 0/R1608

R189 NC/R1608

CB41 100nF/C1608

CB43

100nF/C1608

R173 0/R1608

R159 NC/R1608

R152 0/R1608

TP32

R160 0/R1608

+CTB42

10uF,6.3V/T2012

R194

NC/R1608

R193NC/R1608

R153 0/R1608

R174 0/R1608

R15810K/R1608

U15

SN74CB3T16212-DGV

56

542

3 53

524

5 51

506

8

17

4412

11 45

4610

9 47

487

1

43413936343230

42403735333129

13151821232527

14162022242628

55193849

S1

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND1

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

S0

6B17B18B19B1

10B111B112B1

6B27B28B29B2

10B211B212B2

6A17A18A19A110A111A112A1

6A27A28A29A210A211A212A2

S2GND2GND3GND4

R1950/R1608

R175 0/R1608

TP28

R181 NC/R1608

CB42

100nF/C1608

R17

6N

C/R

1608

R16

610

0K/R

1608

R164 0/R1608

R180 NC/R1608

TP29

TP33

CON4

CompactFlash (55358-5021)

212223234564748492728293031501214151617181920

732343542

137383940412443444546

91333362625

81011

D0D1D2D3D4D5D6D7D8D9

D10D11D12D13D14D15

GND2A7A6A5A4A3A2A1A0

nCE1nCE2nIORDnIOWRnWAITGND1IREQVCC2nCSELnVS2/OPENRESETWPnINPACKnREGnSPKRnSTSCHGnOEVCC1nVS1/GNDnWECD1CD2A10A9A8

R154 10K/R1608

R168 0/R1608

R148 0/R1608

R165 NC/R1608

R179 NC/R1608

LED1LTST-C150BKT (SMD3216 Blue)

12

TP34

R17

7N

C/R

1608

TP30

R191

10K/R1608

R169 0/R1608

CB44 100nF/C1608

R150

10K/R1608

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

UART0 Only

ON

X

PIN1

IrDA(U3)

OFF

UART2

UART1 X

OFF

IrDA(U2)

UART3

COM1 port

OFF

<Silk>

PIN3

X

X

OFF

ON

UART1/2/3

S - L : B1 port, H : B2 portOE - L : Output enable H : all disconnect

ON

ON

OFF

OFF

CFG3 : COM2 port

<Silk>

X

OFF

X

<Silk>

PIN4

X

COM2 port

PIN2

OFF

SIR mode only

ON

UART/IrDA 0.2


A3




Date: Sheet of


XEINT6/KP_ROW6[2,13,15,16]XEINT7/KP_ROW7[2,13,15,16]


XuRXD_1 [2,15]

XuTXD_0[2,10,14]XuRXD_0[2,10,14]

XuTXD_3/ExdACK/IrTXD/Xi2cSDA1 [2,5,10]

XuTXD_3/ExdACK/IrTXD/Xi2cSDA1[2,5,10]XuRXD_2/ExdREQ/IrRXD/ADDR_CF0[2,8,10,14]

CON2_TXD


XuTXD_1 [2,15]

CON2_CTS

CON2_RXD

XuTXD_1 [2,15]

XuTXD_0[2,10,14]

XuTXD_2/ExdACK/IrTXD/ADDR_CF1[2,8,10,14]

DTR0

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0[2,8,10,14]

XuRTSn_1/ADDR_CF1 [2,15]


XuCTSn_1/ADDR_CF0 [2,15]

CON2_RXDCON2_RTS

DTR0

XuRXD_1 [2,15]

CON2_TXD

CON2_RTSCON2_CTS

XuRXD_0[2,10,14]

DSR0

XuRXD_3/ExdREQ/IrRXD/ADDR_CF2/Xi2cSCL1[2,5,8,10]

DSR0

XirSDBW[2]

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

R214 0/R1608

R210 0/R1608

C31

330pF/C1608

R213

100K/R1608

U21

SN74CBTLV3257PWR

251114

361013

15 81

479

12

16 1B12B13B14B1

1B22B23B24B2

nOE GNDS

1A2A3A4A

VCC

R202

2.7/R1608

R211 0/R1608

R20

910

0K/R

1608

CB46

100nF/C1608

R20

810

0K/R

1608

R20

710

0K/R

1608

C38

330pF/C1608

C37

330pF/C1608

C36

330pF/C1608

R203 0/R1608

CB48100nF/C1608

CB49100nF/C1608

R20

610

0K/R

1608

+ CT10

0.1uF,16V/T2012

U22

HSDL-3602

1

2

3

45

6

7

8

9

10

VC

C

AGN

D

FIR_SEL

MD0MD1

NC

GN

D

RXD

TXD

LED

A

R19610K/R1608

+CTB43

6.8uF,6.3V/T3216

+ CT14

0.1uF,16V/T2012

C34

330pF/C1608

R198 NC/R1608

CB47

100nF/C1608

+ CT13

0.1uF,16V/T2012

R200100K/R1608

C33

330pF/C1608

U20

SN74CBTLV3257PWR

251114

361013

15 81

479

12

16 1B12B13B14B1

1B22B23B24B2

nOE GNDS

1A2A3A4A

VCC

U19

MAX3232CSE

1

3

4

5

141378

16

2

6

15

111210

9

C1+

C1-

C2+

C2-

T1OUTR1IN

T2OUTR2IN

VCC

V+

V-

GND

T1INR1OUTT2INR2OUT

CB50

100nF/C1608

R19710K/R1608

C32

330pF/C1608

+

CT90.1uF,16V/T2012

JACK7

BOXCONN_DB9

594837261

R201

100K/R1608

R199 NC/R1608

+

CT160.1uF,16V/T2012

(HDR12-2.54-MALE)

CON5

A1-12PA-2.54DSA

345

8

1011

12

9

7

6 12

R204 0/R1608

C35

330pF/C1608

CFG3

KHS04

1234

8765

R205 0/R1608

CB51100nF/C1608

R451 0/R1608

+ CT12

0.1uF,16V/T2012

U18

MAX3243CAI

28

241

2

27

3

1413

22 21

1918171615

25

54

23

20

26

678

9101112

C1+

C1-C2+

C2-

V+

V-

T1INT2IN

nFORCEOFF nINVALID

R1OUTR2OUTR3OUTR4OUTR5OUT

GND

R2INR1IN

FORCEON

R2OUTB

VCC

R3INR4INR5IN

T1OUTT2OUTT3OUTT3IN

R212 0/R1608

JACK6

BOXCONN_DB9

594837261

U23

SN74CBTLV3257PWR

251114

361013

15 81

479

12

16 1B12B13B14B1

1B22B23B24B2

nOE GNDS

1A2A3A4A

VCC

+ CT15

0.1uF,16V/T2012

+CT11

0.1uF,16V/T2012

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1

2

HostI/F

1ROMBUS

QS

E-0

40-0

1-L-

D-E

M2

QTE-040-01-L-D-EM2

JF1

JF21

SMDK6410Base B/D

ROM Bus

Host/MODEM I/F

JF1

Ext. Bus/ Modem I/F 0.2


A3




Date: Sheet of

B_ADDR5

B_DATA1

B_ADDR18

B_ADDR10

B_DATA7

B_DATA14

B_ADDR16

B_ADDR13

B_ADDR6

B_ADDR15

B_ADDR2

B_DATA6

B_DATA12 B_DATA13

B_ADDR0

B_ADDR4

B_DATA5

B_ADDR14

B_DATA0

B_ADDR1

B_ADDR11

B_DATA2

B_DATA10

B_ADDR9

B_DATA15

B_ADDR17

B_DATA8 B_DATA9

B_ADDR12

B_DATA4

B_ADDR19

B_DATA3

B_DATA11

B_ADDR7

B_ADDR3

B_ADDR8


AP_nReset[2]


Modem_nReset [2]

XuTXD_0 [2,9,14]Xhi_D17/DATA_CF9 [2]


B_nBE0[2,3]




nCS_EXT[3]



B_DATA[15:0][2,3,8,11,12]

XnRSTOUT [2,11..16]

Xhi_D16/DATA_CF8[2]Xhi_D14/DATA_CF14/KP_ROW6[2,8,13]

XEINT4/KP_ROW4[2,13,15,16]






Xhi_A8/CE_CF0 [2,8]




XhiINTR[2,16]


Xhi_A4/KP_COL4/Xm0RSTata [2,8,13]

B_ADDR[19:0][2,3,8,11,12]



XEINT8/ADDR_CF0 [2,8,14]




Xhi_A6/KP_COL6/Xm0REGata [2,8,13,14]

XhiCSn/CE_CF0[2,8]

B_DATA[15:0] [2,3,8,11,12]

B_OEn/nIORD_CF [2,3,8,11,12]



XhiWEn/CF_IOWR[2,8]





Xhi_A9/CE_CF1[2,8,14]

XuRXD_0 [2,9,14]





B_ADDR[19:0] [2,3,8,11,12]




B_nBE1[2,3,11]





VDD_EXHI

VDD_EXHI

VDD_EXHIVDD3.3V

VDD_EXHI

VDD_EXHI

R230 0/R1608

CB52

100nF/C1608RP5

0/R1608

CB53

100nF/C1608

JF2

QSE-040-01-L-D-EM2

13579

1113151719212325272931333537394143454749515355575961636567697173757779

2468101214161820222426283032343638404244464850525456586062646668707274767880

TP40

+CTB44

10uF,6.3V/T2012

RP

60/

R16

08

JP2

A2-2PA-2.54DSA

12

TP41

R231

NC/R1608

JF1

QTE-040-01-L-D-EM2

13579

1113151719212325272931333537394143454749515355575961636567697173757779

2468101214161820222426283032343638404244464850525456586062646668707274767880

TP42

R226 0/R1608

RP

70/

R16

08

R21

910

K/R

1608

RP4

0/R1608

R21

810

K/R

1608

R232NC/R1608

R22

210

K/R

1608

R22

010

K/R

1608

R215

10K/R1608

R22

310

K/R

1608

R22

110

K/R

1608

+

CTB45

10uF,6.3V/T2012

TP39

R21610K/R1608

R228

NC/R1608

R22

410

K/R

1608

R229 0/R1608

R225 0/R1608

R227100K/R1608

R217

10K/R1608J3

A2-3PA-2.54DSA

123

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

(XFMRS / XF10B11A-COMBO1-4S)

(nPWDN_ETH)

LINK

(nHC1)

LAN

<Silk>LINK

LAN<Silk>

Ethernet 10Mbps(CS8900) 0.2


A3




Date: Sheet of

B_ADDR13

B_ADDR2

B_D

ATA

6

B_ADDR6

B_ADDR1

B_ADDR14

B_ADDR16

B_D

ATA

12

B_ADDR12

B_ADDR15

B_ADDR3

B_ADDR18

B_D

ATA

7

B_ADDR19

B_ADDR5

B_ADDR10

B_DATA9

B_D

ATA

0B_ADDR0

B_ADDR8

B_D

ATA

2

B_ADDR11

B_D

ATA

3

B_ADDR9

B_ADDR7

B_D

ATA

5

B_ADDR4

B_D

ATA

11

B_D

ATA

4

B_DATA8

B_ADDR17

B_D

ATA

10

B_D

ATA

1

B_D

ATA

13B

_DA

TA14

B_D

ATA

15

B_ADDR[19:0] [2,3,8,10,12]

B_nBE1 [2,3,10]

B_OEn/nIORD_CF[2,3,8,10,12]

nCS_CS8900[12]

B_ADDR12[2,3,10]

nCS_CS8900[12]B_WAITn/IORDY[2,8,10]


nCS_CS8900[12]

B_ADDR12[2,3,10]

B_DATA[15:0][2,3,8,10,12]


XnRSTOUT[2,10,12..16]

XEINT10/ADDR_CF2 [2,12,14,17]

B_DATA[15:0] [2,3,8,10,12]


VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

R244 0/R1608

U28

SN74LVC1G332DBV

25

4136

R2374.99K, 1%/R1608

R247 NC/R1608

C39

580pF/C1608

LED2

LTST-C150GKT (SMD3216 Green)

1 2

U26

SN74LVC1G04DBV

2 4

53

R234NC/R1608

R246 0/R1608

C41

0.1uF 2KV (NC)

R242

330/R1608

J4

NC (A2-2PA-2.54DSA)

1 2

R236 0/R1608

C43

100nF/C1608

TP43

R238 0/R1608

C42

NC (100nF)/C1608

CB55100nF/C1608

CB56

100nF/C1608

R239 8 ohm, 1%/R1608 TP44

R243 0/R1608

R241

330/R1608

CB54

100nF/C1608

LED3

LTST-C150GKT (SMD3216 Green)

1 2

+CTB4610uF,6.3V/T2012

R245 0/R1608

R2330/R1608

U29

SN74LVC1G04DBV

2 4

53

R240

100 ohm,1%/R1608

U24

SN74LVC1G32DBV

41

2

53

U30

SN74LVC1G332DBV

25

4136

CON6

Single_Ports_Combo

12345678

910

CT_T2TD-

CT_T1TD+RD+

CT_R1RD-

CT_R2ShieldShield

X220MHz (SMD, SX-8)

1

3 2

4

CB57

100nF/C1608

U27

CS8900A-CQ3

767778798081828384858687888990919293949596979899

100

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

50494847464544434241403938373635343332313029282726

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

nTESTnSLEEPnBSTAT/nHC1DI+DI-CI+CI-DO+DO-AVDD2AVSS2TXD+TXD-AVSS1AVDD1RXD+RXD-RESAVSS3AVDD3AVSS4XTAL1XTAL2nLINKED/nHC0nLANLED

AV

SS

0nE

LCS

EE

CS

EE

SK

EE

DA

TAO

UT

EE

DA

TAIN

nCH

IPS

EL

DV

SS

1D

VDD

1D

VS

S1A

DM

ARQ

2nD

MA

CK

2D

MAR

Q1

nDM

AC

K1

DM

ARQ

0nD

MA

CK

0nC

SO

UT

SD

15S

D14

SD

13S

D12

DVD

D2

DV

SS

2S

D11

SD

10

SA12nREFRESH

SA11SA10

SA9SA8SA7SA6SA5SA4SA3SA2SA1SA0

nSBHEINTRQ3

nMEMCS16nIOCS16INTRQ0INTRQ1INTRQ2nMEMR

nMEMWSD8SD9

RE

SE

TS

D7

SD

6S

D5

SD

4D

VS

S4

DVD

D4

SD

3S

D2

SD

1S

D0

IOC

HR

DY

AE

NnI

OW

nIO

RS

A19

SA

18S

A17

DV

SS

3AD

VDD

3D

VS

S3

SA

16S

A15

SA

14S

A13

U25

SN74LVC1G32DBV

41

2

53

R235 8 ohm, 1%/R1608

C40

0.1uF 2KV(NC)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1.8V

NOTE:FIFO_SEL can be driven dynamically and is not pulledinternally to either state. This pin has the same timing asthe Address Bus and can be driven by upper address bits notused by the LAN9115.

NOTE:0 : 10Mbps, Half-Duplex, Auto Neg, Disabled.1 : 100Mbps, Half-Duplex, Auto Neg, Enabled.

100Mbps<Silk>

LINK<Silk>

FDPLX<Silk>

Vout = 0.8 * (R2/R1+1)

R2

R1<Silk>

LAN9115

CS8900<Silk> Ethernet 100Mbp(LAN91C115) 0.2


A3




Date: Sheet of

EEP_CLKEEP_CS

EEP_DIO

B_DATA13

B_DATA7EEP_CS

B_DATA9

B_DATA5

B_DATA0

B_DATA14

B_DATA2

EEP_CLK

B_DATA11

B_DATA8

B_DATA12

B_DATA6

B_DATA10

B_DATA1

EEP_DIO

B_DATA3

B_DATA15

B_DATA4

B_ADDR3

B_ADDR6B_ADDR5

B_ADDR0

B_ADDR2B_ADDR1

B_ADDR4

B_ADDR7


XnRSTOUT[2,10,11,13..16]

nCS_LAN91C115

B_DATA[15:0][2,3,8,10,11]

B_ADDR[19:0]2,3,8,10,11]

B_ADDR7[2,3,8,10,11]

XEINT10/ADDR_CF2[2,11,14,17]

nCS_ETH[3]

PME

PMEXEINT10/ADDR_CF2 [2,11,14,17]

FIFO_SEL

nSPD_100nLINK_ACKnFDPLX

SPD_SEL


FIFO_SELSPD_SEL

nSPD_100nLINK_ACKnFDPLX

nCS_CS8900[11]

nCS_LAN91C115

VDD3.3V VDD_Ethernet

VDD3.3V

VDD3.3V

VDD_Ethernet

VDD3.3V

VDD3.3V

VDD3.3V

VDD_A VDD_A

VDD3.3V

VDD3.3VVDD_Ethernet

VDD_A

VDD3.3V

C46

10nF/C1608

R2730/R1608

U33

93LC46 (EEPROM)

1234

65

87CS

CLKDIDO

ORGGND

VCCNC

R254 0/R1608

R2710/R1608 C49

NC (1000pF,2KV)

R279

330/R1608

+

CTB51

4.7uF,6.3V/T3216

R25

049

.9 o

hm/R

1608

L1 4.7uH (LQH32CN4R7M33)

R26

149

.9 o

hm/R

1608

CFG6CAS220A1

1

2

3

4

5

6

A1

C1

B1

A2

C2

B2

R285 NC (1K,1%)/R1608

R257 0/R1608

LED6

LED-Green (SMD 3216)

12

CB61

100nF/C1608

U34

LTC3405ES6

1

6

5

34

2

RUN

MODE

Vfb

SWVIN

GN

D

C45

6.8nF/C1608

R280

330/R1608

R288

120K/R1608

JACK8

RJHS-5380

12345678

1615

1211

1413

109

R256 0/R1608

CB62

100nF/C1608

R286150K/R1608

R26

049

.9 o

hm/R

1608

R287 1K,1%/R1608

R26

249

.9 o

hm/R

1608

R281

1K,1%/R1608

R25

149

.9 o

hm/R

1608

R276

12K,1%/R1608

CB63100nF/C1608

R282 1K,1%/R1608

R26

775

ohm

,1%

/R16

08

C52

22pF/C1608

CB59

100nF/C1608

R26

675

ohm

,1%

/R16

08

R283 0/R1608

R275 0/R1608

R25

210

ohm

/R16

08

R26

549

.9 o

hm/R

1608

R278

330/R1608

U31

LAN9115

18171615141312

64636259585756535251504946454443

11 4 66 1 19 27 34 41 47 54 60 96 77 80 86 88

84

79788382

87

696768

9899100

71

7476

73

6

5

9

10

91

2 7 8 65 3 20 28 898581976155484235

4039383736333231302926252423227521

95929394

7270

90

A1A2A3A4A5A6A7

D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15

VS

S_R

EF

VS

S_P

LL

GN

D_C

OR

EG

ND

_CO

RE

GN

D_I

OG

ND

_IO

GN

D_I

OG

ND

_IO

GN

D_I

OG

ND

_IO

GN

D_I

OG

ND

_IO

VS

SA

VS

SA

VS

SA

VS

SA

NC

TPO+TPO-TPI+TPI-

EXRES1

EECLK_GPO4EEDIO_GPO3

EECS

nGPIO0_LED1nGPIO1_LED2nGPIO2_LED3

NC

SPD_SELFIFO_SEL

NC

XTAL1

XTAL2

ATEST

RBIAS

NC

VR

EG

VD

D_P

LL

VD

D_R

EF

VDD

_CO

RE

VDD

_CO

RE

VD

D_I

OV

DD

_IO

VDD

_AVD

D_A

VDD

_A

VD

D_I

OV

DD

_IO

VD

D_I

OV

DD

_IO

VD

D_I

OV

DD

_IO

TX_CLKTXD0TXD1TXD2TXD3COLCRSMDCMDIORX_DVRX_CLKRX_ERRXD3RXD2RXD1RXD0TX_EN

nRESETnRDnWRnCS

IRQPME

NC

R270 0/R1608

R26849.9 ohm/R1608

R258 0/R1608

R26

349

.9 o

hm/R

1608

U32

S558-5999-46

161415

75

1210

4 8

132

9 13

6

11

TD+TCTTD-

RX+RCMT

TCMTTX+

NC

NC

RD+RCTRD-

NC

NC

RX-

TX-

R269

49.9 ohm/R1608

CB60

100nF/C1608

R259 12.4K,1%/R1608

R272 1.5K,1%/R1608

CB64

4.7uF/C1608

+CTB49

10uF,6.3V/T2012

R284 1K,1%/R1608

R277 0/R1608

R4540/R1608

CB58

100nF/C1608

R290

100K/R1608

+

CTB48

10uF,6.3V/T2012

R249 0/R1608

LED5

LED-Yellow (SMD 3216)

12

X325MHz (SMD,SX-8)1

3

2

4

R248 0R1608

R2741M/R1608

+

CTB47

10uF,6.3V/T2012

C51

33pF,5%/C1608

R253 0/R1608

C50

33pF,5%/C1608

C44 6.8nF/C1608

LED4

LED-Green (SMD 3216)

12

C47

22nF/C1608

R26

449

.9 o

hm/R

1608

R456

0/R1608

TP45

+

CTB50

33uF,6.3V/T3528

C48

NC (1000pF,2KV)

R255 0/R1608

R455 0/R1608

R289

100K/R1608

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OFF : Host I/FON : MMC

<Silk>

OFF : Key Enable(High 4x4)ON : Key Disable(High 4x4)

OFF : Key Enable(Low 4x4)ON : Key Disable(Low 4x4)

OFF : Host I/FON : XEINT

4(Key_En2)

1(Column)

Func

2(Row)

3(Key_En1)

CFG4 :Keypad

* Note: HIF3H-24DA-2.54DS PCB footprint (Decal)

1

2

3

468

5717192123

24 22 20 18

Top View

Keypad 0.2


A3




Date: Sheet of

kp_ROW3

kp_COL5

kp_COL3

nKeyPad_En2

nXhi/XEINT kp_COL0

kp_ROW0

kp_COL7

kp_COL2

kp_COL3

kp_COL7

nKeyPad_En1

kp_ROW4

nKeyPad_En1

nKeyPad_En1

kp_ROW6

kp_ROW3

kp_ROW1

nKeyPad_En2

kp_ROW5

nXhi/MMC

nKeyPad_En2

kp_ROW2

kp_COL6

kp_ROW1

kp_COL5

kp_ROW7

kp_COL1

kp_ROW2

nXhi/MMC

kp_COL6

kp_COL1

kp_COL4

kp_COL6

kp_ROW6

kp_COL3

kp_COL4

kp_COL2

kp_ROW0

kp_COL4

kp_COL0

kp_COL7

nXhi/MMC

nXhi/XEINT

kp_ROW7

kp_ROW4

kp_COL5

nXhi/XEINT

kp_ROW0kp_ROW1

kp_ROW5

kp_ROW0kp_ROW1kp_ROW2kp_ROW3kp_ROW4kp_ROW5kp_ROW6kp_ROW7

kp_COL0kp_COL1kp_COL2kp_COL3kp_COL4kp_COL5kp_COL6kp_COL7


B_XmmcDATA1_3[2]



B_XmmcCLK1/ADDR_CF0[2]



B_XmmcDATA1_1[2]




Xhi_A3/KP_COL3/Xm0INTata[2,8,10]Xhi_D10/DATA_CF10/KP_ROW2[2,8,10]

B_XmmcDATA1_2[2]



XEINT1/KP_ROW1[2]B_XmmcCMD1/ADDR_CF1[2]




B_HSMMC_DAT4/i2sV40_BCLK[2,7,8,15]


XEINT4/KP_ROW4[2,10,15,16]


Xhi_A1/ADDR_CF1/KP_COL1[2,8,10] Xhi_D9/DATA_CF9/KP_ROW1[2,8,10]

B_XmmcDATA1_0/ADDR_CF2[2]


XnRSTOUT[2,10..12,14..16]

B_HSMMC_DAT5/i2sV40_CDCLK[2,7,8,15]

XEINT0/KP_ROW0[2]


VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

JOG1

SKRHAAE010

1 4

3 6

2 5

A B

C D

Center Common

U37

SN74CBTLV3257PWR

25

1114

36

1013

1581

47912

161B12B13B14B1

1B22B23B24B2

nOEGNDS

1A2A3A4A

VCC

C54

1nF/C1608

D6 MM

BD

101L

T1

13

2

U38

SN74CBTLV3257PWR

25

1114

36

1013

1581

47912

161B12B13B14B1

1B22B23B24B2

nOEGNDS

1A2A3A4A

VCC

R297 1K/R1608

R298 1K/R1608

R302

20K/R1608

R296

100K/R1608

R303

20K/R1608

D8 MM

BD

101L

T1

13

2

D9 MM

BD

101L

T1

13

2 D3 MM

BD

101L

T1

13

2

TP46

SW2SKQYPCE010

R293

100K/R1608

R299 1K/R1608

TP48

CB66

100nF/C1608

C53

1nF/C1608

+

CTB52

10uF,6.3V/T2012

D10 M

MB

D10

1LT1

13

2

CB67

100nF/C1608

SW3SKQYPCE010

U35

SN74CBTLV3257PWR

25

1114

36

1013

1581

47912

161B12B13B14B1

1B22B23B24B2

nOEGNDS

1A2A3A4A

VCC

R300 1K/R1608

R295

100K/R1608

TP47

CFG4

KHS04

1234

8765

D4 MM

BD

101L

T1

13

2

D1 MM

BD

101L

T1

13

2

SW4SKQYPCE010

U36

SN74CBTLV3257PWR

25

1114

36

1013

1581

47912

161B12B13B14B1

1B22B23B24B2

nOEGNDS

1A2A3A4A

VCC

CON8

HIF3H-24DA-2.54DS (Female,Right Angle)

1 23 45 67 89 10

11 1213 1415 1617 1819 202123

2224

R301 1K/R1608

CB65

100nF/C1608

CB69

100nF/C1608

CB68

100nF/C1608

SW5SKQYPCE010

CON7

GF056-30S-LSS-P2000

123456789

101112131415161718192021222324252627282930

D7 MM

BD

101L

T1

13

2 D5 MM

BD

101L

T1

13

2

R294

100K/R1608

D2 MM

BD

101L

T1

13

2

SW1SKQYPCE010

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Mobile TV (SPI1, IIC)

MODEM_RST

GPS (UART0, SPI0)

MODEM_RTC_PWR(2.8V)

MODEM_RIMODEM_WAKEUP

MODEM_PWR_ON

MODULE 1

MODULE 2HD Radio (SPI1, IIS for Module 4)

Add&Changed on04/30/2008

Module Connector1&2 0.2


A3




Date: Sheet of


B_SPI1_MOSI [2,15]



B_SPI1_CLK/MMC2_CLK/i2sV40_DO1 [2,7,15]Xhi_D5/DATA_CF5[2,8,10]

Xi2cSDA0 [2,5,7,15]

B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 [2,7,15]Xhi_D7/DATA_CF7[2,8,10]


XnRSTOUT[2,10..13,15,16]

B_SPI1_CSn/i2sV40_DO2 [2,7,15]



Xhi_A9/CE_CF1[2,8,10]


M2_Port0_I2SLRCLK/AC_SYNC[4]M2_Port0_I2SCDCLK/AC_RSTn[4]


Xi2cSCL0 [2,5,7,15]


XEINT13 [2,16,17]

B_SPI0_CSn [2,16]



XuRXD_0[2,9,10]

XEINT10/ADDR_CF2[2,11,12,17]

XuTXD_0[2,9,10]

XEINT9/ADDR_CF1[2,17]


XnRSTOUT[2,10..13,15,16]

B_SPI0_CLK/ADDR_CF1 [2,16]

XEINT15[2,16,17]

B_SPI0_MOSI/ADDR_CF2 [2,3,15,16]

XuRXD_2/ExdREQ/IrRXD/ADDR_CF0[2,8..10]XuTXD_2/ExdACK/IrTXD/ADDR_CF1[2,8..10]

B_PWR_5V

VDD3.3VPVCCM2MTV

VDD3.3V

B_PWR_5V

PVCCAUX1

PVDD_SS

TP57

TP51

R331 0/R1608

CB75

100nF/C1608

R306 0/R1608

CB76

100nF/C1608

R459 0/R1608

R319 0/R1608

TP63

R323 0/R1608

R311 0/R1608

R329 0/R1608

+

CTB58

10uF,6.3V/T2012

R314 0/R1608

R308 NC/R1608

TP58

M1

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

TP71

CB70

100nF/C1608

TP62

CB72

100nF/C1608

R337 0/R1608

TP54

TP67

+ CTB56

10uF,16V/T3216

R304

0/R1608

TP53

R338 0/R1608

+ CTB59

10uF,16V/T3216

TP59

+

CTB55

10uF,6.3V/T2012

R333 0/R1608

TP55

+

CTB53

10uF,6.3V/T2012

R325 0/R1608

R305

0/R1608

R310 0/R1608

R320

0/R1608

TP70

R315 0/R1608

M2

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

R334 NC/R1608

R326 0/R1608

TP74

TP66

R321

0/R1608

TP49

TP64

R312 0/R1608

TP61

R336 NC/R1608

TP65

R327 0/R1608

TP52

TP73

R307 NC/R1608

R330 0/R1608

MTH4GND

R313 0/R1608

CB74

100nF/C1608

TP69

R335 NC/R1608

+

CTB54

10uF,6.3V/T2012

R328 0/R1608

TP50

R332 NC/R1608

TP60 R318 0/R1608

R324 0/R1608

+

CTB57

10uF,6.3V/T2012

R309 0/R1608

R317 0/R1608R316 0/R1608

R458 0/R1608

TP72

TP56

MTH2GND

CB71

100nF/C1608

TP75

MTH1GND

TP68

R322 0/R1608

MTH3GND

CB73

100nF/C1608

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BT_PCM_SDI

WP_SD0

BT_PCM_CLK

BT (UART1, PCM for PMIC Audio Codec)

NCD_SD0

BT_PCM_SDOBT_PCM_FSYNC

SD_PWR_EN

Audio (AC97, IIS, IIC)

MODULE 3

MODULE 4

Module Connector3&4 0.2


A3




Date: Sheet of

XhiOEn/CF_IORDY[2,8,10]


M3_Port1_PCM_SOUT[4]

XuTXD_1[2,9]





M3_Port1_PCM_SIN [4]M3_Port1_FSYNC[4]

XuRXD_1[2,9]






XnRSTOUT[2,10..14,16]

B_SPI1_MOSI[2,14]


XnRSTOUT[2,10..14,16]




M4_Port0_I2SSDI/AC_SDI[4]B_HSMMC_DAT4/i2sV40_BCLK [2,7,8,13]


XEINT4/KP_ROW4[2,10,13,16]






Xi2cSDA0[2,5,7,14]

M4_Port1_I2SSCLK/AC_BITCLK[4] B_SPI0_MOSI/ADDR_CF2 [2,3,14,16]


B_SPI1_MISO/MMC2_CMD/i2sV40_DO0 [2,7,14]M4_Port0_I2SSCLK/AC_BITCLK[4]

Xi2cSCL0[2,5,7,14]

M4_Port1_I2SLRCLK/AC_SYNC[4]M4_Port1_I2SLRCLK/AC_SYNC[4]


M4_Port0_I2SCDCLK/AC_RSTn[4] M4_Port1_I2SCDCLK/AC_RSTn[4] B_HSMMC_DAT5/i2sV40_CDCLK [2,7,8,13]

B_SPI1_CSn/i2sV40_DO2 [2,7,14]B_SPI1_CLK/MMC2_CLK/i2sV40_DO1 [2,7,14]



VDD3.3V

B_PWR_5V

VDD3.3V

B_PWR_5V

PVCCM3BT

PVDD_AUDIO

TP81

R376 0/R1608

R349 0/R1608

R380 NC/R1608

R364 NC/R1608

R367 0/R1608

TP90

TP77

R355

0/R1608

TP84

R345 0/R1608

R377 0/R1608

TP83

R344 0/R1608

+

CTB63

10uF,6.3V/T2012 M4

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

R382 0/R1608

TP87R379 0/R1608

R374 NC/R1608

R339

0/R1608

R359 0/R1608

R353 0/R1608

CB81

100nF/C1608

R381 0/R1608

TP89

R341 0/R1608

R346 0/R1608

TP80

TP88

CB80

100nF/C1608

R351 0/R1608

R3540/R1608

TP79

R361 0/R1608R362 0/R1608

R378 0/R1608

R352 0/R1608

R340

0/R1608

CB78

100nF/C1608

R347 0/R1608

R350 0/R1608

R343 0/R1608

TP85

M3

QSH-030-01-F-D-A

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

R363 0/R1608

R356 0/R1608

TP78

+ CTB65

10uF,16V/T3216

+

CTB64

10uF,6.3V/T2012

CB77

100nF/C1608

R370 0/R1608

R368 0/R1608

R342 0/R1608

+ CTB62

10uF,16V/T3216

R358 0/R1608

CB82

100nF/C1608

R373 0/R1608

R383 0/R1608

+

CTB61

10uF,6.3V/T2012

R369 0/R1608

R348 0/R1608

R372 0/R1608

CB79

100nF/C1608

+

CTB60

10uF,6.3V/T2012

R357 NC/R1608

TP82

R375 NC/R1608

R371 NC/R1608

R360 NC/R1608

TP86

TP76

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MODULE 5TFT LCD

LCD_RESETLCD_PANNEL_ON

LCD_SPICLKLCD_SPIMOSILCD_SPIMISOLCD_NSS

2-3

1-2

4

2-3

1-2OneNand

3

SD/MMC CH1

1-2

1-2

J7

1-2

512

Nand 1-22-3

2-3

4096

2-3

Address

5

IROM Booting

5

1-2

2-32-3

2-3

1-2

2048

PageSD/MMC CH0

1-21-2

2-3

2-3

J8

1-22-3

J6

2-3

1-24

IROM Booting Mode

Module Connector5 (LCD)/TV Out 0.2


A3




Date: Sheet of

XVD19

XVD4

XVD12

XVD7

XVD1

XVD13

XVD23

XVD15

XVD6

XVD0

XVD9

XVD2

XVD22

XVD11

XVD21

XVD16

XVD3

XVD18

XVD8

XVD20

XVD14

XVD10

XVD5

XVD17

PWM_TOUT0[2,5]

WLED_OUT1[2]

XVDEN[2]

XHSYNC[2]

PWM_TOUT1[2,5]

XVD[23:0][2]

XVCLK[2]

XVSYNC[2]

XPWM_ECLK[2,5]

Xadc_AIN5_YP[2]Xadc_AIN4_YM[2]

Xadc_AIN7_XP[2]Xadc_AIN6_XM[2]



B_SPI0_MISO/ADDR_CF0[2,14,15]


B_SPI0_MOSI/ADDR_CF2[2,3,14,15]


XEINT4/KP_ROW4[2,10,13,15]

XnRSTOUT[2,10..15]

XEINT14[2,17]

XEINT15[2,14,17]

XdacOUT_0[2]

XdacOUT_1[2]

XEINT13[2,14,17]

WHITE_LED[2]

XhiINTR[2,10]B_SPI0_CSn[2,14]

B_PWR_5V

VDD3.3V

VDD3.3V

VDD3.3V

PVDD_LCD

VDD3.3V

VDD3.3V

PVDD_LCDCB86

100nF/C1608J8A2-3PA-2.54DSA

123

R415 NC/R1608

R410 0/R1608

R391

0/R1608

R449 NC/R1608

R407

10K/R1608

R447 0/R1608

+ CTB70

10uF,16V/T3216

R403 0/R1608

C57100pF/C1608

+

CTB69

10uF,6.3V/T2012

R402 NC/R1608

R389

0/R1608

R397 0/R1608

R409

10K/R1608

JACK9

COMPOSITE RCA

12

VIDEOGND

U42

ECLAMP2378P

12345678

161514131211109

17

TP92

+

CT1733uF,6.3V/T3528

CB87

100nF/C1608

J6A2-3PA-2.54DSA1

23

U43

NJM2561F1

6

5

4

1

2

3

V+

GND

VIN

POWER

VOUT

VSAG

R413 0/R1608

R392

75, 1%/R1608

R404 0/R1608

CB83

100nF/C1608

R398 0/R1608

CB85

100nF/C1608

R396 0/R1608

U41

ECLAMP2378P

12345678

161514131211109

17

J7A2-3PA-2.54DSA

123

R418

10K/R1608

CB84

100nF/C1608

R400 NC/R1608R399 0/R1608

+

CTB68

10uF,6.3V/T2012

+

CT1833uF,6.3V/T3528

+

CT1933uF,6.3V/T3528

R401 0/R1608

R452 0/R1608

R386

75, 1%/R1608

+CTB66

10uF,6.3V/T2012

+

CTB67

10uF,6.3V/T2012

R408

10K/R1608

U39

NJM2561F1

6

5

4

1

2

3

V+

GND

VIN

POWER

VOUT

VSAGC55

100nF/C1608

TP91

U40

ECLAMP2378P

12345678

161514131211109

17

YC

Yn Cn

JACK10

CONN_SVIDEO_12P (MD-40S)

34

12

R412 0/R1608

R446 0/R1608R395 NC/R1608

R3870/R1608

R390

4.7K/R1608

R384

4.7K/R1608

R416

10K/R1608

R411 NC/R1608

+

CT2033uF,6.3V/T3528

R393

150/R1608

R414 0/R1608

R388150/R1608

R448 0/R1608

R417

10K/R1608

R406 NC/R1608

R394 0/R1608

R405 NC/R1608

C56

100nF/C1608

R385

0/R1608

M5

GF056-60S-LSS-P2000

123456789

101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

<Silk>EINT9 <Silk>

EINT10<Silk>EINT11

DC 5V,3A<Silk>

ON / OFF<Silk>

VDD3.3V<Silk>

VDD3.3V<Silk>

GPN12<Silk>

GPN13

GPN14

GPN15Added on04/30/2008

Power 0.2


A3




Date: Sheet of

XEINT14[2,16]XEINT13[2,14,16]

XEINT15[2,14,16]

XEINT9/ADDR_CF1 [2,14]XEINT11 [2]XEINT10/ADDR_CF2 [2,11,12,14]

XEINT12[2]

VDD3.3V

B_PWR_5V

VDD3.3V

B_PWR_5V

B_PWR_5V

VDD3.3V

VDD3.3V

VDD3.3V

SW6

SW-RS-6

21

3 4

5

D11

CMPSH-3

13

TPH6GND

(1.5A, SMD, Poly Switch)

F1

MicroSMD150-2

1 2

SW7TL1105A-BLACK (DIP)

3 41 2

Q6 MMBT3904LT1

1

2 3

R442

400K/R1608

C65

100nF/C1608

+

CTB74

220uF,6.3V/T6032

+CTB76

10uF,6.3V/T2012

C60

100pF/C1608

MTH8GND

C58100nF/C1608

CB88100nF/C1608

TPH1GND

R421

47K/R1608

Q7A

FDS6982

2

187

JACK11

POWER JACK (DC-JACK, DC-003)

1

23

P

GG

LED8

LTST-C150BKT (SMD3216 Blue)

1 2

MTH10GND

MTH11GND

Q2 MMBT3904LT1

1

2 3

C61

100pF/C1608

R439

57.6K,1%/R1608

TPH5GND

C64

100nF/C1608

TPH4GND

Q3

SI4423DY

123

4

8765

MTH9GND

R422

10K/R1608

LED9


1 2

VR1NC

13

2

MTH12GND

R4401 ohm/R1608


3 41 2

R424 330/R1608

R44112.7K,1%/R1608

U45

LTC3778EF

1

2

3

4

5

6

8

9

10 11

12

13

14

15

16

17

18

7

19

20RUN/SS

VON

PGOOD

VRNG

ITH

FCB

ION

VFB

EXTVCC VIN

INTVCC

DRVCC

BG

PGND

SENSE-

SENSE+

SW

SGND

TG

BOOST

R425

10K/R1608

R4380/R1608

LED7


1 2

MTH7GND

ZD1

Onsemi 1SMB5920BT3G (6.2V)

12

Q4 MMBT3904LT1

1

2 3

LED10


1 2

R430

10K/R1608

R423 330/R1608

R445

100K/R1608

C63

100nF/C1608

R426

10K/R1608

C62 10nF/C1608

L2

1.5uH (SDR1005-1R5M)

1 2

R429

12.7K/R1608

R443

100K/R1608 TPH2GND

R432

10K/R1608

R420 330/R1608

+CTB73

4.7uF,16V/T3216

R43439K/R1608

+

CTB75

220uF,6.3V/T6032

R427

10K/R1608

R436 20K/R1608

LED11

LTST-C150CKT (SMD3216 Red)

1 2

MTH6GND

C59220nF/C1608

Q7BFDS6982

4

365

+CT21

4.7uF,6.3V/T3216

JP3

A2-2PA-2.54DSA

12

Q5 MMBT3904LT1

1

2 3

+CTB71

22uF,16V/T3528

TPH3GND

R419 330/R1608

R428

10K/R1608

MTH5GND


3 41 2

R437 NC/R1608

C66

100nF/C1608

R433 1K/R1608

R444

100K/R1608

R431 330/R1608

R435100K/R1608

+CTB72

4.7uF,16V/T3216

U44

MAX6458UKD0A-T

5

4

1

2

3

VCC

IN-

OUT

GND

IN+

0.1

SMRPM5_LCD48WV

Samsung Semiconductor

<Drawn By>

<Checked By>

<QC By>

<Released By>

<Drawn Date>

<Checked Date>

<QC Date>

<Release Date>

<Code>

C

<Drawing Number>

<Scale>

1

1

REV:

SIZE:

CODE:

DRAWN:

DATED:

DATED:

CHECKED:

QUALITY CONTROL:

DATED:

DATED:

RELEASED:

COMPANY:

TITLE:

DRAWING NO:

SHEET: OF

SCALE:

REVISION RECORD

APPROVED:

ECO NO:

LTR

DATE:

1

2

3

4

5

6

D

C

B

A

C

D

B

A

GPIO

5

VIN

6

CTRL

7

LED

8

CAP

4

GND3

3

GND2

2

GND1

1

SW

IC1

LT3491

1

2

L3

10uH

R4

2

0/1

60

8

R43

100K/1608

R44

10/1608

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

U3

GF056-60S-LSS-P2000

1

TP3

TP_R08_SMD

Z:24A0SCHEMATIC337SMDK24A0X-REV01_030714.DSN

1

TP4

TP_R08_SMD


R144

0/1005

R145

0/1005

R146

0/1005

R148

0/1005

TP10

TP_R08_SMD


R135

0/1005

R137

0/1005

R184

0/1005

R185

0/1005

C29

10uF/6.3V/T2012

C30

10

uF

/6.3

V/T

20

12

C31

10

uF

/6.3

V/T

20

12

C32

10uF/6.3V/T2012

R6

0/1005

R7

0/1005

R8

0/1005

R9

0/1005

R10

0/1005

R11

0/1005

R12

0/1005

R13

0/1005

TP6

TP_R08_SMD


R45

0/1005

C33

1uF

C34

1uF

C37

0.1uF

1

GND

2

GND

3

VCC

4

VCC

5

PD16(R0)

6

PD17(R1)

7

PD18(R2)

8

PD19(R3)

9

PD20(R4)

10

PD21(R5)

11

PD22(R6)

12

PD23(R7)

13

PD8(G0)

14

PD9(G1)

15

PD10(G2)

16

PD11(G3)

17

PD12(G4)

18

PD13(G5)

19

PD14(G6)

20

PD15(G7)

21

PD0(B0)

22

PD1(B1)

23

PD2(B2)

24

PD3(B3)

25

PD4(B4)

26

PD5(B5)

27

PD6(B6)

28

PD7(B7)

29

GND

30

DOTCLK

31

PCI

32

HSYNC

33

VSYNC

34

DE

35

GND

36

GND

37

Y2

38

X2

39

Y1

40

X1

41

GND

42

LED1-

43

LED1+

44

LED2-

45

LED2+

J3

51296-4593

molex,51296-4593

R15

0/1005

R16

0/1005

R17

0/1005

R18

0/1005

R19

0/1005

R20

0/1005

R21

0/1005

R22

0/1005

R23

0/1005

R24

0/1005

R25

0/1005

R26

0/1005

R27

0/1005

R28

0/1005

R29

0/1005

R30

0/1005

R31

0/1005

R32

0/1005

R33

0/1005

R34

0/1005

R35

0/1005

R36

0/1005

R37

0/1005

R38

0/1005

R39

0/1005

R40

0/1608

R41

0/1608

R1

0/1608

5

VIN

6

CTRL

7

LED

8

CAP

4

GND3

3

GND2

2

GND1

1

SW

IC2

LT3491

1

2

L1

10uH

R2

0/1

60

8

R3

100K/1608

R4

10/1608

C1

1uF

C2

1uF

C3

0.1uF

R5

0/1608

R14

0/1608

R46

0/1608

C4

DN

E/T

20

12

R47

DNE/1608

R48

DNE/1608

XVCLK

XVDEN

XVSYNC

XPWM_TOUT0

VD[0:23]

VD0

VD1

VD2

VD3

VD4

VD5

VD6

VD7

VD8

VD9

VD10

VD11

VD12

VD13

VD14

VD15

VD16

VD17

VD18

VD19

VD20

VD21

VD22

VD23

XNRSOUT

XPWRRGTON

LEND

XVCLK

XHSYNC

XVSYNC

XVDEN

LCDVF0

TSYM

TSYP

TSXM

TSXP

XPWM_TOUT1

LCD_PANNEL_ON

XSPICLK0/ADDR_CF1

XSPIMOSI0/ADDR_CF2

XSPIMISO0/ADDR_CF0

XCS

VBATT

VDD_LCD_3V3_P

VDD_LCD_3V3_P

XPWM_TOUT0

WHITE_LED

XHSYNC

VDD_EXT

TSYM

TSYP

TSXP

TSXM

VDD_LCD_3V3_P

XPWM_TOUT1

VD[0:23]

VD16

VD17

VD18

VD19

VD20

VD21

VD22

VD23

VD8

VD9

VD10

VD11

VD12

VD13

VD14

VD15

VD0

VD1

VD2

VD3

VD4

VD5

VD6

VD7

VDD_LCD_3V3_P

LED1+

LED2+

LED2+

VDD_LCD_3V3_P

XPWM_TOUT1

LED1+

WLED_OUT1

WHITE_LED

WHITE_LED

230907SMDK6410 Users Manual Rev10

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