1 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012 ITRS Public Conference Emerging Research Devices 2012 ERD Chapter An Chen, Victor.

1 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

ITRS Public ConferenceEmerging Research Devices

2012 ERD Chapter

An Chen, Victor Zhirnov and Jim Hutchby

2 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

Hiro Akinaga AIST Tetsuya Asai Hokkaido U. Yuji Awano Keio U. George Bourianoff Intel Michel Brillouet CEA/LETI John Carruthers PSU Ralph Cavin SRC Chorn-Ping Chang AMAT An Chen GLFOUNDRIES U-In Chung Samsung Byung Jin Cho KAIST Sung Woong Chung Hynix Luigi Colombo TI Shamik Das Mitre Antoine Khoueir Seagate Bob Doering TI Tetsua Endoh Tohoku U. Bob Fontana IBM Paul Franzon NCSU Akira Fujiwara NTT Mike Garner Consultant Dan Hammerstrom PSU Wilfried Haensch IBM Tsuyoshi Hasegawa NIMS Shigenori Hayashi Matsushita Dan Herr SRC Toshiro Hiramoto U. Tokyo Matsuo Hidaka ISTEK Jim Hutchby SRC Adrian Ionescu EPFL Kiyoshi Kawabata Renesas Tech Seiichiro Kawamura Selete Suhwan Kim Seoul Nation U Hyoungjoon Kim Samsung Atsuhiro Kinoshita Toshiba Dae-Hong Ko Yonsei U. Hiroshi Kotaki Sharp Mark Kryder INSIC

Franz Kreupl Tech. U. Munich Zoran Krivokapic GLOBALFOUNDRIES Kee-Won Kwon Seong Kyun Kwan U. Jong-Ho Lee Hanyang U. Thomas Liew ASTAR DSI Lou Lome IDA Matthew Marinella SNL Hiroshi Mizuta U. Southampton Kwok Ng SRC Fumiyuki Nihei NEC Dmitri Nikonov Intel Kei Noda Kyoto U. Ferdinand Peper NICT Er-Xuan Ping AMAT Yaw Obeng NIST Yutaka Ohno Nagoya U. Dave Roberts Nantero Shintaro Sato Fujitsu Labs Barry Schechtman INSIC Sadas Shankar Intel Takahiro Shinada Waseda U. Masayuki Shirane U. Tokyo Kaushal Singh AMAT Satoshi Sugahara Tokyo Tech Shin-ichi Takagi U. Tokyo Ken Uchida Toshiba Thomas Vogelsang Rambus Yasuo Wada Toyo U. Rainer Waser RWTH A Franz Widershoven NXP Jeff Welser NRI/IBM Philip Wong Stanford U. Dirk Wouters IMEC Kojiro Yagami Sony David Yeh SRC/TI Hiroaki Yoda Toshiba In-K Yoo SAIT Victor Zhirnov SRC

Emerging Research Devices Working Group

3 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

year

Beyond CMOS

Elements

Existing technologies

New technologies

Evolution of Extended CMOS

More Than Moore

4 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

2012 ERD ChapterAssessing Emerging Research --

Memory Devices Logic Devices More-than-Moore Devices Architectures

Benchmarking Emerging Devices

5 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

Key Messages♦ Emerging Research Memory:

Remove Nanomechanical Memory from ERD technology table Recommend close tracking of RRAM by PIDS Workshops on Memory Select Devices and Storage Class Memory completed

Quantitative data for roadmapping Implement multilevel energy analysis for different memory technologies

♦ Emerging Research Logic: Planned logic device workshop for maturity evaluation (Sep. 21) Recommend close tracking of p-III-V, n-Ge, nanowire FET, TFET by PIDS Add emerging interconnect discussions in ERD Together with RFAMS, mapping ERD devices for analog/RF applications

♦ More-than-Moore Section: New entry will be added in – On-chip energy harvesting devices

♦ Emerging Architectures: Execute workshop on emerging research architectures (fundamental concepts) Add emerging memory interface for Storage Class Memory

6 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

Cross-TWIG Interactions• Discussions with PIDS on emerging research memory and

logic devices for close tracking of maturing technologies – RRAM

– Nanowire FET, Tunnel FET, p-III-V, n-Ge

• Formed a taskforce with RF/AMS for evaluation of ERD devices for RF/Analog application– Envisioned outcome: a parametrization table in ERD MtM section

• Formed a taskforce with Interconnects for exploring emerging interconnects solutions for emerging research devices– Envisioned outcome: expanding ERD tables to include emerging

interconnect solutions

• Initiated discussion with Design and AP on exploring circuit design and application space for ERD

7 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012 7

2012 ERD Workshops• Workshop on assessment of options for emerging

memory select devices– Noorwijk, the Netherlands, April 22, 2012– Status: Completed and report finished

• Workshop on emerging architectures for storage class memory  – Monterey, CA, July 8, 2012– Status: Completed

• Workshop on emerging research logic devices – Bordeaux, France, September 21, 2012 (ESSDERC-linked)– Status: Agenda completed

• Workshop on emerging research architectures – San Francisco, CA, Dec 8, 2012 (tentative)– Status: TBD

8 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

One Diode – One Resistor (1D1R) Memory Cell

H-S. P. Wong – Stanford U.

9 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012 9

Select Device Workshop Outcome• Workshop presentations will be put on ITRS website

• Workshop results are summarized in a report (finished)

• Several take-away messages– There are several categories of memory select devices depending on memory

device type and applications• e.g. RRAM or PCM; embedded vs. stand-alone

• ERD Storage Class Memory workshop in July 2012 reiterated the importance of select devices

– A theoretical exploration of a ‘selector-less’ memory cell needs to be performed

• Memory element with a build-in select element (e.g. a Schottky diode)

• Materials/structure optimization for both memory and select functions

• Materials and Devices modeling could provide an important insight

– Contact resistance is an important practical performance limit • ERM/ERD contact resistance e-workshop being planned

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Memory Hierarchy – Future Memory Challenge

Source: Al Fazio (Intel)NVM cost/gigabyte ~ $1

SCM

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Storage-type vs. memory-type SCM

11

2 4 6 8 1010ns

100ns

1s

10s

100s

Rea

d L

aten

cy NAND

DRAM

(Write) EnduranceCost/bit

Speed (Latency & Bandwidth)

Power!

Memory-typeuses

Storage-typeuses

low co$t

Cell size [F2]

F F 4F2

Source: G. Burr (IBM)

12 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

3 nm

Pt PtTiO2 TiO2-x

oxidized reduced

ERD Memory Candidates

13 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

Potential of Memory Candidates for SCM Applications

13

 Prototypical (Table ERD3)

     Emerging (Table ERD5)  

Parameter FeRAM STT-MRAM PCRAMEmerging

ferroelectric memory

Nanomechanical

memory

Redox memory

Mott Memory

Macromolecular memory

Molecular Memory

Scalability

MLC

3D integration

Fabrication cost

Endurance

?

?

?

?

?

?

?

14 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

Device options for SCM

14

Morning session

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Architecture issues of SCM

15

Afternoon session

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SCM Workshop Outcome• Over 50 participants

• Workshop presentations will be put on ITRS website

• Workshop results will be summarized in a report

• Several take-away messages

– A comprehensive multilevel energy analysis of different memories is needed

• A follow-up ERD study is planned

– Flexible interfaces (device-independent)

• A new topic for emerging architecture

– 'Generic' memory specs may need some discussion/rationalization

– Some memory devices are unlikely candidates (e.g., FRAM, Macromolecular memory)

17 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

ERD Logic Workshop

17

9:00 Overall workshop goals and objectives George Bourianoff / Intel - USA

 Session I: Circuit Requirements & Expectations for Emerging Research Devices9:15 Digital Circuits David Frank / IBM - USA9:45 Analog/Mixed Signal/ RF Circuits David Robertson / Analog Devices – USA10:15 More-than-Moore Ideas Thomas Skotnicki / ST Microelectronics – France 10:45 Break

 Session II: Emerging Research Devices for Nanocircuits11:00 Tunnel FET Marc Heyns / IMEC – Belgium11:30 CNT FET Chongwu Zhou / USC – USA 12:00 Graphene transistors Frank Schwierz / TU Ilmenau – Germany (V.Z.)

12:30 – 14:00 Lunch14:00 NEMS Devices Adrian Ionescu / EPF Lausanne – Switzerland14:30 Atomic switch Tsuyoshi Hasegawa / NIMS – Japan 15:00 MOTT FET Akihito Sawa / AIST – USA 15:30 Break15:45 Spin FET and Spin MOSFET Satoshi Sugahara / Tokyo Inst Technol – Japan 16:15 Nanomagetic and all spin logic Michael Niemier / U Notre Dame – USA16:45 Spin wave devices Alexander Khitun / UCLA – USA17:15 Break17:30 Summary and wrap up George Bourianoff / Intel – USA18:00 Adjourn

18 ERD 2012 ITRS Summer Conference – San Francisco, USA – July 12, 2012

Summary♦ Emerging Research Memory:

Remove Nanomechanical Memory from ERD technology table Recommend close tracking of RRAM by PIDS Workshops on Memory Select Devices and Storage Class Memory completed

Quantitative data for roadmapping Implement multilevel energy analysis for different memory technologies

♦ Emerging Research Logic: Planned logic device workshop for maturity evaluation (Sep. 21) Recommend close tracking of p-III-V, n-Ge, nanowire FET, TFET by PIDS Add emerging interconnect discussions in ERD Together with RFAMS, mapping ERD devices for analog/RF applications

♦ More-than-Moore Section: New entry will be added in – On-chip energy harvesting devices

♦ Emerging Architectures: Execute workshop on emerging research architectures (fundamental concepts) Add emerging memory interface for Storage Class Memory