1 2 nd AMICSA Workshop – 1 & 2 September 2008 Linearity Performances Linearity Performances Measurement of a Low Power 14- Measurement of a Low Power 14- bit A / D Converter, bit A / D Converter, tested in Representative tested in Representative Conditions Conditions of CCD Space Applications of CCD Space Applications J.Y Seyler, F. Malou, A. Penquer – CNES France L. Dugoujon, C. Prugne - STMicroelectronics
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1 2 nd AMICSA Workshop – 1 & 2 September 2008 Linearity Performances Measurement of a Low Power 14-bit A / D Converter, tested in Representative Conditions.
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of a Low Power 14-bit A / D Converter,of a Low Power 14-bit A / D Converter,
tested in Representative Conditionstested in Representative Conditions
of CCD Space Applicationsof CCD Space Applications
J.Y Seyler, F. Malou, A. Penquer – CNES France
L. Dugoujon, C. Prugne - STMicroelectronics
22nd AMICSA Workshop – 1 & 2 September 2008
Presentation Plan :Presentation Plan :
Introduction
The TSA1401 ADC & RHF1401 ( Hi Rel version ) Generalities
Motivation Aspects
Hi Rel Version
Accuracy of the Linearity Measurements Method Measurements Method
Bench Description
Measurement Accuracy
Measurement Results
Conclusions & Perspective
32nd AMICSA Workshop – 1 & 2 September 2008
Introduction :Introduction :
• Particular Constraintsof the Video Signal for ADC :
– Perturbations during the conversion ( Reset Peak for CCD )– Very different amplitudes for 2 consecutive samples ( obscurity followed by highly
illuminated pixels )– Linearity Performance of the A/D Converters = Major issue for space missions– Environment Hardness, Low Power Consumption– …
• The “ COTS ” ( “ Components Off The Shelve ” ) ADC announce today :– High performances,– Low Power consumption.
Our purpose :– Consider directly A/D converters available “ Off the Shelve ”– Evaluate these devices in test conditions representatives of CCD applications.– An additional space qualification work is to be paid for environment hardness
insurance.
42nd AMICSA Workshop – 1 & 2 September 2008
TSA1401 ADC and the HIREL one (1/3) :TSA1401 ADC and the HIREL one (1/3) :
Generalities about the TSA1401 :14-bit, up to 30Msps sampling frequency ADC developed by
STMicroelectronics using deep submicron CMOS technology combining high performances with very low power consumption.
Pipeline structure with digital error correction
Excellent static linearity and dynamic performances. Dissipates 85 mW @ 20Msps ( down to 70mW @ 10 Msps ).
= 5 times less power consuming than usual space ADC.
52nd AMICSA Workshop – 1 & 2 September 2008
TSA1401 ADC and the HIREL one (2/3) :TSA1401 ADC and the HIREL one (2/3) :
Motivation Aspects and reason for characterizing the TSA1401 :
– Lowest known power consumption ( similar Speed & Resolution ADCs )– Linearity performances announcement = very good :
• I.N.L. p/p <= 4 LSB• DNL p/p <= 1.2 LSB.
– SEL immune up to LET de 55 MeV/mg.cm² ( CNES tests )– Also available in Space Grade from STM :
“ RHF1401” with Space Evaluation : ESCC 2269000 specifications ( with CNES funding ), QML-V Certification for US Qualification in progress.
Nota : Results presented are from commercial grade version.
Hirel Version, RHF1401 : Proposed in a Ceramic SO-48 package.
Complete Evaluation Test program is carried outto demonstrate the high reliability of this ADC for Space Applications :
Including mechanical and thermal tests, endurance testsand a Construction Analysis.
Radiation Tests under Heavy Ions ( susceptibility to Single Event Effects )
and under Co60 dose Rad-Hard product up to 300 kRad ( Si ).
First Radiation Tests : no Single Event Latch-up under heavy ionsand no parameter deviations up to 1 MRad ( Si ) Total Dose.
Hi-Rel version of the ADC will be fully qualified before end 2008 :– Electrical Characterization– Screening + Life-Test 3000 h– Construction Analysis made at CNES– TID Tests : OK up to 150krads– Intended to be introduced into EPPL
82nd AMICSA Workshop – 1 & 2 September 2008
Accuracy of the linearity Accuracy of the linearity measurements method :measurements method :
Histogram generated with “ Analogue Stimulus Generator ” :
• 16-bit resolution Analogue Voltage to the ADC.
• Ramp Function excitation ( sweeps full-scale range a given number of times with the same occurrence probability at each voltage step )
Because : “ Traditional Sine wave excitation” is too far from real CCD signal.
D.N.L. and I.N.L. can be extracted from the sampled histogram, if we note :
0)12()0()12()0( NN INLINLDNLDNL
12;0;)(
)(
NnnH
HnHnDNL
)()1()( nDNLnINLnINL
(1)
(2)
(3)
H
Codeper Number OccurrenceMean H "n " Code a ofNumber Occurrence H
102nd AMICSA Workshop – 1 & 2 September 2008
Analogue Signal Generated :Analogue Signal Generated :H
qstim < qcan
Vmax
Vmin
Figure 1 :“ Quasi-Static ” Test Mode
Profil a t
FS
FS/2
0
Instants d’échantillonnage
Figure 2 :“ Perturbated ” Test Mode
Figure 3 :“ Alternated ” Test Mode
Generation of 3 types of signals :
“ Quasi-Static ” Test Mode ( Light Intensity linear variations ) :– The signal is a ramp function– Each step of the ramp is sampled.
“ Perturbated ” Test Mode :– The signal is a ramp function with periodic perturbation levels.– Perturbation levels are not sampled.
“ Alternated ” Test Mode ( Consecutive sampling ofa Dark pixel and Illuminated pixel) :
– Ramp function with periodic perturbation levels.– Perturbation levels are sampled.
112nd AMICSA Workshop – 1 & 2 September 2008
Bench Description :Bench Description :H
The Test Bench, in CNES, is composed of 4 parts :
• Analog Stimulus Generator ( Analog Card with FPGA, 16-bit D/A Converter, Differential Amplifier, … )
• “ A/D Under Test ” mounted on a dedicated card.• Power Supplies, Clock Generator to drive the ASG and the A/D Card• Dedicated Software ( Clock Generators, Data Acquisition from A/D )
A/D card
StimulusGenerator
122nd AMICSA Workshop – 1 & 2 September 2008
Measurement Accuracy :Measurement Accuracy :
sytematic measurement error vs. Total analogical noise
0
20
40
60
80
100
120
0,01 0,06 0,11Analogical noise (14-bit LSB)
syst
emat
ic e
rro
r (%
)
H
DNL Measurement Accuracy can be computed knowing :• ADC DNL ( ASG is supposed to have ideal linearity ),• Number of ramps,• ADC bit-resolution,• Total analog noise ( ASG + ADC noises )
2 forms of measurement error :• Systematic error ( because ASG has only discrete values )• Random error ( = Standard Deviation )
DNL random error (standard deviation) vs. total analog noise
0
0,01
0,02
0,03
0,04
0,05
0,06
0,07
0 1 2 3 4 5 6
total analog noise (14-bit LSB)
DN
L r
an
do
m e
rro
r (1
4-b
it L
SB
)
Nramp=64Nramp=128Nramp=256
Systematic Error versus Noise :Measured with 0.05 LSB simulated ADC DNL.Total analog noise is measured to be 2.5 LSB_rms Systematic error totally canceled !
DNL Random Error :ADC with theoretical null NLD on all codesobtained by simulation for different ramp numbers
Conclusions and PerspectiveConclusions and Perspective : :H
• CNES Test Bench allows measurements of Linearity Performancesof 14-bit resolution ADC with a very good accuracy.
• Measured in representative conditions of CCD applications.• Preliminary Linearity measurements on TSA1401 High Level Performances.
More devices have to be tested to confirm these results :RHF1401 to be tested @ several Temp. & Vdd conditionssince few differences with TSA1401 ( # Package ).
The TSA1401 is confirmed to provide a valuable candidate asa 14-Bit 20Msps A/D Converter for demanding CCD space applications :• Very Low Power Consumption,• Excellent Linearity performance in Space CCD Application Conditions.
RHF1401 Hi-Rel version expected to provide similar excellence with full ESCC ( CNES funding) and QML-V space qualification before end 2008.