Ø CPE/EE 421 vLSL – Logical Shift Left Microcomputersmilenka/cpe421-04S/lectures/cpe421-s05p4.pdf · Lecture Note S05 *Material used is in part developed by Dr. D. Raskovic and

Alex Milenkovich 1

CPE/EE 421/521 Microcomputers 1

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CPE/EE 421Microcomputers

Instructor: Dr Aleksandar MilenkovicLecture Note

S05

*Material used is in part developed by Dr. D. Raskovic and Dr. E. Jovanov


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Shift Operations

Ø Logical Shiftv LSL – Logical Shift Leftv LSR – Logical Shift Right


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Shift Operations, cont’d

Ø Arithmetic Shiftv ASL – Arithmetic Shift Leftv ASR – Arithmetic Shift Right


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Ø Rotatev ROL – Rotate Leftv ROR – Rotate Right

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Ø Rotate Through Extendv ROXL – Rotate Left Through Extendv ROXR – Rotate Right Through Extend


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Effect of the Shift Instructions

After CCR After CCRInitial Value First Shift XNZVC Second Shift XNZVC

ASL 11101011 11010110 11001 10101100 11001ASL 01111110 11111100 01010 11111000 11011

ASR 11101011 11110101 11001 11111010 11001ASR 01111110 00111111 00000 00011111 10001

LSL 11101011 11010110 11001 10101100 11001LSL 01111110 11111100 01000 11111000 11001

LSR 11101011 01110101 10001 00111010 10001LSR 01111110 00111111 00000 00011111 10001

ROL 11101011 11010111 ?1001 10101111 ?1001ROL 01111110 11111100 ?1000 11111001 ?1001

ROR 11101011 11110101 ?1001 11111010 ?1001ROR 01111110 00111111 ?0000 10011111 ?1001


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Forms of Shift Operations

Ø Mode 1 ASL Dx,Dy Shift Dy by Dx bits

Ø Mode 2 ASL #,Dy Shift Dy by #data bits

Ø Mode 3 ASL Shift the contents

at the effective address by one place

All three modes apply to all eight shift instructions


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Bit Manipulation Operations

Ø Act on a single bit of an operand:1. The complement of the selected bit is moved to the

Z bit (Z set if specified bit is zero)2. The bit is either unchanged, set, cleared, or toggled

v NVCX bits are not affected

v May be applied to a bit within byte or longword

v BTST – Bit Test only

v BSET – Bit Test and Set (specified bit set)

v BCLR – Bit Test and Clear (specified bit cleared)

v BCHG – Bit Test and Change (specified bit toggled)

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Effective address of the operand

Bit Manipulation Operations, cont’d

Ø All 4 have the same assembly language forms:

BTST Dn, or BTST #,

Location of the bit to be tested


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Program Control Operations

Ø Examine bits in CCR and chose between two courses of action

Ø CCR bits are either: v Updated after certain instruction have been executed, orv Explicitly updated (bit test, compare, or test instructions)

Ø Compare instructions: CMP, CMPA, CMPI, CMPMv Subtract the contents of one register (or mem. location)

from another register (or mem. location) v Update NZVC bits of the CCRv X bit of the CCR is unaffectedv The result of subtraction is ignored


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Program Control Operations, cont’d

Ø CMP: CMP ,[]-[]

Ø CMPI: CMP #,comparison with a literal

Ø CMPA: CMP ,Anused for addresses, operates only on word and longword operands

Ø CMPM: CMP (Ai)+,(Aj)+compares memory with memory, one of few that works only with operands located in memory

Ø TST: TST zero is subtracted from specified operand;N and Z are set accordingly, V and C are cleared, X is unchanged

Ø Except CMPA, all take byte, word, or longword operands


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Program Control Operations, cont’d

Ø Branch Instructionsv Branch Conditionallyv Branch Unconditionallyv Test Condition, Decrement, and Branch

Ø BRANCH CONDITIONALLY

Bcc v cc stands for one of 14 logical conditions (Table 2.4)v Automatically calculated displacement can be d8 or d16v Displacement is 2’s complement signed number v 8-bit displacement can be forced by adding .S extensionv ZNCV bits are used to decide

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HProgram Control Operations, cont’d

Ø BRANCH UNCONDITIONALLYBRA or JMP (An)

JMP d16(An) JMP d8(An,Xi)JMP Absolute_addressJMP d16(PC)JMP d8(PC,Xi)

Ø TEST CONDITION, DECREMENT, and BRANCHDBcc Dn, (16 bit displacement only)

One of 14 values from Table 2.4, plus T, plus F

If test is TRUE, branch is NOT taken !

If cc is NOT TRUE, Dn is decremented by 1;If Dn is now equal to –1 next instruction is executed

if not, branch to CPE/EE 421/521 Microcomputers 14

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HSubroutines

Ø BRANCH TO SUBROUTINEBSR = [A7]← [A7] - 4

M([A7])]← [PC] [PC]← [PC] + d8

Ø RETURN FROM SUBROUTINERTS = [PC]← [M([A7])]

[A7]← [A7] + 4


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HSubroutines, cont’d

Ø BRANCH TO SUBROUTINE000FFA 41F900004000 LEA TABLE, A0001000 61000206 NextChr BSR GetChar001004 10C0 MOVE.B D0,(A0)001006 0C00000D CMP.B #$0D,D000100A 66F4 BNE NextChr

001102 61000104 BSR GetChr001106 0C000051 CMP.B #’Q’,D000110A 67000EF4 BEQ QUIT

001208 1239000080000 GetChr MOVE.B ACIAC,D0

BSR d8 d8=? (or d16, to specify d8 use BSR.S)

d8 = $00001208 – ($00001000 + 2) = $00000206

current PC value


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HNested Subroutines

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HNested Subroutines, cont’d


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HNested Subroutines, cont’d

Ø Returning directly to a higher-level subroutineSub2 .

.BEQ Exit..RTS

Exit LEA 4(A7),A7RTS

Ø RTR (Return and restore condition codes)v Save the condition code register on the stack:

MOVE CCR, -(A7)v Use RTR instead of RTS


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Miscellaneous Instructions

Ø Scc: Set byte conditionallyScc (cc same as in DBcc)If the condition is TRUE, all the bits of the byte specified by are SET, if the condition is FALSE, bits are CLEARED

Ø NOP: No Operation

Ø RTS: Return from Subroutine

Ø STOP: STOP #nStop and load n into Status Register; n is 16-bit number; Privileged instruction

Ø CHK, RESET, RTE, TAS, TRAPV - later


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HExample: Linked List

Ø Adding an element to the end of a linked list• HEAD points to the first element, NEW contains the address of

the new item to be inserted• Longwords

LEA HEAD,A0 A0 initially points to the start of the * linked listLOOP TST.L (A0) IF the address field = 0

BEQ EXIT THEN exitMOVEA.L (A0),A0 ELSE read the address of the next element BRA LOOP Continue

EXIT LEA NEW,A1 Pick up address of new elementMOVE.L A1,(A0) Add new entry to end of listCLR.L (A1) Insert the new terminator

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HExample: Linked List, cont’d

Ø Initial linked list:





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HExample: Linked List , cont’d

Ø Linked list after inserting an element at the end:





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HExample: Linked List , Memory Map


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Assembly Language and C

Ø We are interested in:v How a high-level language uses low-level language

features?v C: System programming, device drivers, …v Use of addressing modes by compilersv Parameter passing in assembly languagev Local storage

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Assembly Language and C, ACIA example

Character_Input(Func, Dev_loc, Input_Char, Error_St)Error_St=0IF Func = 0

THEN Initialize Input_DevELSE Read status of Input_Dev

IF status OK THENBEGIN

Set Cycle_Count to max valueREPEAT

Read status of Input_DevDecrement Cycle_Count

UNTIL Input_Dev is ready OR Cycle_Count = 0Input_Char = input from Input_DeviceIF Cycle_Count = 0

THEN Error_St = $FF END_IFEND

ELSE Error_St = status from Input_DevEND_IF

END_IFEnd Character_Input


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ACIA example, 68000 assembly language version

* ACIA_Initialize and Character_Input routine* Data register D0 contains Function (zero=initialize, non-zero = get a character)

* Data register D0 is re-used for the Cycle_Count (a timeout mechanism)

* Data register D1 returns Error_Status* Data register D2 returns the character from the ACIA* Data register D3 is temporary storage for the ACIA’s status* Data register D4 is temporary storage for the masked ACIA’s status (error bits)

* Address register A0 contains the address of the ACIA’scontrol/status register

*Char_In MOVEM.W D3-D4,-(A7) Push working registers on the stack

CLR.B D1 Start with Error_Status clearCMP.B #0,D0 IF Function not zero THEN get inputBNE InPut ELSE initialize ACIAMOVE.B #3,(A0) Reset the ACIAMOVE.B #$19,(A0) Configure the ACIABRA Exit_2 Return after initialization


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ACIA example, 68000 assembly language version

*InPut MOVE.W #$FFFF,D0 Set up Cycle_Count for time-out

(reuse D0)InPut1 MOVE.B (A0),D3 Read the ACIA’s status register

MOVE.B D3,D4 Copy status to D4AND.B #%01111100,D4 Mask status bits to error conditionsBNE Exit_1 IF status indicates error, set error

flags & returnBTST #0,D3 Test data_ready bit of statusBNE Data_Ok IF data_ready THEN get dataSUBQ.W #1,D0 ELSE decrement Cycle_CountBNE InPut1 IF not timed out THEN repeatMOVE.B #$FF,D1 ELSE Set error flagBRA Exit_2 and return

*Data_Ok MOVE.B (2,A0),D2 Read the data from the ACIA

BRA Exit_2 and return *Exit_1 MOVE.B D4,D1 Return Error_StatusExit_2 MOVEM.W (A7)+,D3-D4 Restore working registers

RTS Return


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Ø Two registers are used in subroutine and have to be saved on the stack:

MOVE.W D3-D4,-(A7)(otherwise, data would be lost)

Ø D0 is simply reused without saving, because the old data will not be needed

Ø PROS:v Position independent codev Re-entrancy (subroutine has to save registers before they

are reused

Ø CONS:v Reduces number of registers available to programmer

v Number of parameters limited by the number of registers

Passing Parameters via Registers

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Ø Passing parameters by valuev Actual parameter is transferredv If the parameter is modified by the subroutine, the

“new value” does not affect the “old value”

Ø Passing parameters by referencev The address of the parameter is passedv There is only one copy of parameterv If parameter is modified, it is modified globally

Mechanisms for Parameter Passing


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HPassing Parameters by Value

LEA (-4,A7),A7 Save space on stack for Error_Status and Input_Char

0SP

0

SPError_Status

Input_Char

-2

-4State of stack after executing this instruction

Address with respect to the initial stack pointer


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MOVE.L #ACIA,-(A7) Push ACIA address on the stackMOVE.W Func,-(A7) Push function code on the stack

0

SPError_Status

Input_Char

-2

-4

Function

ACIA address

Input_Char

Error_Status

-10

-8

-4

-2

0

SP

Passing Parameters by Value


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Return address

Function

ACIA address

Input_Char

Error_Status

-14

-10

-8

-4

-2

0

SP

BSR Char_In Call subroutineLEA (6,A7),A7 Clean up stack - remove parameters

Function/ACIAMOVE.W (A7)+,Char Pull the input character off the stackMOVE.W (A7)+,Err Pull the Error_Status off the stack


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* Character_Input and ACIA_Initialize routine* Data register D3 is temporary storage for the ACIA’s status* Data register D4 is temporary storage for the Cycle_Count* Address register A0 contains the address of the ACIA’scontrol/status register

*Char_In MOVEM.L A0/D3-D4,-(A7) Push working registers on the stack

MOVE.L (18,A7),A0 Read address of ACIA from the stackCLR.B (24,A7) Start with Error_Status clear


Saved registers

Return address

Function

ACIA address

Input_Char

Error_Status

-26

-14

-10

-8

-4

-2

0

SP12

16

18

22

24

Address with respect to the final value of stack pointer

Address with respect to the initial stack pointer


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HPassing Parameters by ValueCMPI.B #0,(16,A7) IF Function not zero THEN get inputBNE InPut ELSE initialize ACIAMOVE.B #3,(A0)MOVE.B #$19,(A0)BRA Exit_2 Return after initialization

*InPut MOVE.W #$FFFF,D0 Set up Cycle_Count for time-out

(reuse D0)InPut1 MOVE.B (A0),D3 Read the ACIA’s status register

MOVE.B D3,D4 Copy status to D4AND.B #%01111100,D4 Mask status bits to error conditionsBNE Exit_1 IF status indicates error, deal with itBTST #0,D3 Test data_ready bit of saved status

statusBNE Data_OK IF data_ready THEN get dataSUBQ.W #1,D0 ELSE decrement Cycle_countBNE InPut1 IF not timed out THEN repeatMOVE.B #$FF,(24,A7) ELSE Set error flagBRA Exit_2 and return

Saved registers

Return address

Function

ACIA address

Input_Char

Error_Status

-26

-14

-10

-8

-4

-2

0

SP12

16

18

22

24


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HPassing Parameters by ValueData_OK MOVE.W (2,A0),(22,A7) Read the data from the ACIA

and put on the stackBRA Exit_2 and return

*Exit_1 MOVE.B D4,(24,A7) Return Error_StatusExit_2 MOVEM.L (A7)+,A0/D3-D4 Restore working registers

RTS Return

Function

ACIA address

Input_Char

Error_Status

-10

-8

-4

-2

0

SP


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* BACK TO MAIN PROGRAM :*

BSR Char_In Call subroutineLEA (6,A7),A7 Clean up stack - remove parameters

Function/ACIAMOVE.W (A7)+,Char Pull the input character off the stackMOVE.W (A7)+,Err Pull the Error_Status off the stack

0

SPError_Status

Input_Char

-2

-4


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HPassing Parameters by Reference

PEA Func Push Function address on the stackPEA ACIA Push ACIA address on the stackPEA Error_Status Push address of Error_StatusPEA Char Push address of input dataBSR Char_In Call subroutineLEA (16,A7),A7 Clean up the stack - remove the four

addresses

Char

Error_Status

ACIA address

Function

-16

-12

-8

-4

0

SP


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HPassing Parameters by ReferenceBSR Char_In Call subroutineLEA (16,A7),A7 Clean up the stack-remove the 4 addr

* * D0 is temporary storage for the timeout counter* D3 is temporary storage for the ACIA’s status* D4 is temporary storage for the Cycle_Count* A0 points at the location of the character input from the ACIA* A1 points at the location of the Error_Status* A2 points at the location of the ACIA* A3 points at the location of the Function code*Char_In MOVEM.L A0-A3/D0/D3-D4,-(A7) Push working regs on the stack

Saved registers

Return address

Char

Error_Status

ACIA address

Function

-48

-20

-16

-12

-8

-4

0

SP+28

+32

+36

+40

+44


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HPassing Parameters by ReferenceMOVEA.L (32,A7),A0 Read address of Char from the stackMOVEA.L (36,A7),A1 Read address of Error_StatusMOVEA.L (40,A7),A2 Read address of ACIA from the stackMOVEA.L (44,A7),A3 Read address of FunctionCLR.B (A1) Start with Error_Status clearCMPI.B #0,(A3) IF Function not zero THEN get inputBNE InPut ELSE initialize ACIAMOVE.B #3,(A2)MOVE.B #$19,(A2)BRA Exit_2 Return after initialization

*InPut MOVE.W #$FFFF,D0 Set up Cycle_Count for timeoutInPut1 MOVE.B (A2),D3 Read the ACIA’s status register

MOVE.B D3,D4 Copy status to D4AND.B #%01111100,D4 Mask status bits to error conditionsBNE Exit_1 IF error, set flags and returnBTST #0,D3 Test data_ready bit of statusBNE Data_OK IF data_ready THEN get dataSUBQ.W #1,D0 ELSE decrement Cycle_CountBNE InPut1 IF not timed out THEN repeatMOVE.B #$FF,(A1) ELSE Set error flagBRA Exit_2 and return

Saved registers

Return address

Char

Error_Status

ACIA address

Function

-48

-20

-16

-12

-8

-4

0

SP+28

+32

+36

+40

+44


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Data_OK MOVE.W (2,A2),(A0) Read the data from the ACIABRA Exit_2

*Exit_1 MOVE.B D4,(A1) Return Error_StatusExit_2 MOVEM.L (A7)+,A0-A3/D0/D3-D4 Restore working registers

RTS

Char

Error_Status

ACIA address

Function

-16

-12

-8

-4

0

SP

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* Back to main program* ...

BSR Char_In Call subroutineLEA (16,A7),A7 Clean up the stack-remove the 4 addr

0SP


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The Stack and Local Variables

Ø Subroutines often need local workspace

Ø We can use a fixed block of memory space –static allocation – but:v The code will not be relocatablev The code will not be reentrantv The code will not be able to be called recursively

Ø Better solution: dynamic allocation v Allocate all local variables on the stackv STACK FRAME = a block of memory allocated by a

subroutine to be used for local variablesv FRAME POINTER = an address register used to point

to the stack frame


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HThe Stack and Local Variables

It can be done simply by modifying the stack pointer:


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The Stack and Local Variables

Ø LINK and UNLK automate the creation and removal of the stack frame

Ø Implementation

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HThe Stack and Local VariablesNested subroutines: A calls B, then B calls A


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HPEA Char Push address of dest. for the inputPEA Error_Status Push address of Error_Status messagePEA ACIA Push ACIA’s address on the stackMOVE.W Function,-(A7) Push value of function code on the stackBSR Char_In Call subroutineLEA (14,A7),A7 Clean up the stack - remove the four

parameters


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* Character_Input and ACIA_Initialize routine* SF location A6 - 6 holds the ACIA’s status* SF location A6 - 4 holds the ACIA’s masked status (error bits only)* SF location A6 - 2 holds the Cycle_Count* A1 contains the address of the Error_Status* A2 contains the address of the ACIA’s control/status register*Char_In LINK A6,#-6 Create a stack frame for three words

MOVEM.L A1-A2,-(A7) Push working registers on the stackMOVEA.L (14,A6),A1 Read address of Error_Status from

the stackMOVEA.L (10,A6),A2 Read address of ACIA from the stackCLR.B (A1) Clear Error_StatusMOVE.W #$FFFF,(-2,A6) Set up Cycle_Count for timeoutCMPI.B #0,(8,A6) IF Function not zero THEN get inputBNE InPut ELSE initialize ACIAMOVE.B #3,(A2) Reset ACIAMOVE.B #$19,(A2) Configure ACIABRA Exit_2 Return after initialization


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InPut MOVE.B (A2),(-4,A6) Read the ACIA’s status register -save in Temp1

MOVE.B (-4,A6),(-6,A6) Copy status to Temp2ANDI.B #%01111100,(-6,A6) Mask status bits to error

conditionsBNE Exit_1 IF status indicates error,

set flag and exitBTST #0,(-4,A6) ELSE Test data_ready bit of statusBNE Data_OK IF data_ready THEN get dataSUBQ.W #1,(-2,A6) ELSE decrement Cycle_CountBNE InPut IF not timed out THEN repeatMOVE.B #$FF,(A1) ELSE Set error flagBRA Exit_2 and return

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Data_OK MOVE.L (18,A6),(A1) Get address for data dest.* (reuse A1)

MOVE.B (2,A2), (A1) Read data from ACIABRA Exit_2

*Exit_1 MOVE.B (-6,A6),(A1) Return Error_StatusExit_2 MOVEM.L (A7)+,A1-A2 Restore working registers

UNLK A6RTS

Ø CPE/EE 421 vLSL – Logical Shift Left Microcomputersmilenka/cpe421-04S/lectures/cpe421-s05p4.pdf · Lecture Note S05 *Material used is in part developed by Dr. D. Raskovic and

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