Transcript

Outline

• NMOS Operation in

Cut off ,Linear and Saturation mode

Related Equations

1/27/2015 EEE C424/ECE C313

Outline

Cut off ,Linear and Saturation mode

EEE C424/ECE C313 1

Recap

• Physics of MOSFET

• NMOS

1/27/2015 EEE C424/ECE C313

Recap

EEE C424/ECE C313 2

CMOS DESIGN

•The operation of PMOSto the NMOS transistor,that the majority carriersvoltages are negative with

substrate.

MOSFET

CMOS DESIGN

PMOS transistor is analogoustransistor, with the exception

carriers are holes and thewith respect to the

MOSFET

MOS Transistors

• Silicon, forms the basic starting material

• MOS structure is created by superimposing several layers of conducting,insulating and transistor forming materials

• CMOS technology provides two types of transistorsNegatively (-ve) diffused silicon that is rich in electrons :

Positively (+ve) doped silicon that is rich in holes :

CMOS DESIGN

MOS Transistors

Silicon, forms the basic starting material

structure is created by superimposing several layers of conducting,insulating and transistor forming materials

technology provides two types of

ve) diffused silicon that is rich in electrons : NMOS

Positively (+ve) doped silicon that is rich in holes : PMOS

CMOS DESIGN

MOSFET

Perspective View

MOSFET

Cross sectional View

Operation of nmos with no gate voltage applied

1/27/2015

Channel Formation In NMOS

Operation of nmos with no gate voltage applied

6

1/27/2015

Accumulation mode [ 0 < V

7

Accumulation mode [ 0 < Vg ]

Vg = Vgs = Gate Voltage

Operation of nmos with gate voltage applied

Operation of nmos with gate voltage applied

1/27/2015 EEE C424/ECE C313

What happens if Gate Voltage V

EEE C424/ECE C313 9

What happens if Gate Voltage Vg = Vgs is increased ?

1/27/2015

Depletion Mode [ 0<V

10

Depletion Mode [ 0<Vg<Vt ]

1/27/2015

Inversion mode [V

Enhacement NMOS

11

Inversion mode [Vg >Vt ]

Enhacement NMOS

Copyright © 2005 Pearson Addison-Wesley. All rights reserved.

2-1212

1/27/2015

MOSFET

NMOS PMOS

Enhacement NMOS Depletion NMOS

13

MOSFET

NMOS PMOS

Depletion NMOS

Enhacement PMOS Depletion PMOS

Applying a small VApplying a small VDS

ID Vs Vds Characterstics when Vsmall (Linear Region)

Characterstics when Vds

small (Linear Region)

Chapter 4 MOS field-Effect Transistors (MOSFETs)

Figure 4.5Operation as VEffect Transistors (MOSFETs)

Figure 4.5Operation as VDS increased

Applying a small VApplying a small VDS

ID Vs Vds Characterstics when Vsmall (Linear Region)

Conductance of channel propotional to V(Vov,overdrive voltage

Characterstics when Vds

small (Linear Region)

Conductance of channel propotional to VGS-Vt

,overdrive voltage)

Chapter 4 MOS field-Effect Transistors (MOSFETs)

Figure 4.5Operation as V

VGS

•The voltage between the gate and points along the channel decreases from VGS

VGS – VDS at the drain end

Effect Transistors (MOSFETs)

Figure 4.5Operation as VDS increased

VGS - VDS

The voltage between the gate and points along the at the source end to

ID Vs VDS Characterstics

1/27/2015 EEE C424/ECE C313

Characterstics

EEE C424/ECE C313 20

Channel isPinched off point

Effect on Channel as V

1/27/2015 EEE C424/ECE C313

Effect on Channel as VDS increased

EEE C424/ECE C313 21

Chapter 4 MOS field-Effect Transistors (MOSFETs)

Figure 4.15Channel Length ModulationEffect Transistors (MOSFETs)

Figure 4.15Channel Length Modulation

iD Vs VDS relationship

1/27/2015 EEE C424/ECE C313

relationship

EEE C424/ECE C313 23

Current Equation in Linear/Triode region

• Linear Region :

1/27/2015 EEE C424/ECE C313

saturation

Current Equation in Linear/Triode region

EEE C424/ECE C313 24

• Linear Region :

1/27/2015 EEE C424/ECE C313

Substituting VGS – Vt = V

Current Equation in saturation region

EEE C424/ECE C313 25

VDS

saturation

Current Equation in saturation region

I-V Characteristics of MOSFETV Characteristics of MOSFET

HomeWork

• Derive Current equation in linear and saturation mode for NMOS

(Ref: Page 243 Sedra Smith)

1/27/2015 EEE C424/ECE C313

HomeWork

Derive Current equation in linear and saturation mode for NMOS

(Ref: Page 243 Sedra Smith)

EEE C424/ECE C313 27

Drain Current

• ID α W/L (Aspect Ratio)

α

1/27/2015 EEE C424/ECE C313

Drain Current

W/L (Aspect Ratio)

EEE C424/ECE C313 28

NMOS Transistor

CMOS DESIGN

NMOS Transistor

CMOS DESIGN

NMOS Transistor - Symbolic RepresentationSymbolic Representation

NMOS Transistor with vNMOS Transistor with vGS and vDS applied

iD - vDS Characterstics

1/27/2015 EEE C424/ECE C313

Triode Region Saturation Region

Channel isPinched off

Characterstics

EEE C424/ECE C313 32

Saturation Region

vGS= vt+ 0.5

vGS= vt+ 1.0

vGS= vt+ 1.5

vGS= vt+ 2.0Channel isPinched off

iD - vDS CharactersticsCharacterstics

top related