SERVICE MANUAL 100883 IMPORTANT NOTICE This manual has been provided for the use of authorized YAMAHA Retailers and their service personnel. It has been assumed that basic service procedures inherent to the industry, and more specifically YAMAHA Products, are already known and understood by the users, and have therefore not been restated. WARNING: Failure to follow appropriate service and safety procedures when servicing this product may result in personal injury, destruction of expensive components, and failure of the product to perform as specified. For these reasons, we advise all YAMAHA product owners that any service required should be performed by an authorized YAMAHA Retailer or the appointed service representative. IMPORTANT: The presentation or sale of this manual to any individual or firm does not constitute authorization, certification or recognition of any applicable technical capabilities, or establish a principle-agent relationship of any form. The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The research, engineering, and service departments of YAMAHA are continually striving to improve YAMAHA products. Modifications are, therefore, inevitable and specifications are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the distributor's Service Division. WARNING: Static discharges can destroy expensive components. Discharge any static electricity your body may have accumulated by grounding yourself to the ground buss in the unit (heavy gauge black wires connect to this buss). IMPORTANT: Turn the unit OFF during disassembly and part replacement. Recheck all work before you apply power to the unit. P.O.Box 1, Hamamatsu, Japan ■ CONTENTS TO SERVICE PERSONNEL .......................................... 2 FRONT PANELS ........................................................ 3~4 REAR PANELS .......................................................... 4~8 REMOTE CONTROL PANELS ...................................... 8 SPECIFICATIONS .................................................... 9~11 INTERNAL VIEW ......................................................... 12 DISASSEMBLY PROCEDURES ........................... 12~14 SELF DIAGNOSIS FUNCTION (DIAG) ................. 15~31 CONFIRMATION OF IDLING CURRENT ................... 32 DISPLAY DATA ..................................................... 33~34 IC DATA ................................................................. 35~40 PRINTED CIRCUIT BOARD .................................. 41~48 PIN CONNECTION DIAGRAM .............................. 49~50 BLOCK DIAGRAM ....................................................... 51 SCHEMATIC DIAGRAM ........................................ 52~56 PARTS LIST ........................................................... 57~71 REMOTE CONTROL .............................................. 72~73 AV RECEIVER RX-V350/HTR-5730 RX-V350/HTR-5730
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SERVICE MANUAL
1 0 0 8 8 3
IMPORTANT NOTICEThis manual has been provided for the use of authorized YAMAHA Retailers and their service personnel.It has been assumed that basic service procedures inherent to the industry, and more specifically YAMAHA Products, are alreadyknown and understood by the users, and have therefore not been restated.
WARNING: Failure to follow appropriate service and safety procedures when servicing this product may result in personalinjury, destruction of expensive components, and failure of the product to perform as specified. For these reasons,we advise all YAMAHA product owners that any service required should be performed by an authorizedYAMAHA Retailer or the appointed service representative.
IMPORTANT: The presentation or sale of this manual to any individual or firm does not constitute authorization, certification orrecognition of any applicable technical capabilities, or establish a principle-agent relationship of any form.
The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The research, engineering, andservice departments of YAMAHA are continually striving to improve YAMAHA products. Modifications are, therefore, inevitableand specifications are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, pleasecontact the distributor's Service Division.
WARNING: Static discharges can destroy expensive components. Discharge any static electricity your body may haveaccumulated by grounding yourself to the ground buss in the unit (heavy gauge black wires connect to this buss).
IMPORTANT: Turn the unit OFF during disassembly and part replacement. Recheck all work before you apply power to the unit.
P.O.Box 1, Hamamatsu, Japan
CONTENTSTO SERVICE PERSONNEL .......................................... 2FRONT PANELS ........................................................ 3~4REAR PANELS .......................................................... 4~8REMOTE CONTROL PANELS ...................................... 8SPECIFICATIONS.................................................... 9~11INTERNAL VIEW ......................................................... 12DISASSEMBLY PROCEDURES ........................... 12~14SELF DIAGNOSIS FUNCTION (DIAG) ................. 15~31CONFIRMATION OF IDLING CURRENT ................... 32
DISPLAY DATA ..................................................... 33~34IC DATA ................................................................. 35~40PRINTED CIRCUIT BOARD .................................. 41~48PIN CONNECTION DIAGRAM .............................. 49~50BLOCK DIAGRAM ....................................................... 51SCHEMATIC DIAGRAM ........................................ 52~56PARTS LIST ........................................................... 57~71REMOTE CONTROL.............................................. 72~73
6. FAN DRIVE TEST: HIGH (Not applied to these models)
7. FAN DRIVE TEST: MID (Not applied to these models)
8. FAN DRIVE TEST: LOW (Not applied to these models)
There are 15 DIAG menu items, each of which has sub-menu items.Listed in the table below are menu items and sub-menu items.Note that not all menu items listed will apply to the models covered in this service manual.
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No DIAG menu sub-menu
11 IF STATUS 1. INSIDE STATUS 1 (5 Byte)
2. INSIDE STATUS 2 (3 Byte)
3. CHANNEL STATUS 1 (5 Byte)
4. CHANNEL STATUS 2 (5 Byte)
5. CHANNEL STATUS 3 (5 Byte)
6. CHANNEL STATUS 4 (5 Byte)
7. CHANNEL STATUS 5 (4 Byte)
8. BSI (YSS) 1 (5 Byte)
9. BSI (YSS) 2 (5 Byte)
10. BSI (YSS) 3 (5 Byte)
11. BSI (YSS) 4 (4 Byte)
12. BSI (CS) 1 (5 Byte)
13. BSI (CS) 2 (5 Byte)
14. BSI (CS) 3 (5 Byte)
15. BSI (CS) 4 (5 Byte)
16. BSI (CS) 5 (1 Byte)
17. YSS938-1 (5 Byte)
18. YSS938-2 (5 Byte)
19. YSS938-3 (4 Byte)
20. SECOND DECODER (3 Byte)
21. Mute Trigger (5 Byte)
12 DSP RAM CHECK 1. YSS938 BUS CHECK
2. PLD/SRAM BUS CHECK
13 SD DL CODE 1. ROM DATA Version
2. TOC Area 0
3. TOC Area 1
4. TOC Area 2
5. TOC Area 3
6. TOC Area 4
7. TOC Area 5
8. Sum check Area 0
9. Sum check Area 1
10. Sum check Area 2
11. Sum check Area 3
12. Sum check Area 4
13. Sum check Area 5
14 SOFT SWITCH 1. SW MODE
2. MODEL SETTING
3. TUNER DESTINATION
4. RDS EXIST
5. ZONE 2 EXIST
6. VIDEO FORMAT
15 ROM VERSION/CHECK SUM/ 1. VERSION
PORT 2. CHECK SUM ALL/PROGRAM
3. PORT
4. AAC PORT
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When there is a history of protection function due to excess current Version (1 alphabet)
Opening message
DIAG menu display
After a few seconds
Version (1 alphabet)When there is no history of protection function
Keys of main unit
Turn on the power while pressing these keys.
• Starting DIAGPress the “STANDBY/ON” key while simultaneouslypressing those two keys of the main unit as indicated in thefigure below.
• Starting DIAG in the protection cancelmode
If the protection function works and causes hindrance totrouble diagnosis, cancel the protection function asdescribed below, and it will be possible to enter the DIAGmode. (The protection functions other than the excesscurrent detect function will be disabled.)
Press the “STANDBY/ON” key while simultaneouslypressing those two keys indicated in the figure above. Atthis time, keep pressing those two keys for 3 seconds orlonger.
In this mode, the “SLEEP” segment of the FL display of themain unit flashes to indicate that the mode is DIAG modewith the protection functions disabled.
CAUTION!Using this product with the protection function disabledmay cause damage to itself. Use special care for this pointwhen using this mode.
• Canceling DIAG[1] Before canceling DIAG, execute setting for PRESET of
DIAG menu No.9 (Memory initialization inhibited orMemory initialized).* In order to keep the user memory stored, be sure toselect PRESET INHIBITED (Memory initializationinhibited).
[2] Turn off the power by pressing the “STANDBY/ON”key of the main unit.
Cause: The voltage in the power supply section isabnormal.Supplementary information: The abnormal voltage isdisplayed in % based on 5V as 100%.
Turning on the power without correcting the abnormalitywill cause the protection function to work 1 second laterand the power supply will be shut off.
When there is a history of protection function due to an abnormal voltage in the power supply section Version (1 alphabet)
Voltage display in %
When there is a history of protection function:
• Display provided when DIAG startedThe FL display of the main unit displays the protectionfunction history data and the version (1 alphabet) and theDIAG menu [sub-menu (ANALOG BYPASS) of DIAGmenu No.1 DSP THROUGH] a few seconds later.
When there is no history of protection function:
Cause: An excessive current flowed through the poweramplifier.Supplementary information: As the current through thepower transistor is detected, the abnormal channel can beidentified by checking the current detect transistor.
Turning on the power without correcting the abnormalitywill cause the protection function to work immediately andthe power supply will instantly be shut off.
Note)• Applying the power to a unit without correcting the
abnormality can be dangerous and cause additionalcircuit damage.
• The output transistors in each amplifier channelshould be checked for damage before applying anypower.
• The amplifier current should be monitored bymeasuring across the emitter resistors for eachchannel.
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DIAG menu selection
Keys of main unit
SUB-MENU selection
When there is a history of protection function due to excessive heat sink temperature Version (1 alphabet)
Voltage display in %
When there is a history of protection function due to abnormal DC output Version (1 alphabet)
Cause: DC output of the power amplifier is abnormal.
Turning on the power without correcting the abnormalitywill cause the protection function to work 3 seconds laterand the power supply will be shut off.
Cause: The temperature of the heat sink is excessive.Supplementary information: The abnormal voltage isdisplayed in % based on 5V as 500%.
Turning on the power without correcting the abnormalitywill cause the protection function to work 1 second laterand the power supply will be shut off.
* Additional causes of protection can be due to looseconnections, associated components, CPU, etc.
* For the protection voltage value, refer to DIAG menuNo.10 described later.
• Display during menu operationDuring the DIAG operation, the function at work isindicated on the FL indicator. The contents displayedduring the function operation are described in the latersection on details of functions.
• History of protection functionWhen the protection function has worked, its history isstored in memory with a backup. Even if no abnormalityis noted while servicing the unit, an abnormality whichhas occurred previously can be defined as long as thebackup data has been stored.The history of the protection function is cleared whenDIAG is cancelled by selecting PRESET RESERVED(Memory initialized) of DIAG menu No.9 or when thebackup data is erased.
• Functions in DIAG modeIn addition to the DIAG menu items, functions as listedbelow are available.• Input selection, 6CH input• Center/Surround/Sub-woofer level adjustment• Muting• Power on/off• Master volume
* Functions related to the tuner and the set menu are notavailable.
* It is possible to confirm Menu No.11 IF STATUS whilekeeping the signal process (operation status) of eachDIAG menu by using the input mode key of the mainunit.
• Initial settings used to start DIAGThe following initial settings are used when starting DIAG.When DIAG is canceled, these settings are restored tothose before starting DIAG.
• Master volume: -24dB• Input: DVD (6CH INPUT OFF)• Effect level: 0dB• Audio mute: OFF• Speaker setting: LARGE / BASS OUT = BOTH• DIAG menu: DSP THROUGH (1. ANALOG BYPASS)
• Operation procedure of DIAG menu andSUB-MENU
There are 15 MENU items, each of which has some SUB-MENU items.
DIAG menu selectionMain unit: Select the menu using (Forward) and (Reverse) PROGRAM keys.
SUB-MENU selectionMain unit: Select the sub-menu using - and + BASS/TREBLE keys.
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Digital
Analog A/D
DIR
Main DSP Sub DSP
AD L/R
L/R
LS/RS
C/LFE
C/SW
SL/SR
FL/FR
C(L)
LFE(R)
L/R
L/R(L/R)
SL/SR(L/R)
Sp Config
SPEAKER OUTPUT (1kHz) SUBWOOFERInput level Volume FRONT
YSS Presence 0dB• The Presence CH signal including the head margin is
output at the Front CH.Head margin:FRONT L/R: -6dBFS, Center: 0dBFS,SL/SR: 0dBFS, SWFR: Add L/R signal at 0dBFS.
Reference dataINPUT: DVD ANALOGSWFR: 50Hz, Others: 1kHz
• Details of DIAG menuWith full-bit output specified in some modes, it is possibleto execute 0dBFS output without including the headmargin in each channel.
1. DSP THROUGHMain DSP of YSS938 is selected for Front L/R output.
ANALOG BYPASS• The signal for L/R is output as it is without passing
through the DSP section.
Reference dataINPUT: DVD ANALOGSWFR: 50Hz, Others: 1kHz
YSS 0dB• The signal is output including the head margin.
Head margin:FRONT L/R: 0dBFS, Center: -6dBFS,SL/SR: -12dBFS,SWFR: Add L/R signal at -20dBFS.
Reference dataINPUT: DVD ANALOGSWFR: 50Hz, Others: 1kHz
SPEAKER OUTPUT (1kHz) SUBWOOFERInput level Volume FRONT
2. RAM THROUGHThis function is for YSS938 only.Only the CT signal is output through the Sub DSP –DRAM.
RAM 0dB
Reference dataINPUT: DVD ANALOGSWFR: 50Hz, Others: 1kHz
(Shaded items not used in this example)
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Digital
Analog A/D
DIR
Main DSP Sub DSP
AD L/R
L/R
LS/RS
C/-
C/SW
SL/SR
L/R
DPL/PLIIdecode
C
SL/SR
L/R
Sp Config
4Mbit DRAM
3. PRO LOGIC
PRO LOGIC II
Reference dataINPUT: DVD ANALOGSWFR: 50Hz, Others: 1kHz
Reference dataINPUT: DVD ANALOGSWFR: 50Hz, Others: 1kHz
PRO LOGIC I
Dolby Pro Logic (Auto)
(Shaded items not used in this example)
The L/C/R/SL/SR signals undergo the Pro-Logicprocessing and C/SL/SR signals are output through SubDSP-DRAM. The Main DSP is selected for FRONT L/Routput.Using the sub-menu, it is possible to select PRO LOGIC I,II (Movie). The Auto Input Balance function is always off.When the Dolby Digital Multi input is used, the function isthe same as in the Dolby Digital Normal mode.The LFE signal is not output when decoding in the PROLOGIC I, II mode.
Neo:6(Not applied to these models.)
SPEAKER OUTPUT (1kHz) SUBWOOFERInput level Volume FRONT
1 FRONT: SMALL 0dB 1kHz Both ch, -20 dBm +6.0 dB +11.5 dBm - ∞ - ∞ - ∞2 CENTER: NONE 1kHz Both ch, -20 dBm +6.0 dB +8.9 dBm +7.5 dBm - ∞ - ∞3 LFE/BASS: FRONT 50Hz Both ch, -20 dBm +6.0 dB - ∞ - ∞ - ∞ +6.5 dBm
4 Presence Mix: 5ch 1kHz Both ch, -20 dBm +6.0 dB +11.5 dBm - ∞ - ∞ - ∞5 Surround B Power 1kHz Both ch, -20 dBm +6.0 dB - ∞ - ∞ - ∞ - ∞
(Not applied to these models.)6 Tone Control Flat 1kHz Both ch, -20 dBm +6.0 dB +11.5 dBm +11.5 dBm +11.5 dBm -0.5 dBm
7 Tone Control +10dB 1kHz Both ch, -20 dBm +6.0 dB +13.4 dBm +11.5 dBm +11.5 dBm -0.5 dBm
8 Tone Control -10dB 1kHz Both ch, -20 dBm +6.0 dB +9.6 dBm +11.5 dBm +11.5 dBm -0.5 dBm
FRONT: SMALL 0dB CENTER: NONE LFE/BASS: FRONT
Presence Mix: 5ch Surround B power Tone Control Flat
Tone Control +10dB Tone Control –10dB
Not applied to these models.
Sub-menu CENTER SP SURROUND SP FRONT SP FRONT LEVEL LFE/BASS
1 FRONT: SMALL 0dB LARGE LARGE SMALL 0dB SWFR
2 CENTER: NONE NONE LARGE LARGE 0dB BOTH
3 LFE/BASS: FRONT SMALL SMALL LARGE 0dB FRONT
4 Presence Mix: 5CH LARGE LARGE LARGE 0dB BOTH
4. SPEAKERS SETThe input signal is automatically identified and switched inthe priority order of dts → DOLBY DIGITAL → AAC →PCM AUDIO → Analog (A/D) according to the signaldetection.
LARGE: This mode is used with a speaker havinghigh bass reproduction performance (a largeunit). Full bandwidth signals are output.
SMALL: This mode is used with a speaker having lowbass reproduction performance (a smallunit). The signals of 90Hz or less are mixedinto the channel specified by LFE/BASS.
NONE: This mode is used with no center speaker.The center content is reduced by 3dB anddistributed to FRONT L/R.
The analog switch settings for each sub-menu are asshown in the table below.
Sub-menu Treble Bass
6 Tone Control Flat 0 dB 0 dB
7 Tone Control +10dB +10 dB +10 dB
8 Tone Control –10dB –10 dB –10 dB
The signals output from the DSP block are the same as 1.DSP THROUGH: YSS 0dB.
Reference dataINPUT: DVD ANALOG (Both ch)
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6. OTHER INPUTThe signal input through the 6CH INPUT terminals isoutput.
Initial display / 初期表示 All segments OFF / 全セグメント消灯 All segments ON (dimmer 100%) / 全セグメント点灯(ディマー100%)
All segments ON (dimmer 50%) / 全セグメント点灯(ディマー50%)
Lighting of segments in lattice / セグメント格子状点灯
Lighting in lattice / 格子状点灯
Normal / 正常Short / ショート
Segment conditions of the FL driver and the FL tube arechecked by turning ON and OFF all segments. Next, theoperation of the FL driver is checked by using the dimmercontrol. Then a short between segments next to eachother is checked by turning ON and OFF all segmentsalternately (in lattice). (In the example below, thesegments in the second row from the top are shorted.)
7. DISPLAY CHECKThis program is used to check the FL display section. Thedisplay condition varies as shown below according to thesub-menu operation. The signals are processed usingEFFECT OFF (The L/R signal is output using ANALOGFRONT BYPASS.)Regarding internal/external synchronization selection ofthe image signals by the microprocessor control, theinternal synchronization is selected when the initial displayis provided and when all FL's light up and the externalsynchronization at any other time.Also, except when the initial display is provided, 128characters for confirmation of the OSD driver aredisplayed as the image output.
8. MANUAL TESTThe noise generator built into the DSP outputs the testnoise through the channels specified by the sub-menu.The noise frequency for LFE is 35 to 250 Hz. Other thanthat, the center frequency is 800Hz.
TEST ALL TEST FRONT L TEST CENTER
TEST FRONT R TEST SURROUND R TEST SURROUND B
TEST SURROUND L
Noise is output from all channels. Noise is output from the FRONT Lchannel.
Noise is output from the CENTER channel.
Noise is output from the FRONT Rchannel.
Noise is output from the SURROUND L channel.
TEST LFE
Noise is output from the SUB WOOFER channel.
Noise is output from the SURROUND Rchannel.
Not applied to these models.
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STATION FM FACTORY PRESET DATA (MHz)
PAGE NO. U, C A, B, G, E, L, R, T, K
1 87.5 87.5
2 90.1 90.1
3 95.1 95.1
A/C/E4 98.1 98.10
5 107.9 108.0
6 88.1 88.1
7 106.1 106.1
8 107.9 108.0
STATION AM FACTORY PRESET DATA (kHz)
PAGE NO. U, C, R, L A, B, G, E, T, K
1 630 630
2 1080 1080
3 1440 1440
B/D4 530 531
5 1710 1611
6 900 900
7 1350 1350
8 1400 1404
• PRESET STATIONS / プリセット局
9. FACTORY PRESETThis menu is used to reserve and inhibit initialization of theback-up RAM. The signals are processed using EFFECTOFF. (The L/R signal is output using ANALOG FRONTBYPASS.)
PRESET INHIBIT (Initialization inhibited)RAM initialization is not executed. Select this sub-menu to protect the values set by the user.The production history is not erased using this sub-menu.
PRESET RESERVED (Initialization reserved)Initialization of the back-up RAM is reserved. (Actually, initialization is executed the next timethat the power is turned on.) Select this sub-menu to reset to the original factory settings or toreset the RAM. The production history is not erased using this sub-menu.
CAUTION: Before setting to the PRESET RESERVED,write down the existing preset memorycontent of the Tuner in a table as shownbelow. (This is because sett ing to thePRESET RESERVED will cause the usermemory content to be erased.)
Preset group P1 P2 P3 P4 P5 P6 P7 P8
A
B
C
D
E
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THM/Fan (temperature detection/fan drive level)THM: 500% display of the voltage based on the
temperature detected value. Reference voltage :5V (Normal value: 30 to 147)
Fan: Current fan drive level on the left and the past fandrive history on the right.(Not applied to these models.)
10. AD DATA CHECK/FAN TESTThis menu is used to display the A/D conversion value ofthe terminals which detects panel keys of the main unitand protection functions in % using the sub-menu. Duringsignal processing, the condition before execution ismaintained.
* The figures in the diagram are given as reference only.
DC/PS (protection detection)DC: DC protection value (Normal value: 17 to 29)
If DC is out of the normal value range, the protectionfunction works to turn off the power.
PS: Power supply voltage protection value (Normal value:8 to 26)If PS is out of the normal value range, the protectionfunction works to turn off the power.
(Not applied to these models.)PL: Power limiter detection value
The voltage value of pin No. 91 of IC242 is displayed,using 5V/256 as standard.The port output is controlled by using the input voltagevalue of pin No. 91 of IC242.When higher than VthH, the port output is changedfrom H to L.When lower than VthL, the port output is changed fromL to H.
K0/K1 (Panel key of main unit)A/D of the key fails to function properly when the standardvalue is deviated. In this case, check the constant ofpartial pressure resistor, solder condition, etc. Refer totable 1.
FAN DRIVE TEST (Not applied to these models.)HIGH
FAN DRIVE TEST (Not applied to these models.)LOW
FAN DRIVE TEST (Not applied to these models.)MID
When K0/K1 menu is selected, keys become non-operable due to detection of the values of all keys.However, it is possible to advance to the next sub-menu by turning the VOLUME of the main unit. Whenusing this function, note that turning the VOLUME morethan 2 clicks will cause the volume value to change.
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1st byte
5th byte4th byte
3rd byte
2nd byte
1st byte
3rd byte
2nd byte
<5th byte> Signal processing status information*2: With digital signals other than 32kHz, 44.1kHz and
48kHz, through processing method is used forreproducible signals.
bit7 MUTE request bit3 –
bit6 Red dts flashing bit2 Through & bypass (*2)
bit5 6.1/EX processing bit1 –
bit4 FULL MUTE (ON: 1) bit0 dts analog mute
11. IF STATUS (Input function status)Using the sub-menu, the status data is displayed one afteranother in the hexadecimal notation.During signal processing, the status before execution ofthis menu is maintained.
* Numeric values in the figure example are for reference.
<1st byte> Digital input/output setting valueUpper 4 bits: REC OUT selected /lower 4 bits: INPUT selected
Display 00 01 02 03 04 05 06 0A 0B 0C 0D
Fs (kHz) Analog 32 44.1 48 64 88.2 96 Unknown NRM Unknown DBL Unknown QUAD Not defined
<4th byte> Format information of reproduction signal*1: Analog processing used for digital reproduction is not
possible because of a commercial bit or 4-ch audioreason.
<2nd byte> Fs information of reproduction signal
<3rd byte> Audio code mode information of reproduction signal
Display 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D
Audio Code 1+1 1/0 2/0 3/0 2/1 3/1 2/2 3/2 2/3 3/3 OVER 6.1 MULTI MONO MULTI PCE Unknown
Display Signal format00 Analog (Unlock)01 *110 PCM Audio20 Digital Data21 IEC1937 Data22 None PCM23 Unknown50 dts51 Red dts54 dts-ES MATRIX58 dts-ES DISCRETE5C dts-ES (Both flag)60 AACC0 Dolby DigitalC1 D.D. KaraokeC4 D.D.6.1 (D.D.EX)
IS1, 2 (Internal status):Indicates the status information of the microprocessor.
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YS1-3: Indicates device status information of YSS938(IC601).* The numeric value in the figure is an example for
reference.
Byte No. Function1 YSS MUTE Reg2 YSS MODE Reg3 YSS IPORT BIT 7-04 YSS IPORT BIT 14-85 YSS OPORT
Byte No. Function1 IEC 1937 Preamble Pc2 Data Stream Reg3 Status Reg4 YSS ZERO Reg5 MIREG
Byte No. Function1 DIR Status2 DIR fs3 DIR fs count4 YSS ZERO BF
CS1-5: Indicates channel status information of the inputsignal (IEC60958).
BY1-4: Indicates information of the bit stream included inthe DOLBY DIGITAL signal.
BS1-5: Indicates information of the bit stream included inthe dts signal.
SD: CS49329 Unsolicited Messages(AUTODETECT_RESPONSE)(Not applied to these models.)
MTT: Mute Trigger
Byte No. Function1 Mute condition2 Factor of the last mute3 Error count of YSS938-FSCNT4 Mute count by YSS938-FSCNT5 Error factor of down load of CS49329
Display Description
WAIT Bus is being checked.
NoEr No error detected.
DATA Data bus shorted or open.
RSCS /RAS or /CAS shorted, or open.
ADDR Address bus shorted or open.
12. DSP RAM CHECKThis menu is used to self-diagnose whether or not the busconnection for the YSS938 and the external RAM is madeproperly.During signal processing, the status before execution ofthis menu is maintained.The address bus and the data bus are checked and theconnection condition is displayed.When no error is detected, "NoEr" appears on display.
YSS938 Bus Check
PLD / SRAM BUS CHECK
Display Description
WAIT Bus is being checked.
None No error detected.
EDxx Data bus shorted or open. (XX: 00-07)
EAxx Address bus shorted or open. (XX: 00-0E)
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14. SOFT SWThis menu is used to switch the function settings on theP.C.B. through the software so as to activate the product.The protection function follows the P.C.B. settings. Whenconnected to AC or in the maker preset state, the unit isinitialized to the P.C. B. setting. Display of each functionafter initialization varies depending on settings on P.C.B.The operation mode can be changed by selecting the sub-menu and then using the EFFECT key. With SOF selectedfor the SW mode, the settings become effective.
MODEL SETTING: V350 or V350T can be selected.As there is no model to replace with, this mode is used thecheck for the T destination.
TUNER DESTINATION: UC, AKGTE or RL can beselected.
SW MODE: PCB or SOFT can be selected.
ZONE2: NOT or EXIST can be selected.(Not applied to these models.)
RDS: NOT or EXIST can be selected.
VIDEO FORMAT: NTSC or PAL can be selected.(Not applied to these models.)
TUNER: NOT or EXIST can be selected.
13. SD DL CODEThis menu is used to display the data version of theFLASH ROM, TOC information and sum calculatedvalue for the second decoder.
TA 0-5Displays the TOC information.
SA 0-5Displays the sum calculated value.
RDVDisplays the data version.
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“PORT:0 0 0 0 0 0 0 0” bit 7 6 5 4 3 2 1 0
Tuner mode 0 (*1)Tuner mode 1 (*1)Tuner with (1) / without (0)RDS with (1) / without (0)VIDEO format: PAL (1) / NTSC (0)
15. MICROPROCESSOR INFORMATIONThe version, checksum and the port specified by themicroprocessor are displayed. The signal is processedusing EFFECT OFF. The checksum is obtained by addingthe data at every 8 bits for each program area andexpressing the result as a 4-figure hexadecimal data.
*1
VersionRelease 1 digit / Main version 2 digit / DSP version 2 digit
ChecksumA: All area
Check of port setting for judging microprocessor function
Display of AAC function detection port state
Type Tuner mode Port 3 Frequency range1 0 (type 2) FM AM
Confirmation of Idling Current of Main (1) P. C. B.• Right after the power is turned on, confirm that the
voltage across the terminals of R157 (Front Lch), R158(Front Rch), R148 (Center), R156 (Surround Lch),R159 (Surround Rch) are between 0.1mV and 10.0mV.
RX-V350/HTR-5730
33
RX-V350/HTR-5730
DISPLAY DATA
V851 : 16-BT-122GNK (WC173100)
PIN CONNECTION
GRID ASSIGNMENT
Pin No.
Connection
Pin No. 69
F2
68
F2
67
NP
66
NP
65
P1
64
P2
63
P3
62
P4
61
P5
60
P6
59
P7
58
P8
57
P9
56
P10
55
P11
54
P12
53
P13
52
P14
51
P15
50
P16
49
P17
48
P18
47
P19
46
P20
45
P21
44
P22
43
P23
42
P24
41
P25
40
P26
39
P27
38
P28
37
P29
34
P32
33
P33
32
P34
31
P35
30
P36
29
P37
28
P38
27
NX
26
NX
25
NX
24
NX
23
NX
22
NX
21
NX
20
16G
19
15G
18
14G
17
13G
16
12G
15
11G
14
10G
13
9G
12
8G
11
7G
10
6G
9
5G
8
4G
7
3G
6
2G
5
1G
4
NP
3
NP
36
P30
35
P31
2
F1
1
F1
Connection
Note : 1) F1, F2 ..... Filament 2) NP ..... No pin 3) NX ..... No extened 4) DL ..... Datum line 5) 1G ~ 16G ..... Grid
IC DATAIC242: M30626FHPFP (MAIN P.C.B.)16bit µ-COM (Main CPU)
No. Port No. Function name I/O Detail of function1 SOUT4 DTFD SO FL Driver TxD2 CLK4 CKFD SCK FL Driver CLOCK3 P94 /BLK O FL Driver OFF4 P93 I Open (Unconnected)5 SOUT3 SDM SO YSS938 TxD6 SIN3 SDD SI YSS938 RxD7 CLK3 YSSCK SCK YSS938 CLOCK8 BYTE BYTE VSS Vss: when single chip mode is used9 CNVss CNVss Vss/Vcc Vss: when single chip mode is used, Vcc: when flash writing is used10 P87 CSY O YSS938 CE11 P86 /ICD O YSS938/DA/AD/CODEC/DEM12 RESET RESET I Reset13 Xout Xout Oscillator Out14 Vss Vss Vss µ-COM Ground15 Xin Xin 16MHz Oscillator in16 Vcc Vcc Vcc (BU) µ-COM power supply, +5V17 NMI NMI Vcc (BU) Connect to Vcc because it is unused.18 INT2 INT938 INT YSS938 IPINT/MUTE/DIR19 INT1 PSW INT Standby SW Input20 INT0 REM1 INT Remote Control Input21 P81 I Open (Unconnected)22 P80 O Open (Unconnected)23 P77 /HP I (IPU) Headphone Detect24 P76 VRA I (IPU) Volume Rotary A25 P75 VRB I (IPU) Volume Rotary B26 P74 CSN O Chip Select for DAC (Unconnected)27 P73 /ICCDK O CODEC Reset28 CLK2 O Open (Unconnected)29 P71 O Open (Unconnected)30 TXD2 O Open (Unconnected)31 TXD1 TXDF FLASH Flash ROM Serial Write Data Transmission32 RXD1 RXDF FLASH Flash ROM Serial Write Data Reception33 CLK1 CLKF FLASH Flash ROM Serial Clock34 P64 BSY FLASH Flash BUSY Signal Output35 TXD0 CSR SO CS493x RxD (Unconnected)36 RXD0 CST SI CS493x TxD (Unconnected)37 CLK0 CSC CLK CS493x Clock (Unconnected)38 P60 /CEEEP O EEPROM CE39 P57 SDTR O RDS/OSD TxD40 P56 SDRR SI/I (IPU) RDS RxD / Frequency SW (Dest R)41 P55 /EMP GND For Flash Writing (LO)42 P54 SCKR SCK RDS/OSD Clock43 P53 /CSCS O CS493x CS (Unconnected)
RX-V350/HTR-5730
36
RX-V
350/H
TR-57
30
No. Port No. Function name I/O Detail of function44 P52 /ICCS O CS493x Reset (Unconnected)45 P51 /CSPLD O Digital External Control IC CE (Unconnected)46 P50 /CE I For Flash Writing (HI)47 P47 CSINT I/O CS-DSP INT/ABOOT (Unconnected)48 P46 /FMT O Mute Front49 P45 /CMT O Mute Center50 P44 /SMT O Mute Surround51 P43 /MTSW O Mute LFE52 P42 /CRY O Center SP Relay Output (Unconnected)53 P41 /HPRY O Headphone SP Relay Output54 P40 O Open (Unconnected)55 P37 GAIN O Gain56 P36 BD_MUTE O BD3816 Mute57 P35 HPF O HPF58 P34 CKBD O Clock Line for BD38xx System Control59 P33 DTBD O Data Line for BD38xx System Control60 P32 VIA O Video Selector A61 P31 VIB O Video Selector B62 Vcc Vcc Vcc (BU) µ-COM Power Supply, +5V63 P30 O Open (Unconnected)64 Vss Vss Vss µ-COM Ground65 P27 /VR1 O Video Rec Out Selector 166 P26 O Open (Unconnected)67 P25 O Open (Unconnected)68 P24 O Open (Unconnected)69 P23 O Open (Unconnected)70 P22 O/I Open (Unconnected)71 P21 O Open (Unconnected)72 P20 RDSE O/I RDS Enable, RDS Present/Absent73 P17 CEP/TUN1 O/I PLL IC Enable/Destination Discriminate 174 INT4 PDET INT Power Down Detect INT75 INT3 5M SW INT 5M Switch Output76 P14 SCKP/TUN0 O/I PLL IC Clock/Destination Discriminate 077 P13 SDTP O PLL IC TxD78 P12 SDRP I (IPU) PLL IC RxD79 P11 TUNED I (IPU) Tuned80 P10 /ST I (IPU) Tuner/ST81 P07 TMT O Tuner Mute82 P06 PRY O Power Relay Output83 P05 SRY O Surround SP Relay Output84 P04 FRRY B O Front B SP Relay Output85 P03 FRRY A O Front A SP Relay Output86 P02 PRI I Protection Excess Current Detect87 P01 RIMA O Power Limiter A88 P00 O Open (Unconnected)89 AN7 MODEL AD Connection Discriminate90 AN6 PRD AD Protection DC Detect91 AN5 PREMT AD Power Limiter Detect92 AN4 THM AD Temperature Detect93 AN3 AD Open (Unconnected)94 AN2 ADKEY0 AD Key AD Input 095 AN1 ADKEY1 AD Key AD Input 196 Avss Avss Vss AD Ground97 AN0 PRV AD Protection Power Supply Voltage Detect98 Vref Vref (+5v) AD Reference99 Avcc Avcc Vcc (BU) AD Power Supply100 P97 CEFD O FL Driver CE
6 SELOB O+ Built-in selector output B (RSEL) (Unconnected)
7 TESTMS I+ Test terminal (Unconnected)
8 TESTXEN I+ Test terminal (Unconnected)
9 IPORT0 I+ General purpose input terminal (CXDTA)
10 IPORT1 I+ General purpose input terminal (CXDTB)
11 IPORT2 I+ General purpose input terminal
12 IPORT3 I+ General purpose input terminal
13 IPORT4 I+ General purpose input terminal
14 DDIN0 Is DIR: Digital audio interface data input terminal 0 (ISEL)
15 DDIN1 Is DIR: Digital audio interface data input terminal 1/General purpose input terminal (Pull down)
16 DDIN2 Is DIR: Digital audio interface data input terminal 2/General purpose input terminal (Pull down)
17 DDIN3 Is DIR: Digital audio interface data input terminal 3/General purpose input terminal (Pull down)
18 VSS Ground terminal
19 CPO A PLL filter connecting terminal
20 AVDD +3.3V power terminal (for DIR)
21 DIRPCO A DIR: PLL filter connecting terminal
22 DIRPRO A DIR: PLL filter connecting terminal
23 AVSS Ground terminal (for DIR)
24 TESTBRK I+ Test terminal (Unconnected)
25 TESTR1 I+ PLL initialization signal input terminal for DSP (/ICD)
26 TESTR2 I+ Test terminal (Unconnected)
27 VDD1 +3.3V power terminal (for terminal section)
28 SDWCKI0 I+ Word clock input terminal for SDIA, SDOA, SDIB, SDOB interface (WCKG) (Unconnected)
29 SDBCKI0 I+ Bit clock input terminal for SDIA, SDOA, SDIB, SDOB interface (BCKG) (Unconnected)
30 /SDBCK0 O DIRBCK or SDBCKI0 invert clock output terminal (Unconnected)
31 IPORT8 I+ IPINT general purpose input terminal
32 IPORT9 I+ IPINT general purpose input terminal (NONPCM)
33 IPORT10 I+ IPINT general purpose input terminal (NONPCM)
34 IPORT11 I+ IPINT general purpose input terminal (MUTE)
35 SDIA I AC-3/DTS bit stream (or PCM) data input terminal to Main DSP (SDIA)
36 SDOA2 O PCM output terminal from Main DSP (C/LFE output) (Unconnected)
37 SDOA1 O PCM output terminal from Main DSP (LS/RS output) (Unconnected)
38 SDOA0 O PCM output terminal from Main DSP (L/R output) (Unconnected)
39 SDIB3 I+ PCM input terminal 3 to Sub DSP (Unconnected)
40 SDIB2 I+ PCM input terminal 2 to Sub DSP (Unconnected)
41 SDIB1 I+ PCM input terminal 1 to Sub DSP (Unconnected)
42 SDIB0 I+ PCM input terminal 0 to Sub DSP (Unconnected)
43 VSS Ground terminal
44 VDD2 +2.5V power terminal (for internal circuit)
45 IPORT12 I+ IPINT general purpose input terminal (DIRINT)
46 IPORT13 I+ IPINT general purpose input terminal (DBL)
47 IPORT14 I+ IPINT general purpose input terminal (DBL)
48 DIRSDO O AC-3/DTS bit stream (or PCM) data output terminal from DIR (Unconnected)
49 DIRWCK O DIR: Serial data word clock (fs) output terminal (WCK)
50 DIRBCK O DIR: Serial data bit clock (64fs) output terminal (BCK)
51 DIRMCK O DIR: Serial data master clock (256fs or 128fs) output terminal (MCK)
52 ERR/BS O DIR: Data error detect output/block start output terminal (Unconnected)
53 SYNC/U O DIR: Serial data synchronous timing output/user data output terminal (Unconnected)
54 FS128/C O DIR: Serial data master clock 128fs output/channel status output terminal (FS128) (Unconnected)
55 DBL/V O DIR: Double rate clock output/validity flag output terminal (DBL)
IC801 : YSS938 (DSP P.C.B.)DSP
RX-V350/HTR-5730
39
RX-V350/HTR-5730
No. Name I/O Function
56 SDWCKI1 I+ Word clock input terminal for SDIB, SDOB interface (WCKG) (Unconnected)
57 SDBCKI1 I+ Bit clock input terminal for SDIB, SDOB interface (BCKG) (Unconnected)
58 VSS Ground terminal
59 SDOB3 O PCM output terminal from Sub DSP
60 SDOB2 O PCM output terminal from Sub DSP
61 SDOB1 O PCM output terminal from Sub DSP
62 SDOB0 O PCM output terminal from Sub DSP
63 VDD1 +3.3V power terminal (for terminal section)
64 ZEROBF3R O+ SDOB3 Rch zero flag output terminal (ZF3R) (Unconnected)
65 ZEROBF3L O+ SDOB3 Lch zero flag output terminal (ZF3L) (Unconnected)
66 ZEROBF2R O+ SDOB2 Rch zero flag output terminal (ZF2R) (Unconnected)
67 ZEROBF2L O+ SDOB2 Lch zero flag output terminal (ZF2L) (Unconnected)
68 OPORT0 O General purpose output terminal (/RINH1) (Unconnected)
69 OPORT1 O General purpose output terminal (/RINH2) (Unconnected)
70 OPORT2 O General purpose output terminal (/ICDA)
71 OPORT3 O General purpose output terminal (/ICAD) (Unconnected)
72 OPORT4 O General purpose output terminal (DPS)
73 OPORT5 O General purpose output terminal (RST) (Unconnected)
74 OPORT6 O General purpose output terminal (ERROR) (Unconnected)
75 OPORT7 O General purpose output terminal (/PRST) (Unconnected)
76 VSS Ground terminal
77 VDD2 +2.5V power terminal (for internal circuit)
78 RAMD0 I+/O Sub DSP: External memory data terminal 0
79 RAMD1 I+/O Sub DSP: External memory data terminal 1
80 RAMD2 I+/O Sub DSP: External memory data terminal 2
81 RAMD3 I+/O Sub DSP: External memory data terminal 3
82 ZEROBF1R O+ SDOB1 Rch zero flag output terminal (ZF1R) (Unconnected)
83 ZEROBF1L O+ SDOB1 Lch zero flag output terminal (ZF1L) (Unconnected)
84 ZEROBF0R O+ SDOB0 Rch zero flag output terminal (ZF0R) (Unconnected)
85 ZEROBF0L O+ SDOB0 Lch zero flag output terminal (ZF0L) (Unconnected)
86 RAMD4 I+/O Sub DSP: External memory data terminal 4
87 RAMD5 I+/O Sub DSP: External memory data terminal 5
88 RAMD6 I+/O Sub DSP: External memory data terminal 6
89 RAMD7 I+/O Sub DSP: External memory data terminal 7
90 VSS Ground terminal
91 VDD1 +3.3V power terminal (for terminal section)
92 RAMD8 I+/O Sub DSP: External memory data terminal 8
93 RAMD9 I+/O Sub DSP: External memory data terminal 9
94 RAMD10 I+/O Sub DSP: External memory data terminal 10
95 RAMD11 I+/O Sub DSP: External memory data terminal 11
96 RAMD12 I+/O Sub DSP: External memory data terminal 12
97 RAMD13 I+/O Sub DSP: External memory data terminal 13
98 RAMD14 I+/O Sub DSP: External memory data terminal 14
99 RAMD15 I+/O Sub DSP: External memory data terminal 15
100 CASN O Sub DSP: Column address strobe output terminal for external DRAM
101 RAMWEN O Sub DSP: Write enable terminal for external memory
102 RAMOEN O Sub DSP: Output enable terminal for external memory
103 RASN O Sub DSP: Low address strobe output terminal for external DRAM
104 VSS Ground terminal
105 VDD1 +3.3V power terminal (for terminal section)
106 RAMA8 O Sub DSP: External memory address terminal 8
107 RAMA7 O Sub DSP: External memory address terminal 7
108 RAMA0 O Sub DSP: External memory address terminal 0
109 RAMA6 O Sub DSP: External memory address terminal 6
110 RAMA1 O Sub DSP: External memory address terminal 1
IC801 : YSS938 (DSP P.C.B.)DSP
RX-V350/HTR-5730
40
RX-V
350/H
TR-57
30
Is: Schmidt trigger input terminalI+: Input terminal with pull-up resistorO: Digital output terminalOt: 3-state digital output terminalA: Analog terminal
No. Name I/O Function
111 RAMA5 O Sub DSP: External memory address terminal 5
112 RAMA2 O Sub DSP: External memory address terminal 2
All voltages are measured with a 10MΩ/V DC electronic volt meter. Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed. Schematic diagram is subject to change without notice.
IC802: MSM514260E-60JS4Mbit DRAM
TimingGenerator
I/OController
OutputBuffers
InputBuffers
InputBuffers
OutputBuffers
I/OController
Column Decoders
RAS
RefreshControl Clock
14
WE13
9
9
LCAS 29
UCAS
A0~A8
28
VCC 20
VSS 21
Sense AmplifiersI/O
Selector
MemoryCells
OE27
DQ9~DQ16
ColumnAddressBuffers
InternalAddressCounter
RowAddressBuffers
On ChipVBB Generator
RowDeco-ders
WordDrivers
9
9
16 16
8
8
8
8
8
8
DQ1~DQ8
8
8
1
2
3
4
5
6
7
8
9
10
11
SDOS
I2C
SMUTE
BICK
LRCK
SDTI1
SDTI2
SDTI3
SDTO
DAUX
DFS0
33
32
31
30
29
28
27
26
25
24
23
DZF2/OVF
RIN
LIN
NC
MASTER
ROUT1
LOUT1
ROUT2
LOUT2
ROUT3
LOUT3
44 43 42 41 40 39 38 37 36 35 34
TD
M0
LOO
P0
DIF
1
DIF
0
P/S
MC
LK
DZ
F1
AV
SS
AV
DD
VR
EF
H
VC
OM
12 13 14 15 16 17 18 19 20 21 22
SD
TI4
DZ
FE
TV
DD
DV
DD
DV
SS
PD
N
TS
T
CA
D1
CA
D0
LOU
T4
RO
UT
4MCLK
LRCK
BICK
FormatConverter
SDOSSDOUT
SDIN1SDIN2SDIN3SDIN4
ADC HPFAudio
I/F
ADC HPF
DAC DATTLPF
DAC DATTLPF
DAC DATTLPF
DAC DATTLPF
DAC DATTLPF
DAC DATTLPF
DAC DATTLPF
DAC DATTLPF
AK4628
IC803: AK4628VQ192kHz 24Bit 8-channel CODEC
22ROUT4
12
1
SDTI48 SDTI37 SDTI26 SDTI19 SDTO
10 DAUX
4 BICK
5 LRCK
39 MCLK
32RIN
31LIN
21LOUT4
24ROUT3
23LOUT3
26ROUT2
25LOUT2
28ROUT1
27LOUT1
IC804: PQ025EZ5MZPRegulator
1Vin 3 Vo
2 Vc5
GND
IC805: µPC29M33T-E1Voltage Regulator
3 OUTPUT
1 INPUT
2 COMMON (GND)
Safety DriveLimiter
Excessive ElectricCurrent Protection
Sud
den
Cur
rent
Pro
tect
ion
Sta
rter
Circ
uit
Driv
er
Sta
ndar
d V
olta
ge
Ove
rhea
t Pro
tect
ion
Amp.
IC806: TC74HCT08AFQuad 2-Input And Gate
Vcc14
4B13
4A12
4Y11
3B10
3A9
3Y8
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
IC807: MM74HCU04SJX Hex Inverters
A1
Y1
Y2
VCC
A6
1
2
3
4 11
A2 Y6
A5
12
13
14
A3
Y3
Y5
A4
5
6
7 Y48
9
10
GND
Point 1 Pin 1 of IC801
DSP
LEVEL CONVERT &SIGNAL DETECT
A/DCONVERTER
4M DRAM
REGULATOR
Page 56to MAIN (1)
H5 Page 53to FUNCTION (1)
H1
Pag
e 54
to F
UN
CT
ION
(2)
D9
Pag
e 56
to M
AIN
(1)
C10
1
FRONT L
CENTER
SURROUND L
0
2.5
2.5
0 0
1.2
4.9
4.9
4.9 0 4.9 0 0 0
2.6 2.6
04.9 0 5.0
2.5
2.5
5.0
2.5
5.0
02.
5
02.
5
5.0
4.9
1.7
2.52.5
2.52.50
0
1.9
1.7
1.7
0
0
1.30.1
0.7
0
0
1.3
1.3
~
1.3
0
1.3
1.3
1.3
1.3
0
0
2.3
~
~
~
1.8
1.8
0
4.8
1.4
1.4
1.4
1.4
4.8
~
~
~
~
2.3
1.7
1.1
1.7
1.7
1.7
4.8
4.9
0
4.0
4.9
0
4.0
2.6 5.0
3.4 5.0
3.4
0
2.6
4.8
5.00
5.0
1.7
1.8
1.7
1.8
1.7 ~ 1.1 ~ ~ 3.4 0 1.7
2.3
2.3 0 1.3
1.2
1.2
1.2
1.2
1.2
1.2
1.2
3.4 0
~ ~ ~ ~ 1.4
1.7
1.7 0
3.4
0 0.3
0.3
0.2
0.3
3.4
0.1
0.1
0.1 0 0.1
3.4 0
1.9 0 4.
9
3.4
0.3 0 0 0
1.9
0
2.6
0
0
2.5
0
0
0
0
0
3.4
0
0
0.1
0
0.5
4.9
0
0
4.0
4.0 2.5
0
0
0
1.71.7
1.7
0
0
1.2
1.3
0.1
0.73.4
0
0
0
2.51.4
1.4
1.4
00
2.5
0
00
0
4.9
00
00 4.9
2.4 0 0
0
2.8 4.9 0000
4.9
A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V350/HTR-5730SCHEMATIC DIAGRAM (FUNCTION 1/2)
53
IC452~IC456: NJM2068MDDual OP-Amp.
IC451: BD3816K1Input Select & Volume Control
–+
OUT1
–IN1
–VCC
+VCC
OUT2
1
2
3
4 5
+IN1 –IN2
+IN2
–+
6
7
8
INPUT SELECT&
VOLUME CONTROL
MUTE
HPF
HPF
Page 56to MAIN (1)
F3 Page 52to DSP
H1
Pag
e 55
to M
AIN
(1)A6
FUNCTION (1)
FUNCTION (6)
FUNCTION (3)
1
7
2
3
5
64
8
1
7
2
3
5
64
8
7
1
6
5
3
24
8
All voltages are measured with a 10MΩ/V DC electronic volt meter. Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed. Schematic diagram is subject to change without notice.
80
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
AGND1
INA1
INA2
INB1
INB2
INC1
INC2
IND1
IND2
INE1
INE2
INF1
INF2
AGND2
INDVDFR
INDVDFL
INDVDC
INDVDSR
INDVDSL
INDVDCB
INDVDSW
AGND3
OUT1
OUT2
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
ING SW
REC A
REC B
REC C
LOGIC
Input select
Vcc VEE
TREBLE
BASSOutputmodeselect
Mastervolume
6.1ch select
FRL select
VINFR
GOUTFL
VINFL
AGND10
TNF1
TNF2
BNFA1
BNFB1
BNFA2
BNFB2
OUTFR
OUTFL
AGND9
OUTC
OUTSR
OUTSL
OUTCB
AGND8
OUTSW
AGND7
VINC
GOUTC
VINSR
GOUTSR
AG
ND
13
RO
UT
C2
RO
UT
C1
RO
UT
B2
RO
UT
B1
RO
UT
A2
RO
UT
A1
AG
ND
12
VC
C
VE
E
AG
ND
11
DA
CL
MU
TE
TH
GN
D
GO
UT
FR
AG
ND
4
IND
SP
FR
IND
SP
FL
IND
SP
C
IND
SP
SR
IND
SP
SL
IND
SP
CB
IND
SP
SW
AG
ND
5
GO
UT
SW
VIN
SW
AG
ND
6
GO
UT
CB
VIN
CB
GO
UT
SL
VIN
SL
FRONT L
CD L (ANALOG IN)
CENTER
SURROUND L
FRONT L
CENTER
SURROUND L
-7.00 0 0 0 0 0 0 0 7.0 0 0 0 0 0 0
00 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7.0
-7.0
7.7
7.8
-7.7
-7.7
0
12.1
-12.1
0
0
12.0
0
0
0
0 -12.1
0
0
12.0
0
0
0
0
-12.1
0
0
12.0
0
0
0
0
-12.1
0.1
0.1
0
0
0
0
0
0.7
0
0
0
0
0.8
0.8
0.7
0.1
0.1
0.1
0.1
0.1
0.1
0
0
0.112.0
12.0-12.1
-12.1
0 0
0 0-12.1-12.1
A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V350/HTR-5730
SCHEMATIC DIAGRAM (FUNCTION 2/2)
54
All voltages are measured with a 10MΩ/V DC electronic volt meter. Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed. Schematic diagram is subject to change without notice.
POWER SUPPLY
IR REMOTE
FL DISPLAYDRIVER
FL DISPLAY
IC651: KIA7812PIIC653: KIA7805PIVoltage Regulator
R1
R2
R3
R4 R5 R6
R7
R8
Z1
Q12
Q13
Q18
Q17
Q14
Q19
Q10
Q8
Q16
INPUT
OUTPUT
COMMON (GND)
COMMON (GND)
Q15
Q11-1Q11
Q2
Q3
Q4
Q5 Q9
Q7
Q1Q6
R12R19
R10
R9
R15R14
R16
R21
R20
R22 R23R17
R13
R11R18
C1
1
3
2
IC652: KIA7912PIVoltage Regulator
Q28 Q17
Q18
Q19
Q20
Q31
Q23
Q21Q22 Q24
Q25
Q26 Q27
Q10
Q11
Q14Q15
Q16
Q27-1
Q26-1
Q12 Q13
Q8
Q9
Q2
Q7
Q4
Q5Q6
Q3
Q29
Q30
R0
R1
R2
R14 R17R19
R20
R21
R22
R23
R24
R25
R26
R3
R4 R5 R6
R10 R11
R12R13
D4
R9
R7R8
C2 C1
R16
R15 R18
1
OUTPUT
INPUT
3
2
52
Displaycontroller
Segmentdigit
select/outputcircuit
Serialreceivecircuit
Digit outputcircuit
Clockgenerator
G12
51 G13
50 G14
49
48
47 P38
46 P37
45 P36
XOUT 6
VDD 8
Vcc2 18
Vss 5
Vp 64
XIN 7
3
4
/RESET 1
P3544
9 P1
P917
19 P10Segmentoutputcircuit
Display codeRAM
(8-bit x 60)CGROM
(35 bit x 166)
CGROM(35 bit x 16)
codeselect
Codewrite
Code/command
control circuit
G163
53 G11
IC551: M66003-0101FPFL Display Driver
2 data
timingclock
dot datawrite
scan pulse
x: NOT USEDO: USED / APPLICABLE
Page 52to DSP
M7
Pag
e 56
to M
AIN
(1)H4
Pag
e 55
to M
AIN
(1)H3
FUNCTION (5)
FUNCTION (7)
FUNCTION (8)FUNCTION (9) FUNCTION (2) FUNCTION (4)
FUNCTION (10)
/CEFLCKFLDTFL
-24.3-26.2
-21.
7
-21.
7
-26.
3
-26.
2
-26.
3
-26.
3
-26.
3
-26.
3
-26.
3
-26.
1
-26.
3
-26.
3
-26.
3
-26.
3
-26.
3
-26.
3
-26.
0
-26.
0
-22.
4
-20.
6
-16.
7
-16.
5
-16.
5
-10.
9
-16.
7
-18.
4
-16.
7
-22.
3
-26.
2
-28.
1
-7.4
-22.
4
-26.
2
-20.
4
-26.
2
-6.9
-20.
2
-20.
4
-16.
6
-18.
6
-9.0
-16.
6
-24.
3
-22.
3
-26.
2
-7.0
-12.
8
-26.
2
-24.
3
-26.
3
-7.2
-18.
5
-9.0
-10.
9
-10.
9
-14.
6
-21.
7
-21.
7
-22.4
-7.4-28.1
-20.
4
-26.
2
-6.9
-20.
4
-16.
6-1
8.6
-9.0
-16.
6
-24.
3
-22.
3
-16.
2
-7.0
-12.
8
4.8
-26.
2
-26.
2
-26.
3
-26.
3
-26.
3
-26.
3
-26.
3-2
6.3
-26.
1
-26.
3
-26.
3
-26.
3
-26.
3
-26.
3
-26.
2
-26.
3
-28.
3
-20.
2
-26.2-22.3
-16.7
-18.4
-16.7
-10.9
-16.5
-16.5
-16.7
-20.6
-22.4
-26.2
-26.3
-7.2
-18.5
-9.0
-10.9
-10.9-14.7
4.8
4.84.8
-26.0-26.0
-26.2
-26.2
2.1
0
0
4.9
4.94.9
2.1
-7.2
4.8
-7.2
-7.4
4.8
-7.4
-14.7
4.8
-14.6
-20.2
4.8
-20.2
5.0 0 5.0
-22.2
-28.3
-22.2
-28.3
23.2
-23.9
12.1
-12.2
012.85.0
-0.1
-0.1
4.9
0
00
00
23.4
-24.0
6.5
6.5
13.1
0
0
0
AC 5.7
AC 36.3
AC 11.1
A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V350/HTR-5730SCHEMATIC DIAGRAM (MAIN 1/2)
55
POWER RELAY
SPEAKER RELAY
SPEAKER RELAY
RELAYDRIVE
RELAY DRIVE
RELAY DRIVE
SPEAKERRELAY
DETECT
MUTE
MUTE
DETECT
DETECT
DETECT
DETECT
DETECT
MUTE
CENTER POWER AMP
R CH POWER AMP
L CH POWER AMP
POWER SUPPLY
IC101: STK404-130YPower Amp.
1 2 3 4 5 6 7 8 9 10 11 12 13
Input Amp. DriverAmp.
PT1
C2
IN NF
C3
R4TR6
TR7
TR8R5
SUB
8
11
12
1
2
13
15
14
5 4 6 7910
IC102, 103: STK403-130YPower Amp.
PreDriverCH1
PreDriverCH2
Bias Circuit
SUB
3
x: NOT USEDO: USED / APPLICABLE
Pag
e 54
to F
UN
CT
ION
(10
)K
5
Pag
e 53
to F
UN
CT
ION
(1)
L7P
age
56to
MA
IN (
1) µ
-CO
M S
ectio
nD
3
MAIN (2)
MAIN (4)
MAIN (1) Power Section All voltages are measured with a 10MΩ/V DC electronic volt meter. Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed. Schematic diagram is subject to change without notice.
FRONT L
FRONT L
CENTER
CENTER
SURROUND L
SURROUND L
-12.1 0
0
-12.1 0
0
-47.
9
-49.
1
49.2 0 0 0 0 0 0 0 0 0 0
0.6
47.2
-12.10
0
-12.1
0
0
-47.
9
-49.
1
49.2 0 0 0 0 0 0 0 0 0 0
0.6
47.2
0.4 0
0.1
0.1 0
-47.
912
.0
-49.
1
49.2 0 0
1.1
49.2
0
0
0
0
0
0
0
49.1
48.9
47.2
0
0
0
5.0
0
48.9
0
0
48.9
0
0
0
47.2
48.9
47.8
47.8
29.1
0.7
47.246.0
0
0
01.146.6
48.9
0
46.6
0
0
48.9
-49.0
0
-0.3-0.3
0
-49.0
-47.9-48.7
-48.5
-49.0
-48.7
0
0
0
0
0
0
0
0
0
0
0
4.8 0
0
0
0
0
11.8
-12.0
-12.0
11.8
11.6
11.6
-12.0
-12.0
-12.0
11.7
-12.0
-28.4
-28.9
-28.9
0
-44.0
11.8
-12.0
0 11.9
11.8
11.6
11.8
11.7
0 0
-12.0
11.7
11.6
-12.0
0.7
0.1
0
0.1
13.0
49.2-49.1
0
0 AC 72.5
AC 13.3
A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V350/HTR-5730
SCHEMATIC DIAGRAM (MAIN 2/2)
56
All voltages are measured with a 10MΩ/V DC electronic volt meter. Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed. Schematic diagram is subject to change without notice.
FREQUENCY STEP
INPUTSELECTOR
MUTECONTROL
RDSDECODER
MICRO COMPUTER
POWER DETECTOR& RESET
LEVELSHIFT
Pag
e 54
to F
UN
CT
ION
(4)
H7
Pag
e 52 to D
SPG
1
IC241: LC72722PMRDS Signal Processor
REFERENCEVOLTAGE
57 kHzbpf
(SCF)
CCB
TEST
PLL(57 kHz)
ANTIALIASINGFILTER
SMOOTHINGFILTER
RAM(24 BLOCK DATA)
ERROR CORRECTION(SOFT DECISION)
SYNC / ECCONTROLLER
SYNCDETECT-1
DATADECODER
CLOCKRECOVERY(1187.5 Hz)
MEMORYCONTROL
OSC/DIVIDER
VREF
CLK (4.332 MHz)
SYNCDETECT-2
VDDA
VSSD
VDDD
RDS-ID
SYNC
SYR
VSSA
MPX IN
DOCLDI
CE
T1T2T3T4
T5
T6
T7
X IN
VR
EF
FL
OU
T
C IN
X O
UT
3 14
15
19
18
24
1 5 6
4
2
20
21
22
23
789
10
11 16 17 13 12
IC391: LA7956Video Switch
1 2 3 4 5 6 7 8 9VIDEOOUT
A B VIN1 GND VIN2 VCC VIN3 VIN4
DRIVER
6dBAMP
CONTROL 4 INPUT 1 OUTPUTVIDEO SWITCH
x: NOT USEDO: USED / APPLICABLE
Point 4 emitter of Q258 and collector of Q259
POWER ON(Connect the power cable)
POWER OFF(Disconnect the power cable)
A Q258 E
B Q259 C
Point 2 Pin 12 of IC241 Point 3 Pin 13 of IC242
Page 53to FUNCTION (1)
G1Page 55
to MAIN (1) Power SectionA7
Page 52to DSP
L7
MAIN (1) µ-COM Section
MAIN (3)
2
3
4
AB
12.04.9
5.6
0
5.1
12.0
2.2
0 0 0 0 4.9 4.9
1.7
2.2
4.4 0
2.2 0
0 0
1.9
5.7
5.6
4.8
0 4.8 4.8
4.8
0
0
4.9
11.7 0 0
4.8
4.2
4.94.9
13.4
13.4
13.4
6.8
0 0
0
0
0
4.8
13.4
13.3
7.4
0
5.6
6.2
5.6
6.2
5.6
5.05.6
4.9
0
0
0
0
0
0 0
4.8
1.1
00
0
1.1
0.4 0.4
0.8
4.9
4.9
4.9
4.9
5.10 0 0 0 0
0 0 0 0
4.9
4.8
4.8
4.9 0 0 4.904.9
0
4.94.8
4.8
1.1
0
0
1.1
4.80.4
0.4
00.8
4.8
4.9
4.8
04.8
4.70 4.9
0.3
0.1
4.9 0 0 4.7
4.9
4.8
2.4 0 2.3
4.9
4.9 0 0 5.0
4.9
0.4
4.9
4.9
0.4
4.94.9
4.9
4.9
0
0.9
0
0
0
0
0
0
4.9
0
0
11.7
12.1
4.8
-12.0
-12.30
0.1 0.7
4.9
4.8
-12.0 4.9
4.8
-12.0 4.9
4.8
-12.1 4.9
4.8
-12.1 4.9
12.1
5.56.9
3.9
3.9
12.0
3.9 0 3.9
4.8
4.8
6.2
0
6.36.36.3
7.2
0
57
RX-V350/HTR-5730RX-V350/HTR-5730
WARNING Components having special characteristics are marked s and must be replaced with parts having specifications equal to
those originally installed.
ABBREVIATIONS IN THIS LIST ARE AS FOLLOWS:
Note) Those parts marked with “#” are not included in the P.C.B. ass’y.
* IC451 X5092A00 IC BD3816K1IC452 X3505A00 IC NJM2068MD-TE2IC453 X3505A00 IC NJM2068MD-TE2IC454 X3505A00 IC NJM2068MD-TE2IC455 X3505A00 IC NJM2068MD-TE2IC456 X3505A00 IC NJM2068MD-TE2IC551 X2874A00 IC M66003-0101FP FLD
s IC651 X4153A00 IC KIA7812PIs IC652 X4154A00 IC KIA7912APIs IC653 X4928A00 IC KIA7805API 5V
* WC762300 P.C.B. MAIN UC* WC762400 P.C.B. MAIN R* WC762500 P.C.B. MAIN T* WC762600 P.C.B. MAIN K* WC762700 P.C.B. MAIN A* WC762800 P.C.B. MAIN BGE* WD043700 P.C.B. MAIN L
D411 VD631600 DIODE 1SS133,176* s F371 WB221200 FUSE T6A 125V UCRL* s F371 VV071700 FUSE TSD 3.15A 250V SEM TKABGE* s F371 WB221200 FUSE T6A 125V UCRL* s IC101 X5064A00 IC STK404-130Y 130W* s IC102 X5063A00 IC STK403-130Y 130W* s IC103 X5063A00 IC STK403-130Y 130W
IC241 X0082A00 IC LC72722PMIC241 X0082A00 IC LC72722PM BGE
* s 15 X5276A00 POWER TRANSFORMER UC* s 15 X5278A00 POWER TRANSFORMER RL* s 15 X5279A00 POWER TRANSFORMER TK* s 15 X5280A00 POWER TRANSFORMER A* s 15 X5277A00 POWER TRANSFORMER BGE* s 16 WB120500 POWER CABLE ME301P/TER UCs 16 WC992700 POWER CABLE 2m Rs 16 WB120600 POWER CABLE 2m Ts 16 WC753000 POWER CABLE 2m Ks 16 WC743700 POWER CABLE 2m A
New Parts
SchmRef. PART NO. Description Remarks Markets
s 16 WB212200 POWER CABLE 2m Bs 16 WB212300 POWER CABLE 2m GEL
17 V2438700 CORD STOPPER 10P123 MF115140 FLEXIBLE FLAT CABLE 15P 140mm P=1.25101 WA792200 TOP COVER GD101 WA791900 TOP COVER BL101 WA792000 TOP COVER SI