Web viewDEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING. Question bank. EE6303- Linear Integrated Circuits. PART A. UNIT

EE6303- LIC- QB-2MARKS

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

Question bank

EE6303- Linear Integrated Circuits

PART A

UNIT I

IC FABRICATION

Define an Integrated circuit.

An integrated circuit(IC) is a miniature, low cost electronic circuit consisting of active and passive

components fabricated together on a single crystal of silicon. The active components are transistors and

diodes and passive components are resistors and capacitors.

List out the steps used in the preparation of Si – wafers.

Crystal growth &doping

Ingot trimming & grinding

Ingot slicing

Wafer policing & etching

Wafer cleaning

Give the difference between monolithic and hybrid Ics.(Nov/Dec 2010)

Monolithic Integrated Circuits Hybrid Integrated Circuits

1.In Monolithic circuits, all circuit components

both active and passive elements and their

interconnections are manufactured into or on top of

a single chip of silicon.

2.It is used for more applications in Linear and

digital IC

3. Cost wise is less.

1.Hybrid Integrated circuits separated

component parts are attached to a ceramic

substrate and interconnected by means of

either metallization pattern or wire boards.

2.It is used for adopt less applications

What is lithography? (Nov/Dec 2010)

Lithography is a process by which the pattern appearing on the mask is transferred to the wafer. It

involves two steps: the first step requires applying a few drops of photo resist to the surface of the wafer &

the second step is spinning the surface to get an even coating of the photo resist across the surface of the

wafer.


What is the purpose of oxidation process in IC fabrication?(Apr/May 2010)

The silicon wafers are stacked up in a quartz boat & then inserted into quartz furnace tube. The Si

wafers are raised to a high temperature in the range of 950 to 1150oC & at the same time, exposed to a gas

containing O2 or H2O or both. The chemical action is

Si + 2H2O > Si O2+ 2H2

What is parasitic capacitance? (Apr/May 2010)

In electrical circuits, parasitic capacitance is an unavoidable and usually

unwanted capacitance that exists between the parts of an electronic component or circuit simply because of

their proximity to each other.

List the basic processes used in IC fabrication.(Nov/Dec2011)

1. Silicon wafer (substrate) preparation

2. Epitaxial growth

3. Oxidation

4. Photolithography

5. Diffusion

6. Ion implantation

7. Isolation technique

8. Metallization

9. Assembly processing & packaging

What is meant by ion implantation?(Nov/Dec 2011) (Nov/Dec 2012)

The conductivity of the semiconductor increases when small impurity is added to it. The process of

adding impurity is called doping while the impurity to de added is called dopant.so ion implantation is a

process of adding dopant to the silicon substrate. The ion implantation process is controllable, reproducible

and also there are no unwanted side effects

What is the significance of using buried layer?(May/June 2012)

In general bipolar integrated circuits use epitaxial layer process in which high resistivity epitaxial is

formed over a low resistivity substrate. To provide isolation between the epitaxial growth and the substrate, the

doping used in both layers is of opposite type. Due to this a heavily doped buried layer is formed. The buried

layer is also called diffusion layer.

What are the advantages of polysillicon gate MOSFET over aluminum gate?


The silicon film is of high quality and suitable for IC manufacturing. SOI provides a speed advantage

because the source/drain to body junction capacitance is practically eliminated because the junctions

extend vertically to the buried oxide. The cost of a SOI wafer is many times higher than an ordinary

silicon wafer and can increase the total

Fabrication cost of IC chips by ~30%.

Why inductors are difficult to fabricate in integrated circuits.(Nov/Dec 2012)(May/June 2013)

No satisfactory integrated inductors exist. If high Q inductors with inductance of values larger

than 5μH are required, they are usually supplied by a wound inductor which is connected externally to

the chip. Therefore, the use of inductors is normally avoided when integrated circuits are used.

List the advantages of integrated circuit over discrete component circuit.(May/june 2013)

Miniaturization[Small in Size]

High Equipment Density

Low cost[due to batch processing]

Highly reliable due to elimination of Soldered joints

Improved Functional performance[Complex circuits are fabricated easily]

Increased operating speeds[Absence of parasitic capacitance]

Matched devices

Low power consumption

Explain the process of oxidation.

The silicon wafers are stacked up in a quartz boat & then inserted into quartz furnace tube. The Si wafers

are raised to a high temperature in the range of 950 to 1150oC & at the same time, exposed to a gas

containing O2 or H2O or both.The chemical action is

Si + 2H2O -----------> Si O2+ 2H2

What are the two important properties of SiO2?

1.SiO2 is an extremely hard protective coatng & is unaffected by almost all reagents except by

hydrochloric acid. Thus it stands against any contamination.

2.By selective etching of SiO2 , diffusion of impurities through carefully defined windows in the

SiO2 can be accomplished to fabricate various components

Write the basic chemical reaction in the epitaxial growth process of pure silicon.

The basic chemical reaction in the epitaxial growth process of pure silicon is the hydrogen reduction

of silicon tetrachloride.

1200oC

SiCl4 + 2H2 <-----------> Si + 4 HCl


Mention the advantages of integrated circuits.

Miniaturization and hence increased equipment density.

Cost reduction due to batch processing.

Increased system reliability due to the elimination of soldered joints iv)

Improved functional performance.

Matched devices.

Increased operating speeds.

Reduction in power consumption.

UNIT-II

PART-A(Each 2 MARKS)

Give the ideal characteristics of operational amplifier and give its equivalent circuit

(Nov/Dec 2010) (Apr/May 2010)

(i ) Open loop gain infinite

(ii) Input impedance infinite

(iii) Output impedance low

(iv) Bandwidth infinite

(v) Zero offset, ie, Vo=0 when V1=V2=0

4.Design an amplifier with a gain of 10 and input resistance of 10 k

R1=10 K

Rf=-(-10)x10 K =100 K

Define slew rate and state its significance (Apr/May 2010)

The slew rate is defined as the maximum rate of change of output voltage caused by a step input voltage. An

ideal slew rate is infinite which means that op-amp’s output voltage should change instantaneously in

response to input step voltage.

Define input offset voltage.(Nov/Dec 2011)

It is the voltage that must be applied between the input terminals of an op-amp to nullify the output.

Since this voltage could be positive or negative its absolute value is listed on the data sheet.

List the four non ideal dc characteristics of opamp (May/June 2012)

1. Input impedance


2. Output impedance

3. Frequency response

4. Slew rate

8.Define CMRR (Nov/Dec 2012)

It is defined as the ratio of the differential voltage gain to common mode voltage gain.

CMRR= ρ = Ad/Ac

What is OPAMP?

An operational amplifier is a direct coupled high gain amplifier consisting of one or more differential

amplifiers, followed by a level translator and an output stage. It is a versatile device that can be used to

amplify ac as well as dc input signals & designed for computing mathematical functions such as

addition, subtraction, multiplication, integration and differentiation.

Mention the frequency compensation methods.

1. Dominant-pole compensation

2. Pole-zero compensation.

Define Differential gain.

The gain with which differential amplifier amplifies the difference between two input signals, is called

differential gain (Ad).

12.What are the D.C Characteristics of Op-amp?

1. Input Bias current.

2. Input offset current.

3. Input offset voltage.

4. Thermal Drift.

UNIT-III

PART- (Each 2 Marks)

Draw the circuit diagram of an op-amp positive clipper. (Nov/Dec 2010)


2.What is the fastest ADC and why? (Nov/Dec 2010)

The circuit of successive approximation ADC consists of a successive approximation register (SAR), to

find the required value of each bit by trial & error. With the arrival of START command, SAR sets the

MSB bit to 1. The O/P is converted into an analog signal & it is compared with I/P signal. This O/P

is low or high. This process continues until all bits are checked.

3.Define slew rate and state its significance (Apr/May 2010)

The circuit of successive approximation ADC consists of a successive approximation register (SAR), to find

the required value of each bit by trial & error. With the arrival of START command, SAR sets the MSB bit

to 1. The O/P is converted into an analog signal & it is compared with I/P signal. This O/P is low or high.

This process continues until all bits are checked.

What is parasitic capacitance? (Apr/May 2010)

In electrical circuits, parasitic capacitance is an unavoidable and usually unwanted

capacitance that exists between the parts of an electronic component or circuit simply because of their

proximity to each other.

5.An 8 bit DAC has a resolution of 20mV/bit.what is the analog output voltage for the digital

input code 00010110(the MSB is the left most bit)?.(Apr/May 2010)

The output voltage for input 00010110 is

=20 0 28 0 27 0 26 1 25 0 24 1 23 1 22 0 21

=20 44

=880 mV

Draw the circuit of first order active filter.(Nov/Dec 2011)


Draw the circuit of sample and hold circuit.(Nov/Dec 2011) Ans:

8. Draw the circuit of I-V converter using op-amp.(May/June 2012) Ans:

9. Define monotonicity with respect to data converters.(May/June 2012)

The resolution of a converter is the smallest change in voltage which may be produced at the output or

input of the converter.

Resolution (in volts) = VFS/2n-1=1 LSB increment. The resolution of an ADC is defined as the smallest

change in analog input for a one-bit change at the output.

10.What are the applications of peak detector.(Nov/Dec 2012) Ans:

1. Directional couplers to measure forward and reflected power on a transmission line (it is the original

application of this circuit);

2. Low power wattmeter’s

3. RF mill voltmeters

4. Field strength meters

5. Radio receivers

11.Why active filters are preferred.(Nov/Dec 2012) Ans:

Gain & Frequency adjustment flexibility: Since op-amp provides some gain, input signal is not

attenuated. Active filters are easier to time or adjust.

2. No Loading Problem: Because of high i/p impedance & low o/p impedance of Op- amp, active

filters does not cause loading of source or load.

3. Cost: Active filters are more economical, because of cheaper op-amps and absence of inductors.

12.List the applications of analog multipliers.(May/June 2013)

1. Analog computer

2. Analog signal processing

3. Automatic gain control

4. True RMS converter


5. Analog filter (especially voltage-controlled filters)

UNIT-IV

PART-A (Each 2 Marks)

1. List the applications of NE565. (Nov/Dec2010)

. Frequency multiplier

FM Demodulator is the applications of NE565.

2. Draw the relation between capture range and lock range relationship in PLL

(Nov/Dec2010)

3. Draw the pin diagram of IC555 timer (April/May2010)

4. Mention any two applications of multiplier (April/May2010)

The multiplier is used for

1. Frequency shifting

2. Voltage divider

5. Define the capture range of PLL (Nov/Dec2011)

The range of frequencies over which the PLL can acquire lock with an input signal is called the capture

range. It is also expressed as a percentage of fo.

6. What are the one, two and four quadrant multiplier (Nov/Dec2011)


In one quadrant multiplier the polarities of both the inputs must always be positive.

A two quadrant multiplier functions properly if one input is held positive and the other is allowed to swing in

both positive and negative.

If both the inputs are allowed to swing in both positive and negative directions, the operation is four

quadrant multiplier operations.

7. In what way VCO is different from other oscillator (May/June 2012)

1. To adjust the output frequency to match (or perhaps be some exact multiple of) an accurate

external reference.

2. Where the oscillator drives equipment that may generate radio-frequency interference, adding a

varying voltage to its control input can disperse the interference spectrum to make it less

objectionable. See spread spectrum clock.

8. Mention any two application of IC555 timer in mono stable mode (May/June 2012)

The applications of IC555 timer in mono stable mode are

1. Frequency divider

2. Pulse width modulation

9. In a astable multivibrater using 555 timer RA=6.8K , RB=3.3K ,C=0.1 F calculate

the free running frequency.(Nov/Dec 2012) Ans:

f 1.45

RA RB C

f 1.45

6.8K 23.3K 0.1 F

f 1.07 F

10. Why the VCO is called voltage to frequency converter (Nov/Dec 2012)

The VCO provides the linear relationship between the applied voltage and the oscillation

EE 6303 LIC 2013 QB 16 MARKS

frequency. Applied voltage is called control voltage. The control of frequency with the help of

control voltage is also called voltage to frequency conversion. Hence VCO is also called

voltage to frequency converter.

11. Define the terms relation to DAC (May/June

2013)

settling time

It represents the time it takes for the output to settle within a specified band+-(1/2) LSB of its

final value. It depends upon the switching time of the logic circuitry due to internal parasitic

capacitances and inductances. Settling time ranges from 100ns to 10μs depending on word

length and type of circuit used.

conversion time

It is the time taken for the D/A converter to produce the analog output for the given binary

input signal. It depends on the response time of switches and the output of the

Amplifier. D/A converters speed can be defined by this parameter. It is also called as setting

time.

12. what is function voltage regulator (May/June

2013)

A regulator circuit is a circuit used after the filter, which not only makes the dc

voltagesmooth and almost ripple free but also keeps the dc output voltage constant though

input dc

voltage varies under certain condition. Thus input to a regulator is an unregulated dc

voltage while the output of a regulator is a regulated dc voltage, to which the load is connected.

UNIT-

V

PART-A (Each 2

Marks)

1. How will you increase the output of a general purpose op-amp? (Nov/Dec2010)

A simple method of increasing the output current of a general purpose op-amp is to

connect a power booster circuit in series with the op-amp.


2. Using LM380 draw the circuit for

audio power amplifier.

(Nov/Dec2010)

3.List the important parts of regulated power supply. (April/May2010)

1. Reference voltage circuit

2. Error amplifier

3. Series pass transistor

4.Feedback network

4. What are the advantages of a switch mode power supplies. (April/May2010)

1. Smaller size

2. Lighter weight (from the elimination of low frequency transformers which have a

high weight)

3. Lower heat generation due to higher efficiency.

5. What are the disadvantages of linear voltage regulators? (Nov/Dec2011)

The input step down transformer is bulky and expensive because of low line frequency.

Because of low line frequency, large values of filter capacitors are required to decrease

the ripple. Efficiency is reduced due to the continuous power dissipation by the transistor as

it operates in the linear region.

6. What is isolation amplifier?(Nov/Dec2011)

(Nov/Dec2012)

Isolation amplifiers provide electrical isolation and an electrical safety barrier. They protect

data acquisition components from common mode voltages, which are potential differences

between instrument ground and signal ground. Instruments that are applied in the presence of a


common mode voltage without an isolation barrier allow ground currents to circulate, leading

in the best case to a noisy representation of the signal under investigation.

7. Why do switching regulators have better efficiency then series regulators?(May/June

2012)

In switching regulators, the transistor is operated in cut off region or saturation region. In cut

off region, there is no current and hence power dissipation is almost zero. In the saturation

region there is negligible voltage drop across it hence the power dissipation is almost zero.

8. What is an optocoupler?(May/June 2012)

The combined package of a LED and a photodiode is called an optocoupler.It is also called

an optoisolator or an optically coupled isolator.

9. Name the various protection circuits used for voltage regulators. (Nov/Dec

2012)

1. Constant current limiting

2. Fold back current limiting

3. Over voltage prodection

4. Thermal prodection

10. What is the principle of switch mode power supplies. (May/June 2013)

A switched-mode power supply (switching-mode power supply, SMPS, or switcher) is

anelectronic power supply that incorporates a switching regulator to convert

electrical power efficiently. Like other power supplies, an SMPS transfer’s power from

a source, like mains power, the pass transistor of a switching-mode supply continually

switches between low-dissipation, full-on and full-off states, and spends very little time in the

high dissipation transitions, which minimizes wasted energy. Ideally, a switched-mode power

supply dissipates no power.

11. How many resistors are required in a 12-bit weighted resistor DAC (May/June

2013)

This particular converter is a 4 -bit R - 2 R r e s i s t o r ladder network and it differs

from the DAC circuit shown in Fig. 10.9 in that it requires only two precision

resistance values ( R and 2R). The digital input to the DAC is a 4 -bit binary number

represented by bits Q 0 , Q1 , Q 2 , and Q. wher e Qo is the LSB and Q3 is the MSB.


Each bit in the circuit con trol s a switch between ground and the inverting input of the

op -amp.

PART-B(16 MARKS)

1. Write short notes on IC classification (8MARK)

On the Basis of Fabrication Techniques

Monolithic IC’s

Thick & Thin film.

Hybrid or Multi-chip IC’s

On the Basis of Chip Size, IC’s are classified as SSI, MSI, LSI, VLSI, ULSI,

GSI. The area of Chip ranges from 1mm2 for SSI chip to 1cm2 for LSI chip

On the Basis of Application, IC’s are classified into

Linear IC

Digital IC

2. With neat diagram explain the steps involved in the fabrication of the circuit using IC

technology.(16) (or)

Write notes on (i) Epitaxial growth (8) (ii) Masking & Etching Process (8)

OR

Write notes on (i) Ion Implantation (8) (ii) Metallization (8)

The basic planar processes is used to fabricate ICs using Silicon planar technology, it can be

categorized as follows:

1. Silicon wafer preparation

2. Epitaxial growth

3. Oxidation

4. Photolithography

5. Diffusion

6. Ion Implantation

7. Metallization

8. Assembly processing & packaging.

SILICON WAFER PREPARATION

The following steps are used in the preparation of Si-wafers

1. Crystal growth and doping

2. Ingot trimming and grinding


3. Ingot Slicing

4. Wafer polishing & etching

5. Wafer cleaning

The starting material for crystal growth is highly purified polycrystalline silicon.

The Czochralski crystal growth process is most often used for

producing single crystal silicon ingots.

EPITAXIAL GROWTH

‘epi’ – upon & ‘teinon’ – arranged i.e.,”Epitaxy may be defined as arranging atoms in

single crystal fashion upon a single crystal substrate.

The basic chemical reaction used for the epitaxial growth of pure silicon is the

“Hydrogen reduction of Silicon tetrachloride”.

SiCl4 + 2H2 12000C Si + 4HCL

OXIDATION

The process of growing Oxide layer over epitaxial layer at high temperature is called

oxidation process.

The chemical reaction is Si + 2 H2O SiO2 + 2H2

Thus SiO2 layer is formed and thickness of this oxide layer is usually 0.02 to 2µm.

The SiO2 layer serve as

1. Hard protective coating

2. To form windows such that fabrication of various components are

fulfilled.


PHOTOLITHOGRAPHY

It is the process of producing microscopically small circuit and device patterns on silicon wafers

The photolithography involves two processes namely

1. Making of a photographic mask

2. Photo etching

The making of a photographic mask involves

1. Preparation of initial artwork

2. Its reduction

This artwork is usually produced on a precision drafting

machine known as Coordinatograph.

PHOTOETCHING is the process of removal of SiO2 from desired regions so that the desired

impurities can be diffused.

The wafer is coated with a film of photosensitive emulsion called Kodak photo-resist

[KPR].

DIFFUSION

It is the process of introducing impurities in the silicon chip.

In the diffusion process, a quartz boat containing 20 cleaned wafers is pushed into the

hot zone with 10000c.

Impurities as B2O3, BCl3 are used for boron, P2O5, PoCl3 are used for phosphorous.

The depth of diffusion depends upon the time of diffusion[ 2 hours]

ION IMPLANTATION

It is also one of the process of introducing impurities into the silicon wafer.

In Ion Implantation process the silicon wafers are placed in a vacuum chamber and

scanned by a beam of dopant ions[ p type-

boron, n type- phosphorous]

The ions are accelerated by the energy

between 20kv to 250 kv.

ISOLATION TECHNIQUES

1. P-N junction isolation

2. Dielectric isolation

P-N JUNCTION ISOLATION


DIELECTRIC ISOLATION

It is the process of providing isolation between

components both electrically and physically.

The isolating dielectric [SiO2 or ruby] is very thick

so that the parasitic capacitance is neglected.

This method requires additional fabrication steps

& it becomes more expensive.

METALLIZATION

It is the process of producing a thin metal film layer to make

interconnections of the various components on the chip.

The Aluminium is usually used for the metallization of ICs, Since it has

the following advantages

1. Good conductor

2. Easy to deposit aluminium films using vacuum

deposition

3. It makes good mechanical bonds with silicon

4. It forms Ohmic contact with p & n type silicon

ASSEMBLY PROCESSING AND PACKAGING

After separation, it undergoes one of the three packaging configuration

1. Metal can package

2. Ceramic flat package

3. Dual in line package

The general purpose ICs are dual in line due to economy whereas ceramic package are

expensive.


3. Explain how transistors can be fabricated. (16)

In integrated transistor(NPN), the collector contact is at the top whereas in discrete

transistor the collector contact is at the bottom

This integrated structure makes the transistor poorer

than discrete transistor in two ways

1. Collector contact path increases & thus

collector series resistance also increases.

2. Additional parasitic capacitance appears

between collector and substrate

PNP transistor

There are three ways to fabricate integrated type PNP

transistor. They are

1. Vertical or substrate PNP

2. Lateral PNP

3. Triple diffused PNP

1) Vertical or Substrate PNP Transistor

The P type substrate acts as collector [P]

The n type epitaxial layer act as base [N]

The diffused P type layer act as emitter [P]

The main drawback of this type is that, the substrate is to be held at the most negative potential

for providing good isolation.

2) Lateral PNP transistor

This is the most common integration type of PNP transistor.

The N-type epitaxial layer is used as the base [N].

Two adjacent P-regions are diffused to form emitter [P] and collector [P].

3) Triple diffused PNP transistor

An extra P type diffusion is added after N type diffusion. So that we can obtain both PNP

and NPN transistor. This is known as triple diffused PNP transistor.

This requires additional fabrication & series design considerations.


4. Explain how monolithic diodes are fabricated

The diodes as integrated circuit is most widely used in digital applications

1) Various diode structures:

There are five different connections by which the transistor can be used as diode. They are as

follows

Fig 1.19 Cross section of various diode

Diode (a) – it have low storage time and low forward voltage drop. Hence it is useful for

getting high speed

Diode (b), (c) – it is stored charge device hence it gives high speed turn off.

Diode(c), (e) – it has high breakdown voltage.

2) Schottky Barrier diode:

.

5. Explain how integrated resistors are fabricated

There are four different methods available for fabricating integrated resistors

Diffused Resistor

Epitaxial Resistor

Pinched Resistor

Thin film Resistor


Diffused resistor:

Diffused resistors are resistors that are fabricated through P-type diffusion into an N-type

background.

Most resistors are formed during Base diffusion of the integrated transistor.

very economical.

Consider the square L * L of resistivity ρ, thickness t and cross sectional area A=L* t

The sheet resistance Rs= ρL/Lt = ρ/t

diffusion characteristics

The resistance in terms of Rs is R= ρL/wt = Rs L/w where L/w=aspect ratio

The base resistors [200Ω/square] are in the range of 20Ω to 300Ω. This is due

to the medium resistivity P-type base region

The emitter resistivity[5Ω/square] are in the range of 10Ω to 1kΩ

The value of resistance depends upon the surface geometry i.e., Length (L), width

(W), Sheet resistance (Rs).

Epitaxial resistor:

The Sheet resistance in the order of 1-10kΩ/square is achieved.

Pinched resistor:

In pinched resistor, a special technique is used to achieve high value sheet resistance from the

base diffused resistor.

“The resistivity of semiconductor region can be increased by reducing its cross sectional area”

[Since Rs= ρL/Lt]

.

Thin film resistor:

In thin film resistor, Vapour thin film deposition technique is used.

A very thin metallic film usually Nichrome is deposited on SiO2 layer.

Then the ohmic contacts are made using Aluminium metallization.

Nichrome resistors are available with typical sheet resistance value of 40 to

400Ω/square depending upon film thickness so that resistance in the range of

20 to 50kΩ can be obtained.


6. Explain how monolithic capacitors are fabricated

There are two methods used to obtain integrated capacitors

i. Junction capacitor

ii. MOS and Thin film capacitor

1. Junction capacitor:

It is possible to use the junction capacitance of a reverse biased diode as an

element in monolithic IC.

2. MOS capacitor

It is a parallel plate capacitor with SiO2 as dielectric.

SiO2 layer act as a Dielectric.

In order to obtain high value of capacitance silicon nitride [Si3N4] is used as

dielectric.

3. Thin film capacitor

It uses thin dielectric film layer between two metal layers.

Advantage – it eliminates substrate parasitic capacitance.

Disadvantage – additional masking & deposition steps.

Metal plates may be Aluminium or Tantalum.

Dielectric may be Aluminium oxide[Al2O3] or Tantalum Oxide[Ta2O3]


7. Explain the process of fabrication of FET

In N- channel JFET, the N-channel is formed by the epitaxial layer which forms

collector of transistor. This layer is used for source & drain fabrication.

The P+ layer formed in the N-channel by the process of diffusion or ion implantation forms the

gate.

The N+ layer formed under drain & source to provide good Ohmic contact.

8. Explain the MOSFET fabrication process

In this type, the source and drain is formed by Ion Implantation & not by Epitaxial

growth.

In this type of fabrication the metallic gate is separated from the semiconductor

channel by insulating SiO2 layer. This SiO2 layer gives high resistance for Mosfet.

N

N+ P+ N+

Source Gate

Dra

in


9. Explain the steps for fabricating the following circuit

STEP 1: WAFER PREPARATION

The wafers are prepared by means of Czochralski crystal growth process. This P-

type Silicon Wafer act as Substrate layer for the IC.

The wafers are usually of 10-cm diameter and 0.4 mm (~ 400 mm) thickness.

STEP 2: EPITAXIAL GROWTH

This as an N-type (epitaxial) layer formed over the P-type Substrate.

It is formed by Hydrogen reduction of Silicon tetra chloride.

All active and passive components are fabricated within this layer.

This layer becomes the collector region of the transistor, or an element of the

diode and diffused capacitor associated with the circuit.

STEP 3: OXIDATION

This is the third layer in which SiO2 is formed in order to provide hard protective

coating and prevents the diffusion of impurities.

This layer is formed over n-type epitaxial layer.

The thickness of this SiO2 layer is 0.02 to 2 mm.


STEP 4: ISOLATION DIFFUSION

In the given circuit, there are four components (capacitor, diode, NPN Transistor,

Resistor). Hence we need four Islands. For this SiO2 is removed in five different

places using Photolithography.

Now it undergoes P-N junction isolation technique for a long time so that the P-

type impurities reach P type Substrate.

One by-product of this process is the presence of transition capacitance.

STEP 5: BASE DIFFUSION

A new SiO2 layer is formed and new openings are formed using

Photolithography.

The P-type impurities such as Boron are diffused into n-type epitaxial layer.

The depth of penetration is controlled such that the p-type impurity does not

penetrate into the p-type substrate.

This diffusion process is utilized to form

Base region of Transistor

Resistor

Anode of diode

Junction capacitor


STEP 6: EMITTER DIFFUSION

A new SiO2 layer is again formed and new openings are formed using

Photolithography.

The N-type impurities such as Phosphorous are diffused into p-type layer.

Windows W1, W2 are etched into n- region where contacts are made to the n-type

Epitaxial layer.

Thus all the components are fabricated and the IC chip is complete.

STEP 7: ALUMINIUM METALLIZATION

In this step, interconnections between various components have to be made as per

the circuit diagram.

A new SiO2 layer is again formed and new openings for metal contacts are

formed using Photolithography.

Now the thin coating of Aluminium is deposited over entire surface using

Vacuum Deposition technique.

The undesired

Aluminium areas are etched

away and finally form the

interconnections between

Capacitor, Diode, Transistor,

and Resistor as shown in the

figure.

Thus the given circuit is fabricated to a monolithic form as per the above mentioned steps.

Similarly large number of circuits can be fabricated to their respective monolithic IC form.


UNIT II

CHARACTERISTICS OF OPERATIONAL AMPLIFIER

1. Explain the open loop and closed loop configurations of op-amp

OPEN LOOP OPERATION OF OP-AMP

In this mode the op-amp functions as a high gain amplifier.

Since the gain is infinite, the output voltage is either at its positive saturation

voltage (+Vsat) as V1>V2 or at negative saturation voltage (-Vsat) as V2>V1

Thus it is possible to operate in two state(+Vsat & -Vsat) only.


Hence op-amp in open loop acts as a Switch.

This has the limited number of application such as Comparator, Zero crossing

detectors.

The open loop configuration is not used for Linear applications.

CLOSED LOOP OPERATION OF OP-AMP

.A closed loop amplifier can be represented by two blocks one for an OPAMP and other for a

feedback circuits. There are four following ways to connect these blocks.

These connections are classified according to whether the voltage or current is

feedback to the input in series or in parallel:

Voltage – series feedback

Voltage – shunt feedback

Current – series feedback

Current – shunt feedback


VOLTAGE SERIES FEEDBACK

It is also called non-inverting voltage feedback

circuit.

The op-amp is represented by its symbol including its

large signal voltage gain Ad or A, and the feedback

circuit is composed of two resistors R1 and Rf.

The feedback voltage always opposes the input voltage, (or is out of phase by

180° with respect to input voltage), hence the feedback is said to be negative.

The closed loop voltage gain is given by

The product A and B is called loop gain. The gain loop gain is very large such

that AB >> 1


This shows that overall voltage gain of the circuit equals the reciprocal of B, the

feedback gain.

It means that closed loop gain is no longer dependent on the gain of the op-amp,

but depends on the feedback of the voltage divider.

The feedback gain B can be precisely controlled and it is independent of the

amplifier.

Different Input voltage is ideally zero.

Again considering the voltage equation,

vO = Ad vd

or vd = vO / Ad

Since Ad is very large (ideally infinite)

vd » 0.

and v1 = v2 (ideal).

This says, that the voltage at non-inverting input terminal of an op-amp is

approximately equal to that at the inverting input terminal provided that Ad is

very large.

This concept is useful in the analysis of closed loop OPAMP circuits. For

example, ideal closed loop voltage again can be obtained using the results


2. Explain the operation of Inverting and Non inverting amplifier

INVERTING AMPLIFIER

In this Inverting Amplifier circuit the operational amplifier is connected with

feedback to produce a closed loop operation.

For ideal op-amps there are two very important rules to remember about inverting

amplifiers, these are: "no current flows into the input terminal" and that "V1

equals V2", (in real world op-amps both of these rules are broken).

No Current Flows into the Input Terminals

The Differential Input Voltage is Zero as V1 = V2 = 0 (Virtual Earth)

Current ( i ) flows through the resistor network as shown.


Then, the Closed-Loop Voltage Gain of an Inverting Amplifier is given as.

and this can be transposed to give Vout as:

NON INVERTING AMPLIFIER

In this configuration, the input voltage signal, ( Vin ) is applied directly to the

non-inverting ( + ) input terminal which means that the output gain of the

amplifier becomes "Positive" in value in contrast to the "Inverting Amplifier"

Feedback control of the non-inverting amplifier is achieved by applying a small

part of the output voltage signal back to the inverting (-) input terminal through an

Rƒ - R2 voltage divider network, again producing negative feedback.

In the Inverting Amplifier, we said that "no current flows into the input" of the

amplifier and that "V1 equals V2". This was because the junction of the input and

feedback signal(V1) are at the same potential.

Equivalent Potential Divider Network


Then the closed loop voltage gain of a Non-inverting Amplifier is given as:

3. Explain the following terms in an OP-AMP.

Bias current (4) Thermal drift (4) Input offset voltage and current (4)

Thermal drift (4)

DC CHARACTERISTICS

1. Input bias current

2. Input offset current

3. Input offset voltage

4. Thermal drift

INPUT BIAS CURRENT

In an ideal op-amp it is assumed that no current is drawn from the input terminals.

However practically, input terminals conduct small value of dc current to bias the

input transistors.

The Manufacturers specify the input bias current as “ the average value of the

base currents entering into the terminals of the op-amp” IB=(IB+ + IB-)/2

Consider the basic inverting amplifier. If the input voltage is zero then the output

voltage should also be zero. Instead the output voltage offset by V0=(IB-)Rf


Derivation of Rcomp

When Rcomp is added V1= IB+ Rcomp

IB+ =V1/ Rcomp

The node a is at –V1 since Vin =0

Therefore I1=V1/R1 & I2= V2/Rf

W.K.T V0=V2-V1, for compensation V0 should be zero i.e., V1=V2

Thus I2=V1/Rf

KCL at node a IB- =I2+I1

Assume IB- =IB+ we get Rcomp=R1Rf/(R1+Rf) = R1||Rf

Thus the Bias current compensation will work only if IB- =IB+

INPUT OFFSET CURRENT (Ios)

The input transistors cannot be made identical, hence there will be small

difference between IB- =IB+. This difference between Bias voltages is called Input

offset current. |Ios| = IB+ -IB-

Ios for BJT opamp is 200nA

Ios for FET opamp is pA

Even with bias current compensation, it is found that V0=IosRf

For 741 opamp with Ios =200nA & Rf=1MΩ, V0=200mv

This effect of Ios can be compensated with T feedback Network.

INPUT OFFSET VOLTAGE (Vos)


Even after using the compensation techniques like Rcomp & T feedback, it is

found that the output voltage is non-zero. This is due to unavoidable imbalance

inside the opamp.

A small voltage may be applied at the input terminals to make the output voltage

zero. This voltage is called Vos

Vo=(1+(Rf/R1)) V2

W.K.T Vos=|V1-V2|=|0-V2|=V2

Vos=V2

Thus Vo=(1+(Rf/R1)) Vos

Total offset voltage without compensation is VoT= (1+Rf/R1)Vos + RfIB

Total offset voltage with Rcomp is VoT=(1+Rf/R1)Vos + RfIos

THERMAL DRIFT

Bias current, Offset current, Offset voltage changes with temperature.

A circuit carefully nulled at 250C may not remain same at 350C. This is called

thermal drift

Measures to avoid thermal drift

1. Use carefully printed board layout

2. Forced air cooling may be used.

4. List the ACcharacters tics of op- amp and define each of them

The new problem for the AC amplifier is

i. Frequency response

ii. Slew rate

FREQUENCY RESPONSE

It refers to the variation of voltage gain as the frequency changes. This is

displayed by plotting voltage gain versus frequency.


Ideally op-amp should have infinite bandwidth but practically op-amp

gain decreases at higher frequency

Consider the High frequency model of op-amp

Note that there is capacitive component in the equivalent circuit due to the physical

characteristics of the device

The high frequency model is the modified version of low frequency model with capacitor

at the output.

Hence there is one pole due to R0C and one -20 dB/decade roll-off comes into effect.

Thus the open loop voltage gain of an op-amp with only one corner

frequency is obtained as

F1 is the corner frequency of op-amp

A is the open loop voltage gain as a function of frequency

A0 is the voltage gain at 0 Hz

The magnitude and phase angle of the open loop voltage gain can

be written as

MAGNITUDE & PHASE CHARACTERISTICS


i. For Frequency f<<f1, the magnitude of gain is 20 log AOL & Phase angle is zero

ii. At f-f1, the gain is 3db down from DC value of AOL & the phase angle is -45

(lagging)

iii. For f>>f1, the gain rolls off at -20dB/decade & the phase angle id -90

Thus Maximum of 90 degree phase change can occur in an op-amp with Single capacitor.

A Practical opamp, however has number of stages & each stage produces

capacitive component.

The Transfer function of an opamp with three break frequencies is

Similarly each pole pair introduces lagging phase up to -90 degree.

SLEW RATE

It is defined as the Maximum rate of change of output voltage caused

by a step input voltage and it is usually specified in V/µs.

Slew rate (SR) = dVC/dt or ΔV/Δt

An op-amps Slew rate is related to its frequency response. The op-amp

with wide Band width have better slew rate.

The Slew rate is also the function of temperature that decrases with an

increase in temperature.

The ideal response time should be zero as Bandwidth is infinity. i.e.,

output voltage should respond instantaneously to any change in input.


Effect of Slew rate for Sine wave

Hence the maximum rate of change of Vs depends both its frequency &

peak amplitude

For a general purpose opamp, the maximum slew rate is 0.5 V/µs

5. Explain the operation of Summer.

SUMMING AMPLIFIER

The Summing Amplifier is a very flexible circuit based upon the standard

Inverting Operational Amplifier configuration that can be used for combining

multiple inputs.

We know that the inverting amplifier has a single input voltage, ( Vin ) applied to

the inverting input terminal. If we add more input resistors to the input, each equal

in value to the original input resistor, Rin we end up with another operational

amplifier circuit called a Summing Amplifier, "summing inverter" or even a

"voltage adder" circuit as shown below.


Summing Amplifier Circuit

The output voltage, ( Vout ) now becomes proportional to the sum of the input

voltages, V1, V2, V3 etc.

Then we can modify the original equation for the inverting amplifier to take

account of these new inputs thus:

However, if all the input impedances, ( Rin ) are equal in value, we can simplify the above

equation to give an output voltage of:

Now operational amplifier circuit will amplify each individual input voltage and

produce an output voltage signal that is proportional to the algebraic "SUM" of

the three individual input voltages V1, V2 and V3.

A Scaling Summing Amplifier can be made if the individual input resistors

are "NOT" equal. Then the equation would have to be modified to:


6. a. Draw the circuit of differential amplifier and derive the expression for output voltage in

it. (8)

b. With neat diagram explain the working of an OP-AMP base integrator. (8)

The differential amplifiers amplifies the difference between two voltages making

this type of operational amplifier circuit a Subtractor unlike a summing amplifier

which adds or sums together the input voltages.

This type of operational amplifier circuit is commonly known as a Differential

Amplifier configuration and is shown below:

Differential Amplifier

By connecting each input in turn to 0v ground we can use superposition to solve

for the output voltage Vout. Then the transfer function for a Differential

Amplifier circuit is given as:


When resistors, R1 = R2 and R3 = R4 the above transfer function for the

differential amplifier can be simplified to the following expression:

If all the resistors are all of the same ohmic value, that is: R1 = R2 = R3 = R4 then the circuit

will become a Unity Gain Differential Amplifier and the voltage gain of the amplifier will

be exactly one or unity.

Then the output expression would simply be Vout = V2 - V1. Also note that if input V1 is

higher than input V2 the ouput voltage sum will be negative, and if V2 is higher than V1, the

output voltage sum will be positive.


Integrator

The Op-amp Integrator is an operational amplifier circuit that performs the

mathematical operation of Integration that is we can cause the output to respond to changes

in the input voltage over time.

The integrator amplifier acts like a storage element that "produces a voltage output which

is proportional to the integral of its input voltage with respect to time".

If we apply a constantly changing input signal such as a square wave to the input of an

Integrator Amplifier then the capacitor will charge and discharge in response to changes in

the input signal. This results in the output signal being that of a sawtooth waveform whose

frequency is dependant upon the RC time constant of the resistor/capacitor combination.

This type of circuit is also known as a Ramp Generator and the transfer function is given

below.

-Vout = Q/C.

If the capacitor is charging and discharging, the rate of charge of voltage across the capacitor

is given as:


But dQ/dt is electric current and since the node voltage of the integrating op-amp at its

inverting input terminal is zero, X = 0, the input current I(in) flowing through the input

resistor, Rin is given as:

The current flowing through the feedback capacitor C is given as:

ssuming that the input impedance of the op-amp is infinite (ideal op-amp), no current

flows into the op-amp terminal. Therefore, the nodal equation at the inverting input

terminal is given as:

From which we derive an ideal voltage output for the OP-amp Integrator as:


Where ω = 2πƒ and the output voltage Vout is a constant 1/RC times the integral of

the input voltage Vin with respect to time. The minus sign ( - ) indicates a 180o phase

shift because the input signal is connected directly to the inverting input terminal of

the op-amp..

The AC Op-amp Integrator with DC Gain Control

the basis of a Active Low Pass Filter as seen before in the filters section tutorials with a

corner frequency given as.

7. Briefly discuss about differentiator

The basic Op-amp Differentiator circuit is the exact opposite to that of the

Integrator operational amplifier circuit.

This circuit performs the mathematical operation of Differentiation, that is it

"produces a voltage output which is directly proportional to the input voltage's

rate-of-change with respect to time".

In other words the faster or larger the change to the input voltage signal, the

greater the input current, the greater will be the output voltage change in response,

becoming more of a "spike" in shape.


As with the integrator circuit, we have a resistor and capacitor forming an RC

Network across the operational amplifier and the reactance ( Xc ) of the capacitor

plays a major role in the performance of a Op-amp Differentiator.

Since the node voltage of the operational amplifier at its inverting input terminal is zero,

the current, i flowing through the capacitor will be given as:

The charge on the capacitor equals Capacitance x Voltage across the capacitor

The rate of change of this charge is

but dQ/dt is the capacitor current i

from which we have an ideal voltage output for the op-amp differentiator is given as:


Therefore, the output voltage Vout is a constant -Rƒ.C times the derivative of the

input voltage Vin with respect to time.

The minus sign indicates a 180o phase shift because the input signal is connected

to the inverting input terminal of the operational amplifier.

This is because the output is proportional to the slope of the input voltage so some

means of limiting the bandwidth in order to achieve closed-loop stability is

required

Op-amp Differentiator Waveforms

8. Explain the frequency compensation techniques of OP-AMP. (16)

Need for frequency compensation in practical op-amps:

Frequency compensation is needed when large bandwidth and lower

closed loop gain is desired.

Compensating networks are used to control the phase shift and hence to

improve the stability

Frequency compensation methods:

• Dominant- pole compensation

• Pole- zero compensation


UNIT 3

APPLICATIONS OF OPAMP

Briefly explain Instrumentation amplifier

o It is necessary to measure and control physical quantities(Temperature,

Humidity, Light intensity, water flow) in industrial & consumer applications

o The physical quantities are usually measured with Transducers

o The output of the transducer has to be amplified for further process. This

amplification is done using Instrumentation amplifier

o Thus the Special amplifier Which is used for low level amplification with

High CMRR is called Instrumentation amplifier.

SPECIAL FEATURES

High gain accuracy

High CMRR(80 db)

High gain stability

Low dc offset

Low output impedance

The output voltage is given by V0= 2

1(V1-V2)

The input impedance from V1 source is R3+R4 =101KΩ

The input impedance from V2 source is only R1=1KΩ

Thus the low impedance may load the source heavily( loading effect)

INSTRUMENTATION AMPLIFIER WITH TRANSDUCER BRIDGE


This circuit uses the resistive transducer whose resistance changes as a function of

physical quantity to be measured.

The bridge is initially balanced

As the physical quantity changes, the RT of the transducer also changes & the

bridge is unbalanced.

The differential voltage now gets amplified by three op-amp instrumentation

amplifier.

APPLICATIONS

Temperature Indicator

Temperature Controller

Light Intensity meter

Analog weight scale

Measurement of flow & Thermal conductivity

2. Explain the operation of Peak detector

The function of peak detector is to compute the peak value of input

The circuit act as the voltage follower and stores the highest value on a capacitor

When Vi> Vc, the diode is forward biased & the circuit becomes voltage follower

When Vi<Vc, the diode is reverse biased, the capacitor stores the charge till

Vi>Vc

The circuit can be reset by connecting MOSFET Switch across capacitor

This circuit act as positive peak detector

By reversing the diode, the circuit act as negative peak detector

Test & Measurement instrumentation

Amplitude modulation(AM) communication


3. Explain the working of Sample and Hold circuit

SAMPLE & HOLD CIRCUIT

A Sample & hold circuit samples the input signal & holds on to its last

sampled value

Consider the Sample & Hold circuit

The N Channel Mosfet act as Switch

The switch is controlled by the control voltage Vc

The capacitor stores the charge

When Vc is positive, the Switch is ON and the capacitor charges to

the Instantaneous value of input with Time constant [R0 + rDS(on)]

Where R0=Output resistance

rDS=resistance of

MOSFET


Thus the input voltage appears across the capacitor ‘C’

Since A2 is the Voltage follower, the capacitor voltage appears as V0

The Time during which voltage across the capacitor is equal to the input

voltage is called Sample “Period”

The Time Period of Vc during which the voltage across the capacitor is

held constant is called “hold period”

4. Explain the Clipper circuit using op-amp and diode with neat diagram

he Clipper clip-off a certain portion of the input signal to obtain a desired output

waveform

There are two types of clipper circuit. They are

o Positive clipper

o Negative clipper

Positive clipper

The Positive clipper clips off the Positive parts of

the input signal above the reference voltage.

The portion V0>Vref is clipped off.


Negative Clipper

The negative clipper clips off the negative parts of the input signal below the

reference voltage.

The Clipping level is determined by the reference voltage Vref

The portion V0<Vref is clipped off.

For Vi>Vref, The diode conducts and the circuit act as voltage follower.[V0=Vi]

When Vi<Vref, the diode does not conduct and the reference voltage appears

at the output. [V0=Vref]

5. Explain the operation of op-amp as clamper (dc inserter or restorer)

The circuit which is used to add a desired dc level to the output voltage is called

clamper.

There are two types of clamper circuit

Positive clamper

Negative clamper

Positive clamper & Negative Clamper

If the clamped dc level is positive, it is called positive clipper

A variable positive dc voltage is applied at the Non inverting input terminal(+).

This Vref makes V’ positive & the diode is forward biased. Thus V0=+Vref


The capacitor connected gets charged to Vm (during negative half cycle of Vi)

Since the capacitor is in series with ac input signal, the output voltage

V0=Vi+Vm

V0=Vref + Vi + Vm

The Negative clamper is obtained by reversing the diode D and by using

a negative reference voltage –Vref.

Since the clamper circuit clamps the peaks of the input waveform, it is also

called as Peak Clamper.

6. Explain the operation of first order low pass filter.

FILTERS

A frequency selective electric circuit that passes electric signals of specified band of

frequencies and attenuates the signals of frequencies outside the band is called an electric

filter.


The filter which is made up of only by passive components(R,L,C) is called

passive filters

The passive filters work well for high frequency(radio frequency)

At low frequency, inductors become problematic, as inductors become

large heavy and expensive.

The active filter overcomes the problem of passive filter.

The active filter uses the op-amp as active element and R, C as passive element.

Thus inductorless RC active filter can be obtained.

FIRST ORDER LOW PASS FILTER

A first order filter consists of a single RC network connected to + input terminal.

Consider the circuit for low first order low pass filter

SECOND ORDER ACTIVE FILTER

A Second order filter consists of two RC pairs and has a roll-off rate of -

40 dB/decade.[ first order filter has the roll off rate of -20 dB/decade]


The Second order filter named Sallen-Key filter is shown below

The frequency response for different values of α is shown below.

For α> 1.7, the response is stable, But when α value is reduced, the filter becomes

oscillatory.

The flattest pass band occurs for damping coefficient of 1.414. This is called

Butterworth filter.

The chebyshev filter are more lightly damped i.e., the damping coefficient is 1.06

The Bessel filter is heavily damped and has the damping coefficient of 1.73

7. Explain the operation of Multivibrator:

Multivibrators are a group of regenerative circuits that are used extensively in timing

applications. It is a wave shaping circuit which gives symmetric or asymmetric square output. It

has two states either stable or quasi- stable depending on the type of multivibrator.

Monostable multivibrator:


Monostable multivibrator is one which generates a single pulse of specified duration in response

to each external trigger signal. It has only one stable state. Application of a trigger causes a

change to the quasi- stable state.An external trigger signal generated due to charging and

discharging of the capacitor produces the transition to Monostable multivibrator:

Monostable multivibrator is one which generates a single pulse of specified duration in response

to each external trigger signal. It has only one stable state. Application of a trigger causes a

change to the quasi- stable state.An external trigger signal generated due to charging and disch

arging of the capacitor produces the transition to the original sable state.

Stable state: vo = +Vsat, VC = 0.6 V

transition to timing state: apply a -ve input pulse such that |Vip| > |VUT|; vo = -Vsat. Best to

select RiCi # 0.1RfC.

Timing state: C charges negatively from 0.6 V through Rf. Width of timing pulse is:

If we pick R2 = R1/5, then tp = RfC/5.

Recovery state: vo = +Vsat; circuit is not ready for retriggering until VC = 0.6 V. The recovery

time . tp. To speed up the recovery time, RD (= 0.1Rf) & CD can be added


8. Explain the operation of Astable multivibrator:

Astable multivibrator is a free running oscillator having two quasi- stable states. Thus, there is

oscillations between these two states and no external signal are required to produce the change in

state.|+Vsat| = |-Vsat

Where If R2 is chosen to be 0.86R1, then T = 2RfC and

T = Rf C the or iginal stable state.


9. Explain the operation RC Phase shift oscillator

• In this the op-amp provides a phase shift of 180 as it is in inverting mode.

• An additional phase shift of 180 is provided by the feedback RC network.

The transfer function of the RC network is calculated as, β = Vf/V0 =

1/(1+6/sRC+5/s2R2C2+1/s3R3C3)

Put s=jw

β =1/(1-5(f/f1)2-j[6(f/f1 ) -(f/f1)3]--------(1)

Wheref1 = 1/2∏RC

β Should be real

so the imaginary term must be equal to zero.thus (1) becomes

6(f/f1 )-(f/f1)3 =0

f1/f = √6

• Thus the frequency of oscillations f0 is given by, f0 =1/[√6(2∏RC)] Now the loop gain is Av β = 1

i.e.,Av/1-5(f1/f0)2 = 1

Av ≥ -29

Thus the gain is kept greater than 29 to ensure that variations in circuit parameters

will not make Av β < 1. otherwise oscillations will die out

• For low frequency opamp 751 is used

• For high frequency LM 318 or LF 351 is used

• The total phase shift around a loop is 180 of amplifier

• Another 180 is due to 3 RC sections , thus making 360

• This satisfies the required condition for positive feedback and the circuit works

as an oscillator


UNIT-4

SPECIAL ICs

1. Discuss the functional diagram of 555 timer

• The 555 timer is a highly stable device for generating accurate time delay

or oscillation

• Signetics corporation first introduced this device as the SE555/NE555

• A single 555 timer can provide time delay ranging from microseconds to

hours whereas counter timer can have a maximum timing range of days

• The 555 timer can be used with supply voltage in the range of +5 v to +18 v

and can drive load upto 200 mA

• Compatible (easily matchable)

• Versatile (able to adapt)

Applications

• Oscillator

• Pulse generator

• Ramp & square wave generator

• Burglar alarm


2. Explain the operation of Monostable operation

• In the standby (stable) state ,FF holds transistor Q1 on, thus clamping the

external capacitor C to ground.

• The output remains at ground potential (low)

• As the trigger passes through Vcc/3, the FF is set (Q’=0)

• This makes the transistor Q1 off and the short circuit across the capacitor C

is released.

• As Q is low , output goes high(=Vcc)

• The timing cycle now begins. The voltage across the C rises

exponentially towards Vcc.

• After a time period T, the capacitor voltage is just greater than 2Vcc/3 and the UC

resets the FF Q’=1.

• The transistor Q1 goes on (saturates). The capacitor discharges & goes to ground

potential.

• Sometimes the monostable circuit mistriggers on positive pulse edges, even with

bypass capacitor.

• To prevent this modified circuit is used.

• Here the resistor & capacitor combination of 10kΏ and 100μf at the input

forms the differentiator.

• During the positive going edge of the trigger, diode D conducts and limits the

amplitude of positive spike 0.7V


3. Explain the functional diagram of Astable operation using 555 timer

• Comparing with monostable operation, the timing resistor is now split into

two sections RA and RB

• Now when the supply Vcc is given, the capacitor charges towards VCC

• When the capacitor voltage equals 2VCC/3,the capacitor starts

discharging towards ground

• During the discharge of capacitor C, as it reachesVCC/3, the LC triggers

& unclamps C

• The length of the time that the output remains high is the time for the capacitor

to charge from 2VCC/3 and VCC/3.

• It is calculated as follows:

• The capacitor voltage is given as

Vc = Vcc(1-e-t/RC )

The time t1 taken to charge from 0 to 2VCC/3 is 2Vcc/3 = Vcc(1-e-t1/RC )

t1=1.09RC

The time t2 taken to charge from 0 to VCC/3 is Vcc/3 = Vcc(1-e-t2/RC )

t2=0.405 RC

• So time to charge from Vcc/3 to 2Vcc/3 is

thigh = 0.69RC

So for the given circuit thigh = 0.69(RA+RB)C

• Similarly tlow = 0.69RBC

• Now total time T= thigh+ tlow

• T=0.69(RA+2RB)C

• Thus f = 1/T =1/ (RA+2RB)C

thigh = t1-t2


4. Explain the operation of Phase locked loops (PLL)

The PLL is a closed loop system designed to lock the output frequency & phase

to the freq & phase of input signal.

• Earlier PLL in discrete form is limited by its high cost

• Now with advanced IC technology , PLL are available in inexpensive

monolithic ICs

• This technique for electronic frequency control is used today in

– satellite communications systems

– Air borne navigational systems

– FM communications systems etc

Basic principles

• This system consists of phase detector/comparator, a low pass filter, an error

amplifier, & vco

VCO

• The VCO is a free running multivibrator

• It operates at a set frequency fo called free running frequency

• This frequency is determined by an timing capacitor & resistor.

• It can be shifted to either side by applying a dc control voltage Vc


• The frequency deviation is directly proportional to Vc. Hence it is called VCO

operation

• If an input signal vs of frequency fs is applied to PLL

• The phase detector compares the phase and frequency of input with output

Vo [compares fs with f0 ]

• If the two signals differ in frequency or phase, an error voltage is generated

• The phase detector is a multiplier and produces the sum (fs + f0) & difference

(fs - f0) at its output

• The high frequency components (fs + f0) is removed by the LPF & the difference

frequency is amplified

• This difference frequency is then applied as control voltage vc to VCO

• This signal Vc shifts the VCO frequency to reduce the frequency

difference between fs & f0

• Once this action starts, we can say that the signal is in capture range.

• The VCO continues to change frequency till its output freq is same as input freq.

then the circuit is said to be locked

• Thus once locked PLL tracks the frequency changes of input signal.

• Hence PLL goes through three stages

– Free running

– Capture

– Locked or tracking

Characteristics of PLL

• Lock in range : The range of frequency over which the PLL can maintain

lock with the incoming signal is called lock in range or tracking range.

• Capture range : The range of frequencies over which the PLL can acquire with an

input signal is called the capture range.

• Pull in time : The total time taken by the PLL to establish lock is called pull

in time.


5. Explain the application of Phase locked loops (PLL)

• Frequency multiplier

• Frequency synthesizer

• FM demodulation

• Frequency shift keying (FSK) demodulator

• AM detection

• Frequency translation

• The SE/NE 560,561,562,563,564,565,567 mainly differ in operating frequency

range, power supply requirement, frequency and bandwidth.

• IC 565 is the mostly used PLL

• The short circuit pins 4 & 5 connects vco output to phase comparator.

• A capacitor is connected between pin 7 & pin 10


UNIT 5

APPLICATION ICs

1. Draw and explain the functional block diagram IC 723 general purpose regulators

IC 723 is a general purpose voltage regulator which can be adjusted over a wide range

of both positive and negative regulated voltage.

FUNCTIONAL BLOCKDIAGRAM / INTERNAL STRUCTURE

The internal structure of IC 723 has two separate sections

Section 1 consists of Zener diode, Constant current source and reference amplifier

– This produces a fixed voltage of about 7V at Vref terminal.

Section 2 consists of error amplifier, series pass transistor Q1 and a current limit

transistor Q2

OPERATION

The constant current source forces the zener to operate at a fixed point so that the

zener output is a fixed voltage.

The error amplifier compares V0 and Vref & generates error signal.

The error signal controls the conduction of transistor Q1

IC PACKAGES

IC 723 regulator is available in a

– 14 pin dual inline package

– 10 pin metal can package


IMPORTANT FEATURES OF 723 VOLTAGE REGULATORS

Input voltage 40V max

Output voltage adjustable from 2V to 37V

Output current of 150mA without external pass transistor

Can be used either a linear regulator or Switching regulator


As low voltage regulator (<7v)

A simple low voltage (2V -7V) regulator can be made using IC 723 as follows

Since Q1 is operating as an emitter follower V0 = Vref*R2 / (R1+R2)


The reference voltage is typically 7.15V. Thus V0 = 7.15 *R2 / (R1+R2)

Thus V0 is always less than 7.15V. Hence the name low voltage regulator


As high voltage regulator (>7V)

The Non Inverting terminal of error amplifier is connected directly to Vref through R3

so that VNI=Vref


The error amplifier operates as Non Inverting amplifier with gain A=1+ (R1/R2)

Thus V0= Vref (1+ R1/R2)

4. Explain the operation of LM317 adjustable voltage regulator

• Many Manufacturers used fixed voltage regulators as 7800 & 7900 series.

• This approach is proved costly when production was stopped due to the shortage

of particular voltage.

• Adjustable voltage regulators finds solution because a single device satisfies many

voltage requirements from 1.2V to 57V

• The LM 317 series is one of the most commonly used general purpose adjustable voltage

regulator.

• It is a three terminal positive voltage regulator

• The 3 terminals are Vin,Vout,Adj

• It requires only 2 external resistors(R1,R2) to set the output voltage

• It develops 1.25V as reference voltage between output & adjustment terminal

Connection diagram


5. Draw the internal circuit schematic of LM 380 power audio amplifiers

National Semiconductors LM380 is a power audio amplifier designed to deliver a minimum of

2.5W to an 8 ohm load

Features:

1. Internally fixed gain of 50

2. Output short circuit proof with internal thermal limiting

3. Wide supply voltage range of 5V – 22V

4. High impedance of 150 ohm

5. Low THD (0.2%)

6. No need to use separate Heat sink for audio amplifier

LM 380 Circuit description:

The Schematic diagram of LM380 has four stages

– PNP Emitter follower

– Differential amplifier

– Common emitter

– Quasi- Complementary

emitter follower


The Input stage is an emitter follower composed of PNP Q1 & Q2 which drives PNP Q3

& Q4 differential pair.

– The current in PNP Q3-Q4 is established by Q7,R3 &+V

– The collector current of Q9 is established by current mirror Q7,Q8 & associated

resistors

– Q5, Q6 forms collector load for PNP Q3-Q4 differential pair.

The output of differential amplifier (taken at junction of Q4 & Q6) is applied as input to

common emitter voltage gain stage

– This Common emitter stage is formed by Q9 with D1,D2 & Q8

– The Capacitor provides internal compensation

– D1 & D2 are temperature compensation diodes for Q10, Q11

The output stage is a Quasi(false) complementary pair emitter follower

– This is formed by NPN Q10 & Q12

– Because of the arrangement of output stage , the quiescent output voltage is half

the supply voltage

– To decouple the input state from supply, a bypass capacitor is connected between

pin 1 & 7

APPLICATION

It is used in simple phonograph amplifiers, intercoms, line drivers, teaching machine outputs,

alarms, ultrasonic drivers, TV sound systems, AM-FM radio, small servo drivers, power

converters, etc.


6. What is switching regulator with neat block diagram. Expalin the internals of IC 7840

The Switching Regulators are also called as Switched mode regulators

The transistor in this regulator is used as a control switch & it is operated in Cut-off region &

Saturation region

When transistor is operated in the Cut-off region, there is no current & hence does not dissipates any

power

When the transistor is operated in the saturation region, a negligible voltage drop appears across it and

hence dissipates very small power

Thus it provides Maximum current to the load & almost entire power gets transmitted to the load.

Hence the efficiency of switching regulator is always higher than the linear regulator.

The Basic Switching regulator consists of four major components

1. Voltage Source Vin

2. Switching Transistor

3. Pulse generator

4. Filter

Vin is a DC supply voltage which may be a Battery

The Switch is generally a transistor

The pulse generator produces a required pulse waveform

The Filter may be RC, RL, and RLC. It converts the pulse waveform obtained from the switch into a

DC output voltage.

FUNCTIONAL BLOCK DIAGRAM

In the functional block diagram, the output

voltage V0 is feedback to the inverting input

of error amplifier through R1 R2 potential

divider network.

The error amplifier compares V0 and Vref and generates error signal

This error signal is given to the inverting terminal of comparator

EE 6303 LIC 2013 QB 16 MARKS The Oscillator generates the Triangular waveform

CONFIGURATION OF SWITCHING REGULATOR

Step down or Buck Switching regulator

Step up or Boost Switching Regulator

Inverting type Switching Regulator

IC SWITCHING REGULATOR [µA 7840]

Due to the non availability of high speed switching transistors & low pass inductors, the design of

switching regulators was much more complicated. But now due to the availability of IC it become easy

to design.

Components of IC µA 7840

IC µA 7840 consist of

1. Temperature compensated Voltage reference

2. Duty cycle controllable Oscillator

3. High gain comparator

4. High voltage output switch

5. power switching diode

6. Opamp

BLOCK DIAGRAM DESCRIPTION

The initial Switching frequency is set by the timing capacitor CT connected between pins 12 & 11

Initial duty cycle is 6:1

Duty cycle & Switching frequency is controlled by current limit circuitry IPK sense

The comparator controls the On /OFF time of switching transistor Q1& Q2

FEATURES OF µA 7840

Step up, Step down, inverting operation

operates from 2.5V- 40V input

80db Line & Load regulation

output adjustable from 1.3 V to 40V

EE 6303 LIC 2013 QB 16 MARKS High gain & high current device.

7. Draw the block diagram of the function generator ICL 8038 or any other equivalent and explain its

operation

The function generators / Waveform generators are designed to provide basic waveform such as

Square wave, Triangular wave & Sine wave

The function generators in monolithic IC form provide these basic waveforms with minimum

number of external components reducing the complexity & increasing reliability of the circuit.

In function generator

– The triangular & Square wave are generated using VCO

– The Sine wave is generated by passing the output of VCO through on chip wave shaper

– The Saw tooth & pulse waveforms are generated by configuring the oscillator.

FUNCTIONAL BLOCK DIAGRAM

BLOCK DIAGRAM DESCRIPTION

The operation of ICL 8038 is based on charging & discharging of grounded capacitor C

The Charging & Discharging rates are controlled by programmable current generators IA & IB

When Switch is at A, the capacitor charges at a rate determined by IA

When the capacitor voltage reaches VUT, the upper comparator triggers & resets the Flip flop output.

This causes the Switch position to move from A to B

Now the capacitor starts discharging at a rate determined by IB

When the capacitor voltage reaches VLT, the lower comparator triggers & resets the Flip flop output.

This causes the Switch position to move from B to A & the cycle repeats.

As a result, we get

EE 6303 LIC 2013 QB 16 MARKS• Square wave at the output of Flip-flop

• Triangular wave across capacitor

• Sine wave when triangular wave is passed through on chip wave shaper

Similarly By making one of the current IA or IB much larger we get

Saw tooth across capacitor

rectangular wave at flip-flop

INTERNAL CIRCUIT DIAGRAM

Web viewDEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING. Question bank. EE6303- Linear Integrated Circuits. PART A. UNIT

Documents