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WIRELESS ENERGY TRANSMITTER WITH
TARIFF SYSTEM
CONTENTS
CHAPTERS PAGE NO.
1. SYNOPSIS
1.1. METHODOLOGY
2. BLOCK DIAGRAM
2.1. BLOCK DIAGRAM DESCRIPTION
3. OVERALL CIRCUITS
3.1 TRANSMISSION SECTION
3.2 RECEVIER SECTION
4. POWER SUPPLY
4.1 BLOCK DIAGRAM
4.2 EXPLANATION
4.3 CIRCUIT DIAGRAM
4.4 WORKING PRINCIPLE
4.4.1 TRANSFORMER
4.4.2 BRIDGE RECTIFIER
4.5 IC REGULATOR
4.5.1 CIRCUIT DIAGRAM
4.5.2 EXPLANATION
4.5.3 VOLTAGE LIMITATIONS OF IC PARTS
5. IR-SPEED SENSOR
5.1 CIRCUIT DIAGRAM
1
5.2 EXPLANATION
6. MICROCONTROLLER
6.1 INTRODUCTION
6.2 PIN DIAGRAM OF MICROCONTROLLER6.2.1 PIN DESCRIPTION
6.3 ARCHITECTURE OF 89C51
6.4 MEMORY ORGANIZATION
6.5 ADDRESSING MODES
6.6 REGISTER INSTRUCTION
6.7 INTERRUPTS
6.8 OSCILLATOR AND CLOCK CIRCUIT
6.9 APPLICATIONS OF MICROCONTROLLER
7. LCD DISPLAY
8. TRANSMISSION SECTION
8.1 CIRCUIT
8.2 FSK MODULATION
8.2.1 CIRCUIT DESCRIPTION
8.3 RF TRANSMITTER
9. RECEVER SECTION
9.1 CIRCUIT
9.2 RF RECEIVER
9.3 FSK DEMODULATOR
10. COMMUNICATION SYSTEM
10.1 CIRCUIT
10.2 RS232
10.3 CIRCUIT WORKING DESCRIPTION
11. PROGRAM
12. ADVANAGES AND APPLICATIONS
12.1 ADVANTAGE
2
12.2 APPLICATION
13. CONCLUSION
14. REFERANCES
1. SYNOPSIS
The objective of this project is to wireless energy transmitter with tariff system
through microcontroller. This is a type of data transfer through wireless communication by
using microcontroller. This system will be useful for the EB people to transmit the data from
the consumer place to EB without going directly to the consumer place. This particular
system will transmit the number of units consumed by the consumer as well as the amount
has to pay for the month.
1.1 Methodology:
This project is designed by following blocks
IR transmitter and receiver.
Microcontroller
LCD display
Encoder.
RF transmitter
RF receiver
Decoder.
PC
3
2. BLOCK DIAGRAM
4
Fig 2.0 Block Diagram
2.1 BLOCK DIAGRAM DESCRIPTION :
5
By using the keyboard, we are fixing the corresponding data before that the IR
transmitter and receiver senses the number of rotation of energy meter and it gives to signal
conditioning circuit.
This Circuit delivers the output in terms of pulses to the Microcontroller. Number of
units consumed is indicated in the display. If the particular data and time is reached, the
microcontroller sends the signal to encoder. The encoded signal is then transmitted to RF
transmitter.The RF receiver receives the transmitted signal and then it is given to the decoder.
The Decoded signal is now transferred to PC. This is wireless type of communication.
3. OVERALL CIRCUITS:
6
3.1 TRANSMISSION SECTION:
Fig 3.1 Circuit Diagram Of Transmitter Section
3.2 RECEVIER SECTION:
7
Fig 3.2 Circuit Diagram Of Receiver Circuit
4. POWER SUPPLY
8
4.1 BLOCK DIAGRAM:
Fig 4.1 Block Diagram Of Power Supply
4.2 EXPLANATION:
The ac voltage, typically 220V rms, is connected to a transformer, which steps that ac
voltage down to the level of the desired dc output. A diode rectifier then provides a full-wave
rectified voltage that is initially filtered by a simple capacitor filter to produce a dc voltage.
This resulting dc voltage usually has some ripple or ac voltage variation.
A regulator circuit removes the ripples and also remains the same dc value even if the
input dc voltage varies, or the load connected to the output dc voltage changes. This voltage
regulation is usually obtained using one of the popular voltage regulator IC units.
9
TRANSFORMER RECTIFIER FILTERIC REGULATOR
LOAD
4.3 CIRCUIT DIAGRAM:
Fig 4.3 Circuit Diagram Of Power Supply
10
4.4 WORKING PRINCIPLE
4.4.1 TRANSFORMER:
The potential transformer will step down the power supply voltage (0-230V) to (0-
6V) level. Then the secondary of the potential transformer will be connected to the precision
rectifier, which is constructed with the help of op–amp. The advantages of using precision
rectifier are it will give peak voltage output as DC, rest of the circuits will give only RMS
output.
4.4.2 BRIDGE RECTIFIER:
When four diodes are connected as shown in figure, the circuit is called as bridge
rectifier. The input to the circuit is applied to the diagonally opposite corners of the network,
and the output is taken from the remaining two corners. Let us assume that the transformer is
working properly and there is a positive potential, at point A and a negative potential at point
B. the positive potential at point A will forward bias D3 and reverse bias D4.
The negative potential at point B will forward bias D1 and reverse D2. At this time
D3 and D1 are forward biased and will allow current flow to pass through them; D4 and D2
are reverse biased and will block current flow.The path for current flow is from point B
through D1, up through RL, through D3, through the secondary of the transformer back to
point B. this path is indicated by the solid arrows. Waveforms (1) and (2) can be observed
across D1 and D3.One-half cycle later the polarity across the secondary of the transformer
reverse, forward biasing D2 and D4 and reverse biasing D1 and D3. Current flow will now be
from point A through D4, up through RL, through D2, through the secondary of T1, and back
to point A. This path is indicated by the broken arrows. Waveforms (3) and (4) can be
observed across D2 and D4. The current flow through RL is always in the same direction. In
flowing through RL this current develops a voltage corresponding to that shown waveform
(5). Since current flows through the load (RL) during both half cycles of the applied voltage,
this bridge rectifier is a full-wave rectifier.
11
4.5 IC REGULATOR:
4.5.1 CIRCUIT DIAGRAM:
GND
Fig 4.5.1 Circuit Diagram Of Ic Regulator
4.5.2 EXPLANATION:
Voltage regulators comprise a class of widely used ICs. Regulator IC units contain the
circuitry for reference source, comparator amplifier, control device, and overload protection
all in a single IC. Although the internal construction of the IC is somewhat different from that
described for discrete voltage regulator circuits, the external operation is much the same. IC
units provide regulation of either a fixed positive voltage, a fixed negative voltage, or an
adjustably set voltage.
A power supply can be built using a transformer connected to the ac supply line to
step the ac voltage to a desired amplitude, then rectifying that ac voltage, filtering with a
capacitor and RC filter, if desired, and finally regulating the dc voltage using an IC regulator.
The regulators can be selected for operation with load currents from hundreds of milli
amperes to tens of amperes, corresponding to power ratings from milliwatts to tens of watts.
12
IN OUT
7805
4.5.3 VOLTAGE LIMITATIONS OF IC PARTS:
IC PartOutput
Voltage (V)Minimum Vi (V)
7805 +5 7.3
7806 +6 8.3
7
808+8 10.5
7
810+10 12.5
7
812+12 14.6
7
815+15 17.7
7
818+18 21.0
7
824+24 27.1
Table 4.5.3 Voltage Limitation Of Ic
5. IR-SPEED SENSOR
13
5.1 CIRCUIT DIAGRAM:
Fig 5.1 Circuit Diagram Of IR – Speed Sensor
5.2 EXPLANATION:
14
This circuit is designed to monitor the speed of the energy meter disc. The holes type
pulley is attached in the disc. The disc is rotated across the USLOT. The USLOT consists of
IR transmitter and receiver.
Infrared transmitter is one type of LED which emits infrared rays generally called as
IR Transmitter. Similarly IR Receiver is used to receive the IR rays transmitted by the IR
transmitter. One important point is both IR transmitter and receiver should be placed straight
line to each other.
When supply is ON, the IR transmitter LED is conducting it passes the IR rays to the
receiver. The IR receiver is connected to base of the BC 547 switching transistor through
resistors. When motor is not rotating the IR transmitter passes the rays to the receiver.
The IR receiver LED is conducting due to that less than 0.7V is given to transistor
base so that transistor is not conducting. Now the VCC +5V is given to the input of the
inverter (IC7404) and zero taken as output. When motor is rotating, the pulley attached in the
shaft also rotating, so it interprets the IR rays between transmitter and receiver. Hence IR
receiver LED is not conducting due to that more than 0.7V is given to base of the transistor.
Now the transistor is conducting so it shorts the collector and emitter terminal. The
zero voltage is given to inverter input and +5v is taken in the output. Hence depends on the
motor speed the zero to 5v square pulse is generating at the output which is given to
microcontroller in order to count the pulse. This pulse rate is equal to the speed of the
rotation of the disc.
6. MICROCONTROLLER
15
6.1 INTRODUCTION:
Microcontrollers are destined to play an increasingly important role in revolutionizing
various industries and influencing our day to day life more strongly than one can imagine.
Since its emergence in the early 1980's the microcontroller has been recognized as a general
purpose building block for intelligent digital systems. It is finding using diverse area, starting
from simple children's toys to highly complex spacecraft. Because of its versatility and many
advantages, the application domain has spread in all conceivable directions, making it
ubiquitous. As a consequence, it has generate a great deal of interest and enthusiasm among
students, teachers and practicing engineers, creating an acute education need for imparting
the knowledge of microcontroller based system design and development. It identifies the vital
features responsible for their tremendous impact, the acute educational need created by them
and provides a glimpse of the major application area.
A microcontroller is a complete microprocessor system built on a single IC.
Microcontrollers were developed to meet a need for microprocessors to be put into low cost
products. Building a complete microprocessor system on a single chip substantially reduces
the cost of building simple products, which use the microprocessor's power to implement
their function, because the microprocessor is a natural way to implement many products. This
means the idea of using a microprocessor for low cost products comes up often. But the
typical 8-bit microprocessor based system, such as one using a Z80 and 8085 is expensive.
Both 8085 and Z80 system need some additional circuits to make a microprocessor system.
Each part carries costs of money. Even though a product design may requires only very
simple system, the parts needed to make this system as a low cost product.To solve this
problem microprocessor system is implemented with a single chip microcontroller. This
could be called microcomputer, as all the major parts are in the IC. Most frequently they are
called microcontroller because they are used they are used to perform control functions.
6.2 PIN DIAGRAM OF MICROCONTROLLER:
16
Fig 6.2 Pin Diagram Of AT89C51
6.2.1 PIN DESCRIPTION
VCC
Supply voltage.
GND
Ground.
PORT 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance
inputs. Port 0 may also be configured to be the multiplexed low order address/data bus
during accesses to external program and data memory. In this mode P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming, and outputs the code bytes
during program verification. External pull-ups are required during program verification.
PORT 1
17
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled
high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are
externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1
also receives the low-order address bytes during Flash programming and verification.
PORT 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled
high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are
externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2
emits the high-order address byte during fetches from external program memory and during
accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this
application it uses strong internal pull-ups when emitting 1s. During accesses to external data
memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special
Function Register. Port 2 also receives the high-order address bits and some control signals
during Flash programming and verification.
PORT 3
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output
buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled
high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are
externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also
serves the functions of various special features of the AT89C51 as listed below:
18
Table 6.2.1 Pin Description
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator
frequency, and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external Data Memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With
the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in
external execution mode.
19
PSEN
Program Store Enable is the read strobe to external program memory. When the
AT89C51 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external
data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH. Note,
however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should
be strapped to VCC for internal program executions.This pin also receives the 12-volt
programming enable voltage (VPP) during Flash programming, for parts that require 12-volt
VPP.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating
circuit.
XTAL2
Output from the inverting oscillator amplifier. It should be noted that when idle is
terminated by a hard ware reset, the device normally resumes program execution, from where
it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip
hardware inhibits access to internal RAM in this event, but access to the port pins is not
inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is
terminated by reset, the instruction following the one that invokes Idle should not be one that
writes to a port pin or to external memory.
20
6.3 ARCHITECTURE OF 89C51
Fig 6.3 Architecture Of 89C51
21
6.4 MEMORY ORGANIZATION:
All Atmel Flash micro controllers have separate address spaces for program and data
memory as shown in Fig 1.The logical separation of program and data memory allows the
data memory to be accessed by 8 bit addresses . Which can be more quickly stored and
manipulated by an 8 bit CPU Nevertheless 16 Bit data memory addresses can also be
generated through the DPTR register.
6.4.1 PROGRAM MEMORY:
The map of the lower part of the program memory, after reset, the CPU begins
execution from location 0000h. Each interrupt is assigned a fixed location in program
memory. The interrupt causes the CPU to jump to that location, where it executes the service
routine. External Interrupt 0 for example, is assigned to location 0003h. If external Interrupt 0
is used, its service routine must begin at location 0003h. If the I interrupt in not used its
service location is available as general-purpose program memory.
The interrupt service locations are spaced at 8 byte intervals 0003h for External
interrupt 0, 000Bh for Timer 0, 0013h for External interrupt 1,001Bh for Timer1, and so on.
If an Interrupt service routine is short enough (as is often the case in control applications) it
can reside entirely within that 8-byte interval. Longer service routines can use a jump
instruction to skip over subsequent interrupt locations. If other interrupts are in use. The
lowest addresses of program memory can be either in the on-chip Flash or in an external
memory. To make this selection, strap the External Access (EA) pin to either VCC or GND.
For example, in the AT89C51 with 4K bytes of on-chip Flash, if the EA pin is strapped to
VCC, program fetches to addresses 0000h through 0FFFh are directed to internal Flash.
Program fetches to addresses 1000h through FFFFh are directed to external memory.
22
6.4.2 DATA MEMORY:
The Internal Data memory is dived into three blocks namely, Refer Fig
The lower 128 Bytes of Internal RAM.
The Upper 128 Bytes of Internal RAM.
Special Function Register
Internal Data memory Addresses are always 1 byte wide, which implies an address
space of only 256 bytes. However, the addressing modes for internal RAM can in fact
accommodate 384 bytes. Direct addresses higher than 7Fh access one memory space, and
indirect addresses higher than 7Fh access a different Memory Space.
The lowest 32 bytes are grouped into 4 banks of 8 registers. Program instructions call
out these registers as R0 through R7. Two bits in the Program Status Word (PSW) Select,
which register bank, is in use. This architecture allows more efficient use of code space, since
register instructions are shorter than instructions that use direct addressing.
The next 16-bytes above the register banks form a block of bit addressable memory
space. The micro controller instruction set includes a wide selection of single - bit
instructions and this instruction can directly address the 128 bytes in this area. These bit
addresses are 00h through 7Fh. either direct or indirect addressing can access all of the bytes
in lower 128 bytes. Indirect addressing can only access the upper 128. The upper 128 bytes of
RAM are only in the devices with 256 bytes of RAM.
The Special Function Register includes Ports latches, timers, peripheral controls etc.,
direct addressing can only access these register. In general, all Atmel micro controllers have
the same SFRs at the same addresses in SFR space as the AT89C51 and other compatible
micro controllers. However, upgrades to the AT89C51 have additional SFRs. Sixteen
addresses in SFR space are both byte and bit Addressable. The bit Addressable SFRs are
those whose address ends in 000B. The bit addresses in this area are 80h through FFh.
23
6.5 ADDRESSING MODES:
6.5.1 DIRECT ADDRESSING:
In direct addressing, the operand specified by an 8-bit address field in the instruction.
Only internal data RAM and SFR’s can be directly addressed.
6.5.2 INDIRECT ADDRESSING:
In Indirect addressing, the instruction specifies a register that contains the address of
the operand. Both internal and external RAM can indirectly address.
The address register for 8-bit addresses can be either the Stack Pointer or R0 or R1 of
the selected register Bank. The address register for 16-bit addresses can be only the 16-bit
data pointer register, DPTR.
6.5.3 INDEXED ADDRESSING:
Program memory can only be accessed via indexed addressing this addressing mode
is intended for reading look-up tables in program memory. A 16 bit base register (Either
DPTR or the Program Counter) points to the base of the table, and the accumulator is set up
with the table entry number. Adding the Accumulator data to the base pointer forms the
address of the table entry in program memory.
Another type of indexed addressing is used in the“ case jump ” instructions. In this
case the destination address of a jump instruction is computed as the sum of the base pointer
and the Accumulator data.
24
6.6 REGISTER INSTRUCTION:
The register banks, which contains registers R0 through R7, can be accessed by
instructions whose opcodes carry a 3-bit register specification. Instructions that access the
registers this way make efficient use of code, since this mode eliminates an address byte.
When the instruction is executed, one of four banks is selected at execution time by the row
bank select bits in PSW.
6.6.1 REGISTER - SPECIFIC INSTRUCTION:
Some Instructions are specific to a certain register. For example some instruction
always operates on the Accumulator, so no address byte is needed to point OT ir. In these
cases, the opcode itself points to the correct register. Instruction that register to Accumulator
as A assemble as Accumulator - specific Opcodes.
6.6.2 IMMEDIATE CONSTANTS:
The value of a constant can follow the opcode in program memory For example.
MOV A, #100 loads the Accumulator with the decimal number 100. The same number could
be specified in hex digit as 64h
6.6.3 PROGRAM STATUS WORD:
Program Status Word Register in Atmel Flash Micro controller:
CY AC F0 RS1 RS0 OV --- P
PSW 7 PSW 0
PSW 6 PSW 1
PSW 5 PSW 2
PSW 4 PSW 3
Fig 6.6.3 block diagram of psw
25
PSW 0:
Parity of Accumulator Set By Hardware To 1 if it contains an Odd number of 1s,
Otherwise it is reset to 0.
PSW1:
User Definable Flag
PSW2:
Overflow Flag Set By Arithmetic Operations
PSW3:
Register Bank Select
PSW4:
Register Bank Select
PSW5:
General Purpose Flag.
PSW6:
Auxiliary Carry Flag Receives Carry Out from Bit 1 of Addition Operands
26
PSW7:
Carry Flag Receives Carry Out From Bit 1 of ALU Operands.
The Program Status Word contains Status bits that reflect the current sate of the CPU.
The PSW shown if Fig resides in SFR space. The PSW contains the Carry Bit, The auxiliary
Carry (For BCD Operations) the two - register bank select bits, the Overflow flag, a Parity bit
and two user Definable status Flags.
The Carry Bit, in addition to serving as a Carry bit in arithmetic operations also serves
the as the “Accumulator” for a number of Boolean Operations .The bits RS0 and RS1 select
one of the four register banks. A number of instructions register to these RAM locations as
R0 through R7.The status of the RS0 and RS1 bits at execution time determines which of the
four banks is selected.
The Parity bit reflect the Number of 1s in the Accumulator .P=1 if the Accumulator
contains an even number of 1s, and P=0 if the Accumulator contains an even number of 1s.
Thus, the number of 1s in the Accumulator plus P is always even. Two bits in the PSW are
uncommitted and can be used as general-purpose status flags.
27
6.7 INTERRUPTS:
IE: INTERRUPT ENABLE REGISTER
EA - ET2 ES ET1 EX1 ET0 EX0
Enable bit = 1 enabled the interrupt
Enable bit = 0 disables it.
Fig 6.7 Block Diagram Of Interrupts
The AT89C51 provides 5 interrupt sources: Two External interrupts, two-timer
interrupts and a serial port interrupts. The External Interrupts INT0 and INT1 can each either
level activated or transistion - activated, depending on bits IT0 and IT1 in Register TCON.
The Flags that actually generate these interrupts are the IE0 and IE1 bits in TCON.
When the service routine is vectored to hardware clears the flag that generated an external
interrupt only if the interrupt WA transition - activated. If the interrupt was level - activated,
then the external requesting source (rather than the on-chip hardware) controls the requested
flag. Tf0 and Tf1 generate the Timer 0 and Timer 1 Interrupts, which are set by a rollover in
their respective Timer/Counter Register (except for Timer 0 in Mode 3).
When a timer interrupt is generated, the on-chip hardware clears the flag that
generated it when the service routine is vectored to. The logical OR of RI and TI generate the
Serial Port Interrupt. Neither of these flag is cleared by hardware when the service routine is
vectored to. In fact, the service routine normally must determine whether RI or TI generated
the interrupt an the bit must be cleared in software.
In the Serial Port Interrupt is generated by the logical OR of RI and TI. Neither of
these flag is cleared by hardware when the service routine is vectored to. In fact, the service
routine normally must determine whether RI to TI generated the interrupt and the bit must be
cleared in software.
28
6.8 OSCILLATOR AND CLOCK CIRCUIT:
XTAL1 and XTAL2 are the input and output respectively of an inverting amplifier
which is intended for use as a crystal oscillator in the pierce configuration, in the frequency
range of 1.2 MHz to 12 MHz. XTAL2 also the input to the internal clock generator.
To drive the chip with an internal oscillator, one would ground XTAL1 and XTAL2.
Since the input to the clock generator is divide by two flip flop there are no requirements on
the duty cycle of the external oscillator signal. However, minimum high and low times must
be observed.
The clock generator divides the oscillator frequency by 2 and provides a tow phase
clock signal to the chip. The phase 1 signal is active during the first half to each clock period
and the phase 2 signals are active during the second half of each clock period.
29
6.9 APPLICATIONS OF MICROCONTROLLER:
Microcontrollers are designed for use in sophisticated real time applications such as
Industrial Control
Instrumentation and
Intelligent computer peripherals
They are used in industrial applications to control
Motor
Robotics
Discrete and continuous process control
In missile guidance and control
In medical instrumentation
Oscilloscopes
Telecommunication
Automobiles
For Scanning a keyboard
Driving an LCD
For Frequency measurements
Period Measurements
30
7. LCD DISPLAY
Liquid crystal displays (LCDs) have materials which combine the properties of both
liquids and crystals. Rather than having a melting point, they have a temperature range within
which the molecules are almost as mobile as they would be in a liquid, but are grouped
together in an ordered form similar to a crystal.
An LCD consists of two glass panels, with the liquid crystal material sand witched in
between them. The inner surface of the glass plates are coated with transparent electrodes
which define the character, symbols or patterns to be displayed polymeric layers are present
in between the electrodes and the liquid crystal, which makes the liquid crystal molecules to
maintain a defined orientation angle.One each polarisers are pasted outside the two glass
panels. These polarisers would rotate the light rays passing through them to a definite angle,
in a particular direction.
When the LCD is in the off state, light rays are rotated by the two polarisers and the
liquid crystal, such that the light rays come out of the LCD without any orientation, and
hence the LCD appears transparent.When sufficient voltage is applied to the electrodes, the
liquid crystal molecules would be aligned in a specific direction. The light rays passing
through the LCD would be rotated by the polarisers, which would result in activating /
highlighting the desired characters.
The LCDs used exclusively in watches, calculators and measuring instruments are the
simple seven-segment displays, having a limited amount of numeric data. The recent
advances in technology have resulted in better legibility, more information displaying
capability and a wider temperature range.
Fig 7.0 Lcd Display
31
8. TRANSMISSION SECTION
8.1 CIRCUIT:
Fig 8.1 Circuit Diagram Of FSK Modulation With RF Transmitter
32
8.2 FSK MODULATION:
Frequency-shift keying (FSK) is a form of frequency modulation in which the
modulating signal shifts the output frequency between predetermined values. Usually, the
instantaneous frequency is shifted between two discrete values termed the mark frequency
and the space frequency. Continuous phase forms of FSK exist in which there is no phase
discontinuity in the modulated signal. The example shown at right is of such a form. Other
names for FSK are frequency-shift modulation and frequency-shift signaling.
8.2.1 CIRCUIT DESCRIPTION:
The digital data communication and computer peripheral, binary data is transmitted
by means of a carrier frequency which is shifted between two preset frequencies. This type of
data transmission is called frequency shift keying technique. Frequency keying is a form of
frequency modulation in which the carrier switches abruptly from one frequency to another
on receipt of a command or keying signal. Most oscillator circuit can be subjected to FSK by
simply designing them so that an alternative frequency determining component or parameter
is selected on receipt of the key signal. The key signal or input signal may be delivered
electro- mechanically via a switch, electronically via transistor gate or via PC etc.
The XR – 2206 is the waveform generator specifically allocated for FSK use.