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Andrew R. NeureutherEECS 105 Microelectronics Devices and
Circuits, Spring 2001
Topics: MOS current vs. voltage model (large signal and small
signal);M: Derivation of I vs. V starting from voltage drop along a
voltage controlled resistor; Regions of operation.
Week 4, Lectures 9-11, February 5-9, 2001
Version 2/8/01
Reading for week:M: HS 4.1-4.3W: HS 4.4F: HS 4.5-4.5.3
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NMOS Layout
Four terminals!
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NMOS Cross Section
L = LMASK – 2LLateral Diffusion
Note body contact
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NMOS: ID vs. VDS and Regions
(triode VDS < VGS-VTn)
(saturation VDS > VGS-VTn)
(cutoff VGS < VTn)
(VDS = VGS-VTn)
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PMOS: ID vs. VDS and Regions
(cutoff VSG < -VTp)
(saturation VSD > VSG+VTp)
(triode VSD < VSG+VTp)
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MOS Circuit Symbols
EECS 141EECS 141
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Flow of Mobile Electrons in Channel
)(),( yvyxqnJ yy =
)(),( yQyxnqx N−=⋅⋅∆
( ) ( )yvyQWI yNDS ⋅⋅−=
VC(y)
VC(y) is the channel voltage
These terms both depend on VC(y)
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Derivation of IDS vs. VDS: Set-Up
( ) ( ) ( )( )yVyVCyQ TnGCOXN −−=
( ) ( )yVVyV CGGC −=( ) ( )( )( )pCBpnTOnTn yVVVyV φφγ 22
−−−−−+=
( ) ( )y
yVEyv Cyy ∂
∂−=−= µµ
( ) ( )yvyQWI yNDS ⋅⋅−=
Solution: Integrate with respect to y from y = 0 to y = L and
enforce boundary conditions VC(0) = VS, VC(L) = VD
Result: Too messy for IC circuit analysis!
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Derivation of IDS vs. VDS: Approx. Soln.
( ) ( )yvyQWI yNDS ⋅⋅−=1) Assume VC = 0 in VTn =>
( )( )pBSpnTOnTn VVV φφγ 22 −−−−+=2) Assume EY = -VDS/L
L
VEv DSyy µµ −=−=
3) Assume average charge =>( ) ( )[ ]
2TnDSGSOXTnGSOX
NVVVCVVC
Q−−+−
−=
( )[ ] DSDSTnGSOXnDS VVVVCLW
I ⋅−−
= 2/µ
ThenTnDSGS VVV >−
Triode
source drain
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IDS vs. VDS in Triode Region
( )[ ] DSDSTnGSOXnDS VVVVCLW
I ⋅−−
= 2/µ
TnDSGS VVV >−
Triode
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NMOS: IDS vs. VDS and Regions
(triode VDS < VGS-VTn)
(saturation VDS > VGS-VTn)
(cutoff VGS < VTn)
(VDS = VGS-VTn)
Assume no further increase in IDbeyond VDS,Sat
To get value in saturation plug in VDS = VGS-VTn
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NMOS: ID vs. VDS Equations
( )[ ] DSDSTnGSOXnDS VVVVCLW
I 2/−−
= µ
( )22 TnGSOXnDS
VVCL
WI −
= µ
TnGS VV ≤
TnDSGS VVV ≥−
TnGSDS VVV −≥
cutoff
triode
saturation
0=DSITypical valuesVTn = 1VµµnCOX = 50 µµA/V2W/L = 4
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Load Line Solution
+_
VOUT
+_
VIN
5V
RL = 10 kΩΩ
VOC = 5V
ISC = 500 µµA
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Algebraic Solution: VIN = 3V
VVOUT 3.1≈
VVVVV TnGS 213 =−=− 1.3V < 2V => triode VDS <
VGS-VTn
( )[ ] DSDSTnGSOXnDS VVVVCLW
I 2/−−
= µ
( ) ( )[ ]
Ω
−=−−=
k
VVVVVVVAI DSDSDSDS 10
52/13/504 2µ
VVDS 382.1= AI DS µ362=
Quadratic Equation for VDS
=>
Device Circuit
Solution:
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Algebraic Solution: VIN = 2V
VVVVV TnGS 112 =−=−
VVOUT 5.3≈
3.5V > 1V => saturation VDS > VGS-VTn
( )22 TnGSOXnDS
VVCL
WI −
= µ
( )
Ω
−==−
=
k
VVAVAI DSDS 10
510012/50
2
4 22 µµ
Linear equation for VDSVVDS 4= AI DS µ100=
=>
Device Circuit
Solution:
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Region of Operation
VTn = 1V
Sat
0.25V
0V
1.5V 1.5V
1V
0V
Triode
3V
2V
3.5V
5V
3V
3.5V
Sat Cutoff
(VB = 0V)