Flexible, Print-in-Place 1D-2D Thin-Film Transistors Using Aerosol Jet Printing Shiheng Lu 1 , Jorge A. Cardenas 1 , Robyn Worsley 2 , Nicholas X. Williams 1 , Joseph B. Andrews 1 , Cinzia Casiraghi 2 and Aaron D. Franklin *, 1, 3 1 Department of Electrical and Computer Engineering, Duke University, Durham NC 27708, USA 2 School of Chemistry, University of Manchester, Manchester M13 9PL, United Kingdom 3 Department of Chemistry, Duke University, Durham NC 27708, USA TABLE OF CONTENTS GRAPHIC
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Flexible, Print-in-Place 1D-2D Thin-Film
Transistors Using Aerosol Jet Printing
Shiheng Lu1, Jorge A. Cardenas1, Robyn Worsley2, Nicholas X. Williams1, Joseph B. Andrews1,
Cinzia Casiraghi2 and Aaron D. Franklin*, 1, 3
1Department of Electrical and Computer Engineering, Duke University, Durham NC 27708,
USA
2School of Chemistry, University of Manchester, Manchester M13 9PL, United Kingdom
3Department of Chemistry, Duke University, Durham NC 27708, USA
TABLE OF CONTENTS GRAPHIC
ABSTRACT
Semiconducting carbon nanotubes (CNTs) printed into thin films offer high electrical
performance, significant mechanical stability, and compatibility with low-temperature
processing. Yet, the implementation of low-temperature printed devices, such as CNT thin-film
transistors (CNT-TFTs), has been hindered by relatively high process temperature requirements
imposed by other device layers—dielectrics and contacts. In this work, we overcome temperature
constraints and demonstrate 1D-2D thin-film transistors (1D-2D TFTs) in a low-temperature
(maximum exposure ≤ 80 °C) full print-in-place process (i.e., no substrate removal from printer
throughout the entire process) using an aerosol jet printer. Semiconducting 1D CNT channels are
used with a 2D hexagonal boron nitride (h-BN) gate dielectric and traces of silver nanowires as
the conductive electrodes; all deposited using the same printer. The aerosol jet-printed 2D h-BN
films were realized via proper ink formulation, such as utilizing the binder hydroxypropyl
methylcellulose, which suppresses re-dispersion between adjacent printed layers. In addition to
an ON/OFF current ratio up to 3.5 ×105, channel mobility up to 10.7 c m2 ·V −1 · s−1, and low gate
hysteresis, 1D-2D TFTs exhibit extraordinary mechanical stability under bending due to the
nanoscale network structure of each layer, with minimal changes in performance after 1000
bending test cycles at 2.1 % strain. It is also confirmed that none of the device layers requires
any high-temperature treatments to realize optimal performance. These findings provide an
attractive approach towards a cost-effective, direct-write realization of electronics.
temperature printing, aerosol jet printing, flexible electronics
The use of printing technologies for flexible electronics has rapidly increased in
prominence due to its simplicity, low-cost, and compatibility with a broad range of materials.1
These advantages have made printed electronics an attractive solution for the development of
both large-area and direct-write applications.2-4 Printed electronics consists of the transfer of a
functional material-based ink onto a substrate via either template-based methods such as spray-
coating5, 6 and roll-to-roll printing,7, 8 or direct-writing methods including inkjet6, 9 and aerosol jet
printing.10 Currently, there exists a wide variety of printable inks made of organic-based
materials,11 metal oxides,12 metallic nanostructures13 and carbon-based materials.14 Organic
electronic materials are typically semiconducting and suffer from low carrier mobility and poor
air stability.15 Metal oxide semiconducting inks usually require high process temperatures, which
limits the choices of printing methods and substrates. In contrast, semiconducting carbon
nanotubes (CNTs) exhibit excellent electronic, chemical, and mechanical properties, including
high carrier mobility, air stability, flexibility, and large surface-to-volume ratio, with minimal
thermal treatment required.16-18 Combined, the stability as well as the minimal temperature
requirements allow more freedom in substrate and material selection as well as compatibility
with simplified and low-cost printing techniques.19 These beneficial features of CNTs enable a
wide range of functional applications, from display backplanes20 and logic circuits14, 21 to
environmental22, 23 and biological sensors.24
Significant research effort has been focused on improving printed carbon nanotube thin-
film transistors (CNT-TFTs), culminating in better performance,25, 26 a wide range of
functionalities,21, 22, 24 and reduced fabrication costs.13 Although there have been a multitude of
demonstrations involving the direct-write printing of various nanomaterial inks and devices, the
device fabrication still requires processing outside the printer, making the overall manufacturing
process more time consuming and expensive. A completely in-place printed transistor process
has not yet been realized, largely owing to the significant challenges of ink layer compatibility,
reliance on sintering, and lack of sufficient quality low-temperature dielectrics. Recently, an
aerosol jet-based in-place printing technique for substrate-gated CNT-TFTs demonstrated
promising potential for cost-effective fabrication of semiconducting and conducting layers.13
While free from any postprocessing outside the printer, the CNT-TFTs were made on a Si
substrate with thermally grown SiO2 dielectric as the gate stack, limiting the number of device
structures and applications owing to the rigid and global substrate gate. To obtain an equally
simple printing method with fewer limitations, an in-place printable gate stack is required.
While silver nanowire (AgNW) inks have been proven viable for low-temperature printed
electrodes,27-29 an equally suitable gate dielectric that can also be printed and cured at low
temperatures has remained elusive. Common dielectric materials for printed CNT-TFTs include
ion gels,30 insulating polymers,25 and polymer/nanofiller hybrid dielectrics, among which
BaTiO3/poly(methyl methacrylate) has been widely used.31-33 To realize optimal performance,
polymers and hybrid dielectrics require high-temperature post-processing, above what a typical
printer can provide,25 thus rendering them incompatible with a fully in-place printed TFT. Ion
gels can be printed at low temperature, yet they suffer from limited switching speed that is
dependent on ionic motion and often yield ambipolar transistor behavior.8, 34
One promising candidate for a printable insulating dielectric can be found in recently
developed 2D material-based inks. The demonstration of large-scale liquid phase exfoliation
(LPE) of monolayer graphene initiated the use of these printable materials.35 Since then, multiple
2D materials, including graphene,36, 37 transition metal dichalcogenides (TMDs),38, 39 hexagonal
boron nitride (h-BN),6, 37, 40-42 and black phosphorus (BP)43 have been developed into inks for
electronic applications, such as semiconducting channels,5 conducting electrodes,6, 42, 44-46 and
insulating dielectrics.6, 40, 42 Notably, in 2017, McManus et al. proposed a protocol to prepare
water-based 2D material inks for direct-write printing.38 Such inks provide an attractive solution
for the problems frequently encountered during LPE methods, such as solvent toxicity and high
process temperature. Printed 2D material films exhibit extraordinary properties of flexibility and
environmental stability;36, 40 yet, their electronic properties are typically worse than those of the
1D alternatives. For example, the conductivity of printed graphene and mobility of
semiconducting MoS2, are significantly lower than their 1D alternatives such as AgNWs and
semiconducting CNTs, respectively.5, 8, 27, 36 Even still, there are other electronic properties, such
as the dielectric performance of h-BN thin films,42 that are of high enough importance to
motivate further investigation. Designed initially for inkjet printing, water-based h-BN ink
presents thermal and dielectric properties that show promise for print-in-place applications using
aerosol jet-printing—41, 42 a technology with several advantages compared to standard inkjet
printing.
Aerosol jet printing includes a sheath gas flow that impedes the direct contact between
the ink and the sidewall of the nozzle, thus preventing the ink from blocking the nozzle (Fig. S1),
which is one of the major issues encountered by inkjet printing. In addition, an aerosol jet printer
is much less demanding on ink rheology than a commonly used piezoelectric inkjet printer,38
allowing for wide ink compatibility and rigorous ink formulation tuning. Even though these
features make aerosol jet printing especially suitable for 2D materials, aerosol jet printing of 2D
material-based inks has been barely demonstrated.47
In this study, we realize the aerosol jet printing of water-based h-BN inks and
demonstrate a fully printed, top-gated and flexible 1D-2D thin-film transistor (1D-2D TFT). The
1D-2D TFT exploits 1D and 2D nanostructures with the best properties for a transistor, including
h-BN used as a gate dielectric, a semiconducting CNT channel, and AgNWs as source, drain,
and gate electrodes. Each component is deposited through aerosol jet printing (Fig. 1), and the
highest temperature used during the entire printing process is 80 °C on the printer platen, which
is the lowest temperature reported for printing CNT-TFTs to date (Table S1). The dielectric
properties of the resultant films were investigated via profilometry and capacitance
measurements, and a clean h-BN/AgNW interface was confirmed using scanning electron
microscopy (SEM). While benefiting from the convenience of low-temperature steps, the
resulting performance of the 1D-2D TFTs is on par with previously reported fully printed TFTs,
with high ON-OFF current ratio, mechanical flexibility, and minimal hysteresis. The short-term
and long-term effects of a 150 °C annealing are examined, revealing that such a postprinting
treatment is nonessential for maximizing the device performance. Furthermore, we demonstrate
the ability to realize these flexible 1D-2D TFTs with a full print-in-place process, without any
external baking, washing, or coating steps away from the printer.
RESULTS AND DISCUSSION
The fabrication process of a flexible 1D-2D TFT on a polyimide (Kapton) substrate is
illustrated in Fig. 1a, with detailed description in the Materials and Methods section. In brief, the
cleaned and functionalized substrate was loaded onto the platen, and CNT ink (99.9%
semiconducting, 0.05 mg/mL concentration) diluted from commercial ink (IsoSol-S100,
NanoIntegris) was printed onto the channel region at room temperature. The channel region was
rinsed with toluene either externally or in-place, resulting in two different process flows. The
external rinsing process was carried out in a fume hood where the channel region was first rinsed
with room-temperature toluene followed by a 70 °C toluene bath to aid in the removal of
polymer surfactant. In processing some of the devices, the rinsing and toluene bath step was
replaced by a simplified in-place alternative during which the platen temperature of the printer
was increased to 80 °C, and a brief toluene rinse was applied onto the channel region for 20 s
(see Video S1). The resulting CNT network is illustrated in Fig. 1d and has a CNT film density
around 13 nanotubes/µm2. Note that once the sample was placed onto the printer, only the
external rinsing step was carried out away from the printer, which means that for the process
flow with in-place rinsing, the whole printing process was carried out in-place without removal
of the substrate from the platen.
Figure 1. Flexible and fully print-in-place 1D-2D TFTs (steps II – VI are performed without removing substrate from printer platen). a) Schematic illustration of the fabrication process flow including: I) substrate preparation with poly-L-lysine (PLL) functionalization, II) printing the carbon nanotube (CNT) channel, III) rinsing the CNT thin-film channel, IV) printing the AgNW
source/drain (S/D) electrodes, V) printing the h-BN gate dielectric layer, and VI) printing the AgNW gate electrode. b) Photo and c) optical image of TFTs after the fabrication process. d) Atomic force microscopy (AFM) image of a printed CNT channel after rinsing.
After the CNT channel was printed and rinsed, AgNW source/drain (S/D) electrodes, h-
BN dielectric, and AgNW gate electrodes were then sequentially printed with the corresponding
as-prepared inks. The platen temperature was kept at 80 °C during the S/D and gate stack
processes. The AgNW and h-BN nanostructures were prepared as described in references27, 42
with a concentration of 10 mg/mL and 2 mg/mL, respectively. Because of the low temperatures
available for in-place printing and the aqueous nature of h-BN and AgNW inks, remixing at the
h-BN/AgNW interface, caused by the nonorthogonal solvent systems,48 is a significant concern,
likely to result in inferior interfacial definition and ultimately device failure. Typically, binders,
such as cellulose36, 40 or gum,38, 42 are added to each ink to hinder the interfacial redispersion of the
constituent materials. In this work, propylene glycol and hydroxypropyl methylcellulose
(HPMC) were added as a secondary solvent and binder, respectively, to modify the inks’
rheological properties (Fig. S3). We used HPMC as the binder due to its water solubility,
biocompatibility, and ability to introduce rheology modification at low concentration. The
improved rheological properties, especially a higher viscosity, served to impede the diffusion of
materials, thus alleviating the potential for interfacial redispersion. 38, 40, 42 Furthermore, in
addition to increasing the ink viscosity, the presence of propylene glycol in aqueous inks also
manipulates the Marangoni flow, which further suppresses an unwanted coffee-ring effect (Fig.
S3c).38, 49 Detailed ink preparation and formulation is described in the Materials and Methods
section.
As this low-temperature printed AgNW/h-BN interface is of great significance to the
operation of the ultimate 1D-2D TFTs, it was studied in detail. To do so, capacitor-like
heterojunctions of AgNWs and h-BN were printed on SiO2 (300 nm)/Si substrates. Film
morphology as well as the cross-sections of various regions of the junctions were studied using
an SEM (Fig. 2). The capacitor cross-section (Fig. 2i) indicates clear interfaces between the h-
BN and both the top and bottom AgNW films. No substantial remixing at the interfaces was
observed despite the fact that both the AgNW and h-BN inks are water-based—a major
milestone in realizing compatible, in-place printing of such diverse layers (Fig. S4). It is also
noticeable that the AgNW film directly printed on the SiO2/Si substrate (Fig. 2f, g) shows a film
uniformity higher than that of the AgNW layer on top of the h-BN film (Fig. 2i, j). A possible
cause is the surface roughness of the h-BN film (Fig. 2d, e), which is a result of overspray and
aggregation of the 2D nanoflakes. A study of the film thickness was carried out via profilometry
measurements (Fig. S6), and the results are consistent with SEM imaging (Fig. 2i). Additionally,
a linear relationship between the number of printing passes and the film thickness was confirmed
(Fig. S6c).
Figure 2. Fully printed h-BN capacitor structures. a) and b) Photographs of printed AgNW/h-BN/AgNW heterostructures with colored dots indicating locations for SEM images. c) Schematic diagram illustrating the cross-section of the printed stack and locations of SEM images. d-e) Top-view SEM images of h-BN film printed directly on SiO2/Si substrate with individual h-BN flakes visible. SEM images of AgNW film printed directly on SiO2/Si substrate from both f) cross-sectional and g-h) top views. SEM images of the AgNW/h-BN/AgNW stack from both i) cross-sectional and j-k) top views.
The dielectric properties of the h-BN network were studied using a capacitor structure
fabricated on a Kapton substrate (Fig. 3) to avoid parasitic capacitance from silicon. Large Cr (5
nm) /Au (70 nm) pads were evaporated onto 127-µm-thick Kapton substrates and utilized as
bottom electrodes to minimize the impact of interface roughness (Fig. S5). After the h-BN was
printed, AgNW networks were printed as the top electrodes with an effective area of 0.664 mm2.
Capacitors of increasing h-BN layers/thicknesses were printed and then analyzed, showing an
inverse linear dependence between the film thickness and capacitance (Fig. 3c), as expected. The
ideal capacitance behavior over the frequency range between 1 kHz and 1 MHz was confirmed
via impedance spectroscopic analysis (Fig. S7). A dielectric constant ϵ r ≈ 3.01 was extracted
using the standard parallel plate capacitance equation: C=ϵ r ϵ 0 A / t . This relative permittivity is
lower than that of bulk h-BN material, which has been found to have ϵ r ≈ 4.2.50 Some previous
reports on printed h-BN films present results similar to this work,6 whereas others report slightly
higher values.40, 42 The difference in dielectric constant could either originate from the film
porosity, ink additives, flake orientation, 42 electrode coverage, or the extra capacitance from the
porosity of AgNW films (Fig. 2k).
Figure 3. Dielectric properties of aerosol jet printed h-BN thin film. a) Schematic diagram showing the capacitor structure. b) Small signal capacitance per unit area versus frequency of gold/h-BN/AgNW capacitors with varied dielectric thicknesses determined by the number of print passes. DC bias was set at 2 V and a small AC signal amplitude of 50 mV was applied. c) Linear fitting between the reciprocal of printed h-BN dielectric thickness and the corresponding film capacitance. Each capacitance is the average from three capacitors, with error bars denoting standard deviation, and the thickness is determined via profilometry measurements shown in Fig S6.
With the properties of the printed 2D h-BN dielectric film understood, the layer was
employed as the gate dielectric for a fully printed CNT-TFT; with a channel of 1D CNTs,
dielectric of 2D h-BN, and contacts of colloquially 1D AgNWs, the resultant device is referred to
as a 1D-2D TFT (Fig. 1). The electrical performance of a representative printed 1D-2D TFT,
including the subthreshold, transfer, and output behavior, is demonstrated in Fig. 4a and 4b. The
ON-OFF current ratio of the examined device is I ON / IOFF ≈ 6 ×104 with an ON-state current
I ON=0.78 μA. The channel mobility is approximately μ=4.18c m2 ·V −1 · s−1 and is extracted
using the equation μ=(L¿¿CH g¿¿ m)/(W CH∗COX∗V DS)¿¿, where LCH and W CH are the length
and width of the channel, respectively, gm is the peak transconductance, V DS is the voltage
between the drain and source electrodes, and COX=1.04 nF·c m−2 is the dielectric capacitance per
unit area extracted from the fitting curve in Fig. 3c with 3 printing passes. The average +/-
standard deviation for mobility and ON/OFF current ratio are μ=4.0 ± 2.6 cm2 ·V −1 · s−1 and
log (ION / IOFF)≈ 4.76 ± 0.42, respectively, with the best performance achieved on different
devices reaching μm=10.2c m2 · V−1 · s−1 and (I ON / IOFF)m ≈ 3.5 ×105. Gate leakage is on the same
order of magnitude as the noise level (Fig. S8).
It has been shown that the size of constituent nanomaterials within a thin film will often
be a significant factor in determining the electrical properties of the film.51, 52 This is based on the
dominant contribution of carrier transport at the junctions between nanomaterials. In the case of
the semiconducting CNT thin-film channels in this work, the diameter range and the average
length of the nanotubes were 1.2 – 1.4 nm and 2 µm, respectively, thus resulting in a film that is
undoubtedly dominated by percolation transport across junctions. Note that Fig. 1d suggests a
relatively low CNT density (~13 CNTs/µm2) compared with many previous works on CNT-
based networks,8, 53, 54 , thus the parallel capacitance extracted from Fig. 3c would be over-
estimated. Therefore we adopted a more rigorous model on gate-CNT coupling,21, 55 which gives
a slightly higher mobility estimation of μ=4.2 ±2.7 cm2 · V−1 · s−1 and μm=10.7 cm2 ·V −1 · s−1 (See
Note S1).
The only non-printing step required for fully print-in-place 1D-2D TFTs is the rinsing of
the CNT layer after it is printed. This step can either be completed external from the printer
followed by a bath in hot toluene, or in situ on the printer without moving the substrate to enable
a full print-in-place process. Recent work suggested that in-place rinsing resulted in a CNT film
with electrical properties that are on par with those of externally rinsed films.13 A similar
comparison was made for these 1D-2D TFTs. Subthreshold and transfer characteristics of an in-
place rinsed (fully print-in-place) device and an externally rinsed (normally printed) device are
shown in Fig. 4c, with more analysis of print-in-place devices provided in Fig. S9 and S10b. It is
noticeable that 1D-2D TFTs with either rinsing step give a similar ON-current and I ON / IOFF ,
whereas the threshold voltage of the in-place rinsed device is slightly more negative. These
results show that in-place printing can be used to fabricate 1D-2D TFTs in a simpler fashion
without sacrificing device performance.
Figure 4. Electrical performance of fully printed 1D-2D TFTs. a) Transfer (solid lines) and subthreshold (dashed lines) characteristics of a printed 1D-2D TFT with external rinsing. b) Output characteristics of the same device in a). c) Comparison of transfer (solid lines) and subthreshold (dashed lines) characteristics between in-place rinsed and externally rinsed 1D-2D TFTs.
Although gate hysteresis has been a major obstacle to more prevalent applications of
CNT-TFTs,25 the printed 1D-2D TFTs exhibit little hysteresis, as is shown in Fig. S10. Among
11 TFTs analyzed, the maximum and minimum values of hysteresis extracted are 4.70 and 0.16
V respectively, with an average value of 1.5 ± 1.6 V. Most devices show hysteresis below 1V
over an 80 V gate swing range (i.e., hysteresis of < 1.3% of the gate swing). No substantial
difference between in-place rinsed TFTs and externally rinsed TFTs is observed for hysteresis.
Such performance is attributed to the top-gate device structure as the dielectric/ambient
interfacial traps are a dominant cause of gate hysteresis,56 and the gate stack serves as an
encapsulant against ambient conditions.57 Hysteresis becomes smaller under higher scan rate (as
seen in Fig. S10c), which is due to the rate limiting behavior of charge traps. 57
To ensure that a high-temperature treatment is not necessary for the 1D-2D TFTs, the
effect of annealing on the printed devices was also studied. In Fig. S11, the subthreshold
(transfer) characteristics of a 1D-2D TFT before, right after, 1 day after and 3 days after a 150 °C
annealing in a vacuum oven (Isotemp 281A) are demonstrated. Surprisingly, both the threshold
voltage and transconductance exhibited a small negative shift right after annealing, and then both
gradually stabilized at their initial states. Despite a small increase in the transconductance after
the annealing-and-recovery process, possibly due to the decompositions of impurities, it is safe
to state that annealing does not have any significant long-term effects on the printed 1D-2D
TFTs. That is very different from many commonly used printable dielectric materials, such as
polymers, which usually go through a high-temperature treatment during the fabrication process
in order to yield their best possible characteristics. The temporary negative shift in threshold
voltage and transconductance right after annealing could either originate from the channel or the
gate stack, and although it is not going to be discussed in detail in this study, it is an interesting
topic for future research. Ultimately, this finding that a high temperature annealing of a printed
h-BN film does not provide any performance enhancement is quite transformative for the printed
electronics space and particularly for direct-write, print-in-place approaches.
The mechanical flexibility of printed 1D-2D TFTs is shown in Fig. 5. The devices exhibit
insignificant change in subthreshold (transfer) performance after 1000 bending cycles at 3-mm
radius and survive a bending radius as low as 2 mm (3.2% strain), demonstrating impressive
stability under mechanical flexing. Such flexibility is enabled by the network structure of the
nanotubes, h-BN nanoflakes and the nanowires—a direct benefit of the 1D-2D nature of these
TFTs. Interestingly, the ON-current of TFTs even increased slightly when the bending radius
was ~3 mm; however, the performance did begin to decrease at smaller bending radii (Fig. 5a).
Such phenomenon may be attributed to a widened channel and a stretched dielectric layer under
moderate tensile stress (below 2.1%) along the S/D electrodes. Due to the negative correlation
between strain ε and substrate thickness t, implementing thinner substrates is a practical way to
achieve smaller bending radii. For the same TFT on a 25 µm-thick substrate, for instance, a
conservative estimation of the bending radius limit would be around 0.4 mm (Fig. 5c) according
to a simplified model of ϵ=t /2 r. A comparison of the bending performance of these 1D-2D
TFTs against other printed, CNT-based TFTs is provided in Table S1; note, there has yet to be a
particular metric that is consistently reported for benchmarking performance under strain, so the
maximum demonstrated strain is simply provided for comparison. Future work should be done
with these and other printed, flexible devices to ascertain the strain limit that the devices can
endure. 1D-2D TFTs could also be printed on flexible substrates other than Kapton, as we
demonstrate with devices printed on paper, which is low-cost and relatively rough (not electronic
grade or designed for printed electronics) (Fig. S12). As shown in Fig. S12b, despite a higher
OFF-state leakage current, which is attributed to the substrate roughness, a decent gate
modulation is achieved, with an ON-OFF current ratio higher than 1000. The compatibility of
1D-2D TFTs with low-cost paper substrates exemplifies the significant applicability of this low-
temperature, in-place printing process.
Figure 5. Flexibility test of printed 1D-2D TFTs. Subthreshold characteristics of a printed 1D-2D TFT taken while a) the device is flexed at different bending radii and b) after different numbers of bending cycles with a bending radius of 3 mm (~2.1% strain). c) Estimated strain with respect to bending radius for various substrate thickness. The green dashed line gives the strain when the 127µm substrate from this work is bent at 2 mm radius. The inset is a photograph of 1D-2D TFTs bent at a radius of 3 mm.
To benchmark the performance of in-place printed 1D-2D TFTs enabled by the
utilization of aerosol jet-printed h-BN, a comprehensive comparison between the 1D-2D TFTs
and other printed flexible CNT-TFTs in the literature8, 14, 25, 30-33 is shown in Fig. 6. In general,
although printed-in-place at the lowest overall process temperature of any CNT-TFT printed to
date, the devices reported in this work yield high performance relative to previous reports. As
presented in Fig 6a, the 1D-2D TFTs exhibit mobility comparable with most CNT-TFTs utilizing
common dielectrics (e.g., BaTiO3 or polymers). The high ON/OFF current ratio (Fig. 6b) is
partly attributed to the relatively low CNT film density. While a significantly higher mobility is
achievable, this is usually realized by drastically increasing the density of the CNT networks,
which would inevitably compromise the ON/OFF current ratio (as seen in ref. 30).
Figure 6. Benchmarking performance of 1D-2D TFTs with previously reported printed, flexible CNT-TFTs. Comparison between the maximum process temperature, (a) effective hole mobility, and (b) ON/OFF current ratio. Diamonds refer to the average or the typical results, whereas circles refer to the best results reported.
CONCLUSION
In summary, we demonstrated a fully in-place aerosol jet-printed 1D-2D TFT structure
using a CNT channel, a h-BN dielectric layer, and AgNW electrodes at the lowest overall
process temperature ever reported (maximum process temperature of 80 °C). The use of 1D and
2D nanomaterials with the best properties for transistor operation allowed us to achieve
outstanding performance, even under bending conditions. In addition to in-place printing, a low
processing temperature is also favorable in that it makes a step toward direct-write electronics
onto thermally sensitive surfaces. The printing process could be carried out on low-cost flexible
substrates, including paper. It was discovered that the printed h-BN dielectric does not benefit
from subsequent annealing or other high-temperature treatments for optimizing dielectric
performance—a major finding for realizing low-temperature printed dielectric films. These
discoveries boost the development of flexible electronic device fabrication techniques toward a
simple, low-cost, and fully print-in-place approach.
MATERIALS AND METHODS
Substrate Cleaning and Functionalization
Substrate cleaning of SiO2 (300 nm)/Si and Kapton (127 µm) includes a 5-min
ultrasonication in acetone and isopropyl alcohol (IPA) each, followed by a deionized (DI) water
rinse and a nitrogen blow drying. Substrates were then immersed in 0.1% w/v poly-L-lysine
(PLL) / water solution (Sigma-Aldrich) for 5 min, rinsed with DI water, and dried in nitrogen to
increase CNT adhesion. Substrate cleaning of paper (Mohawk Color Copy Gloss, Pure White, 80
text) includes a 5 min ultrasonication in acetone followed by an IPA rinse and nitrogen blow
drying.
CNT Printing
The 99.9% semiconducting CNT ink (IsoSol-S100, NanoIntegris) was purchased from
NanoIntegris with a concentration of 0.1 mg/mL. To print CNTs on Kapton, the ink was diluted
to a concentration of 0.05 mg/mL with toluene before printing. An Optomec AJ300 aerosol jet
printer with a 150 µm diameter nozzle was used to print CNTs. The printing speed was 8 mm/s,
and during the printing process, the platen temperature was kept at 23 °C (room temperature).
The sheath flow rate and the carrier gas flow rate were set to be 25 and 38 sccm, respectively,
and 330 mA ultrasonic atomizer current was applied. A single pass of CNT ink was printed for
CNT channels. To print CNTs on paper, the ink concentration, the printing speed, the sheath
flow rate, and the carrier gas flow rate were set to be 0.02 mg/mL, 2 mm/s, 40 sccm, and 23
sccm, respectively. The platen temperature, the ultrasonic atomizer current, and the number of
printing passes were the same as those for printing CNTs on Kapton.
In-Place and External Rinsing
For in-place rinsing, the platen temperature was first increased to 80 °C once the CNT
printing had been finished, and toluene was then applied onto the channel region by a squeeze
bottle. This rinsing step lasted for about 20 s and was followed by an immediate blow-drying
step using a nitrogen gun (see Supporting Video 1).
External rinsing was carried out in a fume hood. The channel region was first rinsed with
toluene by a squeeze bottle for about 30 seconds, and the sample was then immersed in 70 °C
toluene for another minute to further remove the polymer surfactant. After taking the sample out
from the hot toluene bath, another brief toluene rinse was carried out using the squeeze bottle,
and the sample was blow dried with nitrogen.
h-BN Ink Preparation and Characterization
h-BN ink was prepared according to the ultrasonic-assisted liquid phase exfoliation
protocol described in ref 41. In brief, bulk hexagonal boron nitride powder (Sigma-Aldrich, >1
µm, 98% grade) was dispersed to a concentration of ~3 mg mL-1 in DI water (resistivity 18.2 MΩ
cm), along with 1-pyrenesulfonic acid sodium salt (PS1) (Sigma-Aldrich, purity ≥ 97%)
dispersed to a concentration of 1 mg mL-1. After sonication for 120 h in a 300 W Hilsonic HS
1900/Hilsonic FMG 600 bath sonicator at 20 °C, the dispersion underwent a series of
centrifugation steps using a Sigma 1-14K refrigerated centrifuge. 42 The first centrifugation step
was performed at 3500 rpm for 20 min (g factor = 903), designed to separate out any bulk,
nonexfoliated flakes which may remain. Subsequently, three washing centrifugation steps were
performed, in which the excess PS1-containing solution was replaced with pure DI water.
The concentration of the h-BN dispersion was derived through UV-vis spectroscopy,
using a Varian Cary 5000 UV−vis spectrometer and the Beer−Lambert law, for which the
absorbance was taken at a wavelength of 550 nm and an extinction coefficient of 1000 L g-1 m-1
was used.58 Details of the lateral size and thickness characterization of the resultant h-BN flakes
are given in ref 42. In brief, most of the flakes are single and few layers and have lateral size
between 85 and 230 nm. The resulting dispersion has a concentration of 2 mg/mL, and 0.11