VLSI_Class_Notes_20_A Startup Guide to Cadence Schematic Capture & Virtuoso

Krishna Chaitanya Mojjada

A Startup guide to Cadence

Schematic Composer & Virtuoso

Adapted from Cadence Design Environment- A tutorial

By

Antonio J. Lopez Martin

New Mexico State University

What is Cadence & Why? What?

Cadence is an Electronic Design Automation environment that allows integrating in a single framework different applications and tools, allowing to support all the stages of IC design and verification from a single environment.

A design kit is a set of technology and configuration files which customize the cadence environment to cater to the specific design needs.

Why?

Adaptable to almost every fabrication technology.

Easy to learn and use. A lot of support available for trouble shooting.( Cadence knowledge base and Google can solve literally every problem one might have owing to its global use)

Extensively used by industry. (Jobs!! We like that)

Cadence Setup Make sure you have an account in LNX servers (ECE

Account). Set it up on 2nd Floor NEB Computer Lab with a valid Gator ID

To work off campus you need to remotely login(SSH) to the LNX servers using X Windows servers like X-win 32 or Xmanager

Open a terminal window and make a new directory for your class work(mkdir) and run cadence from that directory as demonstrated in this lecture.

Cadence is pre-configured for NCSU Design Kit

Tech-file will be supplied by your TA

Simulation Demo

• “Reality leaves a lot to the imagination.”

― John Lennon

CIW

• Work is managed using libraries

in Cadence

• Each library contains cell

views(schematic, layout,

extracted, symbol ..etc)

• Three types of libraries

(Common Cadence libraries,

Supplied with Design Kit, User

libraries). All of them managed

by Library Manager

Layout Demo

• “Reality is frequently inaccurate.”

― Douglas Adams, The Restaurant at the End of the Universe

Layout Checks

DRC

LVS

ERC

Antenna DRC ( Antenna Effects)

Some useful Tips:

Thickness of metal line conductors

Symmetry

Area Area Area!!

Useful Links

http://www.groupes.polymtl.ca/gbm8320/CADENCE_M

anual.pdf ( The basis of this tutorial )

http://www.cse.psu.edu/~kyusun/class/cmpen411/12s/h

w/hw1/CadenceLayoutTips.pdf

http://www.eng.tau.ac.il/research/laboratories/VLSI_lab/

VirtuosoTut1.pdf

Many more on Google

To do

Running Cadence

Model Schematic

Model Layout

DRC and LVS check

Questions?