References
A. Chandrakasan and R. Brodersen, Low Power CMOS Design Kluwer
Academic Publishers, 1995.J. Rabaey and M. Pedram, Ed., ow Power
Design Methodologies Kluwer Academic Publishers, 1995.Proceedings
of the IEEE, Special Issue on Low Power, April 1995.
VADA Lab.
Booth Multiplier , ,
VADA Lab.
Instruction Level Power AnalysisEstimate power dissipation of
instruction sequences and power dissipation of a programEb : base
cost of individual instructions Es : circuit state change
effects
EM : the overall energy cost of a program Bi : the base cost of
type i instruction Ni : the number of type i instruction Oi,j : the
cost occurred when a type i instruction is followed by a type j
instruction Ni,j : the number of occurrences when a type i
instruction is immediately followed by a type j instruction
VADA Lab.
Instruction orderingDevelop a technique of operand
swappingRecoding weight : necessary operation cost of operands
Wtotal : total recoding weight of input operand Wi : weight of
individual recoded digit i in Booth Multiplier Wb : base weight of
an instruction Winter : inter-operation weight of
instructionsTherefore, if an operand has lower Wtotal , put it in
the second input(multiplier).
VADA Lab.
RESULT
VADA Lab.
References[1] Gary K. Yeap, "Practical Low Power Digital VLSI
Design", Kluwer Academic Publishers.[2] Jan M. Rabaey, Massoud
Pedram, "Low Power Design Methodologies", Kluwer Academic
Publishers.[3] Abdellatif Bellaouar, Mohamed I. Elmasry, "Low-Power
Digital VLSI Design Circuits And Systems", Kluwer Academic
Publishers.[4] Anantha P. Chandrakasan, Robert W. Brodersen, "Low
Power Digital CMOS Design", Kluwer Academic Publishers.[5] Dr.
Ralph Cavin, Dr. Wentai Liu, "1996 Emerging Technologies :
Designing Low Power Digital Systems"[6] Muhammad S. Elrabaa, Issam
S. Abu-Khater, Mohamed I. Elmasry, "Advanced Low-Power Digital
Circuit Techniques", Kluwer Academic Publishers.
VADA Lab.
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