UNIVERSITI MALAYSIA PERLIS DMT 112 Circuit Theory I …portal.unimap.edu.my/portal/page/portal30/Lecture...and resistance based on Ohm’s Law. [Voltan, arus dan rintangan adalah elemen

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UNIVERSITI MALAYSIA PERLIS

Peperiksaan Semester Pertama

Sidang Akademik 2014/2015

Oktober 2014

DMT 112 – Circuit Theory I

[Teori Litar I]

Please make sure that this question paper has THIRTEEN (13) printed pages including

this front page before you start the examination. [Sila pastikan kertas soalan ini mengandungi TIGA BELAS (13) muka surat yang bercetak termasuk muka

hadapan sebelum anda memulakan peperiksaan ini.]

This question paper has SIX (6) questions. Answer any FIVE (5) questions only. Each

question contributes 20 marks. [Kertas soalan ini mengandungi ENAM (6) soalan. Jawab mana-mana LIMA (5) soalan sahaja. Markah

bagi tiap-tiap soalan adalah 20 markah.]

Appendix for formula is given. [Lampiran untuk formula diberi.]

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Question 1 [Soalan 1]

(a) (i) Voltage, current and resistance are essential element of an electrical

circuit. Using your own words, relate the relationship for voltage, current

and resistance based on Ohm’s Law. [Voltan, arus dan rintangan adalah elemen penting dalam litar elektrik. Menggunakan

perkataan anda sendiri, kaitkan hubungan untuk voltan, arus dan rintangan berdasarkan

Hukum Ohm.]

(2 Marks/ Markah)

(ii) Figure 1(a) show a graph of current versus voltage for three resistance

values. Based on the graph, determine the resistances of R1, R2 and R3. [Rajah 1(a) menunjukkan graf arus melawan voltan bagi tiga nilai rintangan.

Berdasarkan graf tersebut, tentukan rintangan bagi R1, R2 dan R3.]

(6 Marks/ Markah)

Figure 1(a) [Rajah 1(a)]

.…3/-

6

5

4

3

2

1

1 2 3 4 5 6

I (mA)

V (V)

R1

R2

R3

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(b) Illustrate each of the following term by using a suitable circuit diagram: [Gambarkan setiap istilah berikut dengan menggunakan gambarajah litar yang sesuai:]

(4 Marks/ Markah)

(i) Branch. [Cabang.]

(ii) Node. [Nod.]

(iii) Loop. [Gelung.]

(iv) Mesh. [Jejaring.]

(c) Simplified the circuit in Figure 1(b) by using the concept of source

transformation and calculate the voltage, Vo. [Permudahkan litar dalam Rajah 1(b) dengan menggunakan konsep jelmaan punca dan kirakan

voltan, Vo.]

(8 Marks/ Markah)

10 Ω

40 Ω

12 Ω 20 Ω

50 V 8 A 40 V

Vo

Figure 1(b) [Rajah 1(b)]

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Question 2 [Soalan 2]

(a) (i) State Kirchhoff’s laws on voltage and currents. [Nyatakan hukum Kirchhoff bagi voltan dan arus.]

(4 Marks/ Markah)

(ii) Based on Figure 2(a), calculate voltage, Va using Kirchhoff’s current and

voltage law. [Berdasarkan Rajah 2(a), kirakan voltan, Va menggunakan hukum Kirchhoff arus dan

voltan.]

(6 Marks/ Markah)

1 Ω

3 Ω

6 Ω

5 V3 AVa

Figure 2(a) [Rajah 2(a)]

.…5/-

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(b) Based on the circuit in Figure 2(b), calculate; [Berdasarkan litar dalam Rajah 2(b), kirakan;]

(i) the equivalent resistance, Req. [rintangan setara, Req.]

(3 Marks/ Markah)

(ii) the total current, IT. [jumlah arus, IT.]

(2 Marks/ Markah)

(iii) the power absorbed by the voltage source. [kuasa terserap oleh sumber voltan.]

(2 Marks/ Markah)

(iv) current, I1 using current divider rule. [arus, I1 menggunakan aturan pembahagi arus.]

(3 Marks/ Markah)

30 Ω 30 Ω

25 Ω

40 Ω

30 Ω

60 Ω

10 Ω

20 Ω

50 Ω

20 V

ITI1

Figure 2(b) [Rajah 2(b)]

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Question 3 [Soalan 3]

(a) (i) The objective of node analysis is to find unknown node voltage. List down

the steps for node analysis. [Objektif analisis nod adalah untuk mencari voltan nod yang tidak diketahui. Senaraikan

langkah-langkah untuk analisis nod.]

(4 Marks/ Markah)

(ii) Calculate current, i1 using node analysis method based on the circuit in

Figure 3(a). [Kirakan arus, i1 menggunakan analisis nod berdasarkan litar dalam Rajah 3(a).]

(7 Marks/ Markah)

10 A 10 Ω

10 Ω

10 Ω8 V

12 A10 Ω

V1 V2

i1

Figure 3(a) [Rajah 3(a)]

.…7/-

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(b) Refering to Figure 3(b), calculate current, Ix using mesh analysis. [Merujuk kepada Rajah 3(b), kirakan arus, Ix menggunakan analisis jejaring.]

(9 Marks/ Markah)

20 A 40 Ω

10 Ω

20 V

4Ix

Ix

Figure 3(b) [Rajah 3(b)]

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Question 4 [Soalan 4]

(a) (i) Based on the basic structure of a capacitor in Figure 4(a), explain how a

capacitor storing charges. [Berdasarkan struktur asas sebuah pemuat dalam Rajah 4(a) terangkan bagaimana

pemuat menyimpan cas.]

(4 Marks/ Markah)

R

A

B

Figure 4(a) [Rajah 4(a)]

(ii) Obtain the energy stored in each capacitor under dc conditions as in

Figure 4(b). [Dapatkan tenaga yang tersimpan dalam setiap pemuat di bawah keadaan dc seperti

dalam Rajah 4(b).]

(8 Marks/ Markah)

4 mF

4 kΩ

6 kΩ

10 kΩ

8 mF

8 kΩ12 mA

Figure 4(b) [Rajah 4(b)]

.…9/-

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(b) Based on Figure 4(c), calculate the equivalent inductance. [Berdasarkan Rajah 4(c), kirakan kearuhan setara.]

(4 Marks/ Markah)

L1

20 mH

L5

6 mH

L4

12 mH

L2

4 mH

L3

8 mH

Figure 4(c) [Rajah 4(c)]

(c) Given the arrangement of capacitors in Figure 4(d), calculate the equivalent

capacitance. [Diberi susunan pemuat-pemuat dalam Rajah 4(d), kirakan kemuatan setara.]

(4 Marks/ Markah)

C1

12 µF

C2

1.2 µF

C3

1.8 µF

C6

2.2 µF

C4

3 µF

C5

4.5 µF

Figure 4(d) [Rajah 4(d)]

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Question 5 [Soalan 5]

(a) State the definition of Thevenin’s equivalent circuit. [Nyatakan definisi litar setara Thevenin.]

(2 Marks/ Markah)

(b) Based on Figure 5, calculate; [Berdasarkan Rajah 5, kirakan;]

(i) Thevenin’s voltage, VTH. [voltan Thevenin, VTH.]

(6 Marks/ Markah)

(ii) Thevenin’s equivalent resistance, RTH. [rintangan setara Thevenin, RTH.]

(4 Marks/ Markah)

(iii) value of RL when maximum power is transferred. [nilai RL apabila kuasa maksimum dipindahkan.]

(2 Marks/ Markah)

(iv) the maximum power transfer, Pmax. [pemindahan kuasa maksimum, Pmax.]

(2 Marks/ Markah)

(v) sketch the equivalents Thevenin’s and Norton’s network. [lakarkan rangkaian setara Thevenin dan Norton.]

(4 Marks/ Markah)

1 A 6 Ω

14 Ω

3 A 5 Ω RL

a

b

14 V

Figure 5 [Rajah 5]

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Question 6 [Soalan 6]

(a) A source free RL circuit is shown in Figure 6(a). The switch has been closed for

a long time and is opened at t = 0. Calculate; [Suatu litar bebas sumber RL ditunjukkan dalam Rajah 6(a). Suis telah ditutup untuk masa yang

lama dan dibuka pada t = 0. Kirakan;]

(i) the initial value of current, iL(0). [nilai arus awalan, iL(0).]

(2 Marks/ Markah)

(ii) the time constant, τ of the circuit for t > 0. [pemalar masa, τ bagi litar untuk t > 0.]

(3 Marks/ Markah)

(iii) numerical expression for iL(t) for t ≥ 0. [persamaan berangka bagi iL(t) untuk t ≥ 0.]

(1 Mark/ Markah)

(iv) current io(t) for t ≥ 0 using current divider rule. [arus io(t) untuk t ≥ 0 menggunakan aturan pembahagi arus.]

(2 Marks/ Markah)

(v) voltage Vo(t) for t ≥ 0. [voltage Vo(t) untuk t ≥ 0.]

(2 Marks/ Markah)

20 A 0.1 Ω 2 H

20 Ω

10 Ω 40 Ω

t = 0

iLio

Vo

Figure 6(a) [Rajah 6(a)]

.…12/-

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(b) The switch in Figure 6(b) has been in position a for a long time. At time t = 0, the

switch is moved to position b. Calculate; [Suis dalam Rajah 6(b) berada pada kedudukan a untuk jangkamasa yang lama. Pada masa t = 0,

suis telah dipindahkan ke kedudukan b. Kirakan;]

(i) the initial value of vc(0). [nilai awal untuk vc(0).]

(3 Marks/Markah)

(ii) the time constant, when t > 0. [pemalar masa, apabila t > 0.]

(2 Marks/Markah)

(iii) the value of vc(t) at t = 2s and t = 6s. [nilai vc(t) pada t = 2s dan t = 6s.]

(3 Marks/Markah)

(iv) the initial energy stored in the capacitor. [nilai awal tenaga yang tersimpan di dalam pemuat.]

(2 Marks/Markah)

3 kΩ

5 kΩ 0.5 mF

4 kΩ

24V 30V

a b

VC

Figure 6(b) [Rajah 6(b)]

-ooOoo-

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Appendix [Lampiran ]

𝑞 = 𝐶𝑉

𝐶 = 𝑒𝐴

𝑑

𝑖(𝑡) = 𝐶𝑑𝑣

𝑑𝑡

𝑣(𝑡) = 𝐿𝑑𝑖(𝑡)

𝑑𝑡

𝑣 =1

𝐶∫ 𝑖 𝑑𝑡 + 𝑣(𝑡0)

𝑡

𝑡0

𝑖(𝑡) = 1

𝐿∫ 𝑣(𝑡)𝑑𝑡 + 𝑖(𝑡0)

𝑡

𝑡0

𝑊 = 1

2𝐶𝑉2

𝑊 = 1

2𝐿𝑖2

𝜏 = 𝐿

𝑅

𝜏 = 𝑅𝐶

𝑖(𝑡) = 𝐼𝑜𝑒−𝑡/𝜏

𝑖(𝑡) =𝑉0

𝑅𝑒−𝑡/𝜏

𝑣𝑅(𝑡) = 𝐼𝑜𝑅𝑒−𝑡/𝜏

𝑣(𝑡) = 𝑉0𝑒−𝑡/𝜏

𝑝(𝑡) = 𝐼𝑜2𝑅𝑒−2𝑡/𝜏

𝑝(𝑡) =𝑉𝑜

2

𝑅𝑒−2𝑡/𝜏

𝑖𝐿(𝑡) = 𝑖(∞) + [𝑖(0) − 𝑖(∞)]𝑒−𝑡/𝜏

𝑣(𝑡) = 𝑣(∞) + [𝑣(0) − 𝑣(∞)]𝑒−𝑡/𝜏