Unit - IV - ADC-DAC

7/31/2019 Unit - IV - ADC-DAC

1/37

Block diagram showing Analog to Digital and Digital to Analog Converter

UNIT IV ADC & DAC


2/37

Typical Examples:


3/37

Analog to Digital Conversion The advancement of VLSI technology led to the proliferation of digital

integrated circuits and systems which perform intricate signal processing in

the digital domain.

Compared with analog signal processors, digital signal processors (DSPs)

have numerous advantages.

In digital systems, the signal is quantized into discrete levels, and a finite

number of digital code-words are transmitted, most of the noise and

interference added to the digital signal during processing or transmission

can be removed.

However, in analog systems any noise added to the signal is

indistinguishable from it and hence cant be removed.

Therefore, analog signal processing requires accurate components with

precise tolerance.


4/37

However, digital signal processing can tolerate less precise components

making digital signal processors less susceptible to temperature, ageing and

manufacturing tolerances.

Digital systems allow more intricate signal processing and offer more

extensive programmability than analog systems.

This necessitates the transformation of such signals from the analog domain

to the digital domain to make use of the powerful computational processing

power of the digital signal processors.

The digital signal then has to be transformed back to the analog domain.

This transformation is done by using analog-to-digital and digital-to-analogconverters.


5/37

Block Diagram-ADCThe low-pass filter, which is known as the anti-alias filter, band-limits the analog signal

so as to prevent aliasing from occurring in the sampler.

The sampler discretizes the signal in the time domain.

This is then followed by the quantizer, which is a many-to-one transformer that maps a

range of the continuous signal into a discrete level.

The quantizer performs approximation to the analog signal by approximating it to one of

a finite number of discrete levels.

After being quantized, the coder maps each quantized level into a binary code- word.


6/37

Block Diagram-DAC In the digital-to-analog converter (DAC), the reverse operations to those of the analog-to-

digital converter, transforms the binary code into a quantized signal level. The quantizer is a many to one transformer, i.e. it maps a range of the continuous signal into

a discrete level, hence, it has no inverse equivalent in the digital-to-analog converter.

Thus, any quantization noise added to the signal is stuck to it and cant be removed by the

digital-to-analog converter.

Finally, a low-pass filter converts the time-discrete (sampled) signal into a continuous

analog signal.


7/37

Block diagram of Digital Communication System

The signal to be transmitted is an analog signal, usually speech. This signal

is digitized by an analog-to-digital converter.

The digital signal is processed by a digital signal processor, that performs

functions such as source encoding, channel encoding, time division

multiplexing - for a TDMA system, and code spreading for a CDMA

system.

After digital processing the signal is converted back into the analog domain

by a digital-to-analog converter.

The converted analog signal can be at base band or at IF (Intermediate

Frequency).


8/37

Further analog signal processing is performed on the analog signal by an

analog signal processor.

This processing includes, frequency up conversion to the RF band,

filtering, and power amplification.

The analog signal received at the receiver is processed by an analog signal

processor that does low noise amplification, filtering, and frequency down

conversion to IF or to base band.

The signal is then digitized and processed by a digital signal processor that

despreads, demultiplexes and decodes the signal.

The digital signal is transformed back into the analog domain to get the

received replica of the transmitted signal


9/37


10/37

Wireless Communication System Overview A wireless telecommunication system conveys information, such as voice,

video or data from one location to another, by converting it into an electrical

signal and eventually into an electromagnetic wave.

At the transmitter side, a transducer converts the

information signal (which could be a sound wave for example) into an electrical

signal.

The signal is then coded and modulated by the transmitter, eventually it is

converted into an electromagnetic wave, and transmitted over a wireless

channel to the receiver.


11/37

As the signal moves across the channel it suffers different types of impairments:

1.Attenuation.

2. Multi-path propagation.

3. Shadowing.

4. Doppler frequency shift.

5. Noise.

6. Interference (co-channel and adjacent channel).

7. Nonlinear distortion.


12/37


13/37


14/37


15/37


16/37

Schematic of DAC

DAC Types:

1. Weighted Resistor type DAC

2. R 2R Ladder type DAC

3. Inverted R 2R Ladder type DAC


17/37

Weighted Resistor type DAC

Transfer Characteristicsof a 3-bit DAC


18/37

Analysis:


19/37

R 2R Ladder type DAC

Consider a 3-bit as:

at node C :


20/37

R 2R Ladder type DAC forSwitch positions 001

Equivalent circuit


21/37

Inverted R 2R Ladder type DAC

Inverted R 2R Ladder type DAC showing division of current for digital input word 001


22/37

Start EOC

ADCAnalog I/p DigitalVa O/p

VR

(Reference)

Schematic of ADC

ADC Types:1. Parallel Comparator (Flash) type ADC

2. Counter type ADC3. Servo tracking type ADC4. Successive Approximation type ADC5. Dual Slope ADC

Performance parameters of ADC:1. Resolution : 2n2. Quantization Error

3. Conversion time4. Settling time


23/37

Parallel Comparator (Flash) type ADC


24/37

Comparator and its truth table:

Truth table for a flash type ADC :


25/37

Counter type ADC

D/A output staircasewaveform


26/37

Servo tracking type ADC


27/37

Successive Approximation type ADC:


28/37

CONVERSION PROCESS:


29/37

SINGLE SLOPE ADC:


30/37

Dual Slope type ADC

Integrated output waveform for the

Dual Slope type ADC


31/37

Parameters Flash type SA type Dual Slope

Speed Fastest Fast Slow

Accuracy Less Medium More

Resolution Upto 28 Upto 216 216 (or)

more

I/p hold time Very less Depends on

No. of bits

Max.

Cost Very Costly Medium Less

Application High speed Fibre

optic communication

DSO,

Imaging devices

Data

Acquisition

Systems

Not

repeatedly

used

Comparison of ADC


32/37

Delta Modulation - DM


33/37

AdaptiveDelta Modulation - ADM


34/37

Voltage to Frequency Converter - VFC

Wide sweep multi vibrator VFC


35/37

Charge balancing VFC


36/37


37/37

Voltage to Time Converter

Unit - IV - ADC-DAC

Documents