A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date U1 LA-4381P 0.0 Cover Sheet Custom 1 41 Wednesday, January 16, 2008 2007/12/12 2008/12/12 Schematics Document U1 - KAL00 Compal Confidential AMD S1g2/ ATI RS780M / SB700
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Transcript
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D
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1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Cover Sheet
Custom
1 41
Wednesday, January 16, 2008
2007/12/12 2008/12/12
Schematics Document
U1 - KAL00
Compal Confidential
AMD S1g2/ ATI RS780M / SB700
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Block Diagrams
Custom
2 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Power On/Off CKT.
Project Code: ANRKAL0000(KAL00)
LPC BUS
page 27
Compal confidential
page 23
HT 16x16 1.6G~3.2GHZ
A-Link Express
DC/DC Interface CKT.
Power Circuit DC/DC
PCI BUS
AMD S1g2 CPU
page 33
page 34
ATI-RS780M
page 4,5,6,7
RTC CKT.
page 33
HD-Interface
page 10,11,12,13
ATI-SB700
page 17,18,19,20,21
Audio Jack
Power OK CKT.
page 17
page 31Felica Conn
page 35~42 Touch Pad CONN.
ENE KB926page 29
page 31
Int. KBDpage 31
SPI BIOSpage 29
USB 2.0
SATA GEN2
SATA HDD Conn.
ALC269Audio CKT
File Name : LA-4381P
LCD CONNpage 15
4 x PCIE
page 15
CRT
Clock GeneratorSLG8SP626VTR/ICS9LPRS476BKLFT
page 6 page 14
Thermal SensorADM1032ARM DDR-2 DDR2-SO-DIMM X2
Daul Channel DDR-2Up to 800MHz
page 8,9
page 26
RJ45 CONN
page 25
BroadcomBCM5784M
page 24
Mini Card WLAN
PCI EXPRESS
page 32USB conn x 4USB 2.0
Turion64 x2 TLxx / SempronPCB P/N:
Express Card(New Card)
page 24
Ricoh R5C833Crad Reader Controller
page 22
Media Cardpage 22
SATA ODD Conn.page 23
BUS A-->JDIM2-->UPPER SLOTBUS B-->JDIM1-->LOWER SLOT
SATA GEN2
page 28
HDMI CONNpage 16
page 23Hyper Flash
IDE
ZZZ1
15W_PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Notes
Custom
3 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Voltage Rails
VINB++CPU_CORE0,1
Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Griffin HT I/F & FANCustom
4 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
FAN1
FAN1 Control and Tachometer
40mil
close to CPU Socket
1.5A
C539
0.22
U_0
603_
10V7
K
1
2
C545 10U_0805_10V4Z~N
@1 2
JFAN1
ACES_85205-0300N~NCONN@
123G4G5
C521
180P
_040
2_50
V8J~
N
1
2
C5271000P_0402_50V7K~N
@12
C543
4.7U
_080
5_6.
3V6K
~N
1
2
D26 BAS16_SOT23-3
@12
C523
4.7U
_080
5_6.
3V6K
~N
1
2
C5400.01U_0402_16V7K1
2
C522
0.22
U_0
603_
10V7
K
1
2
C54110U_0805_10V4Z~N
@12
U25
G993P1UF_SOP8
VEN1VIN2
GND 5GND 6
GND 8
VO3VSET4
GND 7
C526
180P
_040
2_50
V8J~
N
1
2HT LINK
JCPU1A
FOX_PZ6382A-284S-41F_TURION<BOM Strucrure>
VLDT_A3D4 VLDT_A2D3 VLDT_A1D2 VLDT_A0D1
VLDT_B3 AE5VLDT_B2 AE4VLDT_B1 AE3VLDT_B0 AE2
L0_CADIN_H15N5L0_CADIN_L15P5
L0_CADIN_H14M3L0_CADIN_L14M4
L0_CADIN_H13L5L0_CADIN_L13M5
L0_CADIN_H12K3L0_CADIN_L12K4
L0_CADIN_H11H3L0_CADIN_L11H4
L0_CADIN_H10G5L0_CADIN_L10H5
L0_CADIN_H9F3L0_CADIN_L9F4
L0_CADIN_H8E5L0_CADIN_L8F5
L0_CADIN_H7N3L0_CADIN_L7N2
L0_CADIN_H6L1L0_CADIN_L6M1
L0_CADIN_H5L3L0_CADIN_L5L2
L0_CADIN_H4J1L0_CADIN_L4K1
L0_CADIN_H3G1L0_CADIN_L3H1
L0_CADIN_H2G3L0_CADIN_L2G2
L0_CADIN_H1E1L0_CADIN_L1F1
L0_CADIN_H0E3L0_CADIN_L0E2
L0_CADOUT_H15 T4L0_CADOUT_L15 T3
L0_CADOUT_H14 V5L0_CADOUT_L14 U5
L0_CADOUT_H13 V4L0_CADOUT_L13 V3
L0_CADOUT_H12 Y5L0_CADOUT_L12 W5
L0_CADOUT_H11 AB5L0_CADOUT_L11 AA5
L0_CADOUT_H10 AB4L0_CADOUT_L10 AB3
L0_CADOUT_H9 AD5L0_CADOUT_L9 AC5
L0_CADOUT_H8 AD4L0_CADOUT_L8 AD3
L0_CADOUT_H7 T1L0_CADOUT_L7 R1
L0_CADOUT_H6 U2L0_CADOUT_L6 U3
L0_CADOUT_H5 V1L0_CADOUT_L5 U1
L0_CADOUT_H4 W2L0_CADOUT_L4 W3
L0_CADOUT_H3 AA2L0_CADOUT_L3 AA3
L0_CADOUT_H2 AB1L0_CADOUT_L2 AA1
L0_CADOUT_H1 AC2L0_CADOUT_L1 AC3
L0_CADOUT_H0 AD1L0_CADOUT_L0 AC1
L0_CLKIN_H1J5L0_CLKIN_L1K5
L0_CLKIN_H0J3L0_CLKIN_L0J2
L0_CTLIN_H1P3L0_CTLIN_L1P4
L0_CTLIN_H0N1L0_CTLIN_L0P1
L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3
L0_CLKOUT_H0 Y1L0_CLKOUT_L0 W1
L0_CTLOUT_H1 T5L0_CTLOUT_L1 R5
L0_CTLOUT_H0 R2L0_CTLOUT_L0 R3
D271SS355TE-17_SOD323-2 @
12
C544
4.7U
_080
5_6.
3V6K
~N
1
2
R36410K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
DDR_A_CLK2
DDR_A_CLK1
DDR_A_CLK#1
DDR_A_CLK#2
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1
DDR_B_D33
DDR_B_D30DDR_B_D31
DDR_A_D59
DDR_B_D29
DDR_B_D35
DDR_B_D37DDR_B_D36
DDR_B_D32
DDR_B_D40
DDR_A_D9
DDR_B_D38
DDR_B_D42
DDR_B_D39
DDR_B_D41
DDR_B_D44
DDR_B_D46DDR_B_D45
DDR_B_D47DDR_B_D48
DDR_B_D43
DDR_B_D49DDR_B_D50
DDR_B_D52DDR_B_D51
DDR_B_D55DDR_B_D54
DDR_B_D57DDR_B_D56
DDR_B_D58
DDR_B_D60
DDR_B_D53
DDR_B_D62
DDR_A_DM2
DDR_A_D34
DDR_A_D21
DDR_B_D7
DDR_A_DM3
DDR_A_D46
DDR_A_DM4
DDR_B_DM0
DDR_A_D8
DDR_A_D58
DDR_A_DM5
DDR_B_DM1
DDR_B_D8
DDR_A_D33
DDR_A_D20
DDR_A_DM6
DDR_B_DM2
DDR_A_DM7
DDR_B_DM3
DDR_A_D45
DDR_B_DM4
DDR_A_D57
DDR_A_D32
DDR_B_DM5
DDR_A_D7
DDR_B_DM6
DDR_B_D63
DDR_B_D10
DDR_A_D44
DDR_B_DM7
DDR_A_D19
DDR_A_D56
DDR_A_D31
DDR_B_D11
DDR_A_D6
DDR_A_D43
DDR_A_D18
DDR_A_D55
DDR_B_D12
DDR_A_D30
DDR_A_D5
DDR_A_D42
DDR_B_D13
DDR_A_D17
DDR_A_D54
DDR_A_D29
DDR_A_D4
DDR_B_D14
DDR_A_D41
DDR_A_D16
DDR_A_D28
DDR_A_D53
DDR_A_D3
DDR_B_D15
DDR_A_D40
DDR_A_D15DDR_B_D16
DDR_A_D27
DDR_A_D52
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_B_D9
DDR_A_D26
DDR_A_D63
DDR_A_D14
DDR_A_D39
DDR_B_D0
DDR_B_D17
DDR_A_D51
DDR_B_D1
DDR_B_D18
DDR_A_D13
DDR_A_D38
DDR_A_D25
DDR_A_D50
DDR_B_D2
DDR_B_D19
DDR_A_D62
DDR_A_D12
DDR_A_D37
DDR_B_D3
DDR_A_D24
DDR_B_D20
DDR_A_D49
DDR_A_D61
DDR_A_D11
DDR_B_D21
DDR_B_D4
DDR_A_D36
DDR_A_D23
DDR_A_D48
DDR_A_D60
DDR_B_D5
DDR_A_D10
DDR_A_D35
DDR_A_D22
DDR_A_DM0
DDR_B_D6
DDR_A_D47
DDR_A_DM1
DDR_B_D59
DDR_B_D61
DDR_B_DQS6DDR_B_DQS#6
DDR_B_DQS2DDR_B_DQS#2
DDR_B_DQS5DDR_B_DQS#5
DDR_B_DQS1DDR_B_DQS#1
DDR_B_DQS4DDR_B_DQS#4
DDR_B_DQS0DDR_B_DQS#0
DDR_B_DQS7DDR_B_DQS#7
DDR_B_DQS3DDR_B_DQS#3
DDR_A_DQS0DDR_A_DQS#0
DDR_A_DQS7DDR_A_DQS#7
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS6DDR_A_DQS#6
DDR_A_DQS2DDR_A_DQS#2
DDR_A_DQS5DDR_A_DQS#5
DDR_A_DQS1DDR_A_DQS#1
DDR_A_DQS4DDR_A_DQS#4
DDR_B_D22DDR_B_D23
DDR_B_D28
DDR_B_D26DDR_B_D25DDR_B_D24
DDR_B_D27
DDR_B_D34
DDR_B_CLK#1
DDR_B_WE#DDR_B_CAS#
DDR_B_BS#0DDR_B_BS#1DDR_B_BS#2
DDR_B_MA5
DDR_B_MA1
DDR_B_RAS#
DDR_B_CLK#2
DDR_B_MA3
DDR_B_MA14
DDR_B_CLK2
DDR_B_ODT1
DDR_B_MA8
DDR_B_MA15
DDR_B_MA4
DDR_B_MA9
DDR_B_CLK1
DDR_B_MA7
DDR_B_MA10
DDR_B_MA12
DDR_B_MA0
DDR_B_ODT0
DDR_B_MA6
DDR_B_MA11
DDR_B_MA13
DDR_B_MA2
DDR_A_CLK#1
DDR_A_CLK#2DDR_A_CLK2
DDR_A_ODT0
DDR_A_CLK1
DDR_A_ODT1
DDR_A_MA9
DDR_A_CS0#
DDR_A_MA14
DDR_A_MA8
DDR_A_MA13
DDR_A_CKE1
DDR_A_MA12
DDR_A_MA7
DDR_A_CKE0
DDR_A_MA10DDR_A_MA11
DDR_A_MA6
DDR_A_CS1#
DDR_A_BS#0
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_A_BS#1DDR_A_BS#2
DDR_A_MA15
DDR_A_MA0
DDR_A_MA3
DDR_A_MA1DDR_A_MA2
DDR_A_MA4DDR_A_MA5
DDR_B_CS1#DDR_B_CS0#
DDR_B_CKE0DDR_B_CKE1
M_ZNM_ZP
VTT_SENSE_FB
DDR_B_DQS7<9>DDR_B_DQS#7<9>
DDR_B_DQS6<9>
DDR_B_DQS5<9>
DDR_B_DQS4<9>
DDR_B_DQS3<9>
DDR_B_DQS2<9>
DDR_B_DQS1<9>
DDR_B_DQS0<9>
DDR_B_DQS#6<9>
DDR_B_DQS#5<9>
DDR_B_DQS#4<9>
DDR_B_DQS#3<9>
DDR_B_DQS#2<9>
DDR_B_DQS#1<9>
DDR_B_DQS#0<9>
DDR_B_DM[7..0]<9>
DDR_A_DQS7 <8>
DDR_A_DQS6 <8>
DDR_A_DQS5 <8>
DDR_A_DQS4 <8>
DDR_A_DQS3 <8>
DDR_A_DQS2 <8>
DDR_A_DQS1 <8>
DDR_A_DQS0 <8>
DDR_A_DQS#7 <8>
DDR_A_DQS#6 <8>
DDR_A_DQS#5 <8>
DDR_A_DQS#4 <8>
DDR_A_DQS#3 <8>
DDR_A_DQS#2 <8>
DDR_A_DQS#1 <8>
DDR_A_DQS#0 <8>
DDR_A_DM[7..0] <8>
DDR_A_D[63..0] <8>DDR_B_D[63..0]<9>
DDR_B_CLK1 <9>
DDR_B_CLK#2 <9>DDR_B_CLK2 <9>
DDR_B_ODT0 <9>DDR_B_ODT1 <9>
DDR_B_CLK#1 <9>
DDR_B_MA[15..0] <9>
DDR_B_WE# <9>DDR_B_CAS# <9>DDR_B_RAS# <9>
DDR_B_BS#0 <9>
DDR_B_BS#2 <9>DDR_B_BS#1 <9>
DDR_A_CLK1<8>
DDR_A_CLK#2<8>DDR_A_CLK2<8>
DDR_A_CLK#1<8>
DDR_A_ODT1<8>DDR_A_ODT0<8>
DDR_A_BS#2<8>DDR_A_BS#1<8>DDR_A_BS#0<8>
DDR_A_RAS#<8>DDR_A_CAS#<8>DDR_A_WE#<8>
DDR_A_CS1#<8>DDR_A_CS0#<8>
DDR_A_CKE1<8>DDR_A_CKE0<8>
DDR_A_MA[15..0]<8>
DDR_B_CS1# <9>DDR_B_CS0# <9>
DDR_B_CKE1 <9>DDR_B_CKE0 <9>
+CPU_M_VREF
+1.8V
+1.8V
+0.9V
+CPU_M_VREF
+1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Griffin DDRII MEMORY I/F
Custom
5 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
LAYOUT:PLACE CLOSE TO CPU
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
Place between CPU to DDR area(Reserved for EMI)
To re
vers
e SO
DIM
M s
ocke
t (B
otto
m)
To re
vers
e SO
DIM
M s
ocke
t (TO
P)
Processor DDR2 Memory InterfaceON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWERSUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Griffin CTRL & ADM1032Custom
6 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
LAYOUT: ROUTE VDDA TRACE APPROX.50 mils WIDE (USE 2x25 mil TRACES TOEXIT BALL FIELD) AND 500 mils LONG.
place them to CPU within 1.5"
Thermal SensorADM1032
SMBus Address: 1001110X (b)
as short as possibleroute as differential
testpoint under package
0.25A
VID BYPASS CIRCUIT
HDT Connector
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
FDV301N, the Vgs is:min = 0.65VTyp = 0.85VMax = 1.5V
EC is PU to 5VALW
2.09V for Gate
R83 1K_0402_5%
12
R35
822
0_04
02_5
%@
12
TP2
R145 0_0402_5%
1 2
R190
34.8K_0402_1%~N
12
R86 1K_0402_5%
12
R123 300_0402_5%
1 2
L8
LQG21F4R7N00_0805 1 2
R112470_0402_5%
12
R67 44.2_0402_1%
1 2
C355 0.1U_0402_16V4Z
1 2
R59 300_0402_5%
1 2
R34710K_0402_5%@1
2
R35
922
0_04
02_5
%@
12
TP19
C213
4.7U_0805_6.3V6K~N
1
2
R35110K_0402_5%
12
C5252200P_0402_50V7K
1
2
TP24TP26
C2600.01U_0402_16V7K
1
2
R352 300_0402_5%@1 2
TP30
TP23
TP29
R355 300_0402_5%
12
R35
722
0_04
02_5
%@
12
TP28
R7010K_0402_5%@
12
R91 0_0402_5%
1 2
R102 0_0805_5%
12
R690_0402_5%@
1 2
R72 300_0402_5%@1 2
R68 44.2_0402_1%
1 2
R354 300_0402_5%
12
C2140.22U_0603_10V7K
1
2
R1030_0805_5%
@
12
R76
10K_
0402
_5%
@
12
R82 300_0402_5%@1 2
R73 300_0402_5%@1 2
R193
390_0402_5%12
Q9
MMBT3904_NL_SOT23-3@
2
3 1
JCPU1D
FOX_PZ6382A-284S-41F_TURIONCONN@
VDDA1F8VDDA2F9
RESET_LB7PWROKA7LDTSTOP_LF10
SICAF4SIDAF5
HT_REF1P6 HT_REF0R6
VDD0_FB_HF6VDD0_FB_LE6 VDDIO_FB_H W9
VDDIO_FB_L Y9
THERMTRIP_L AF6PROCHOT_L AC7
RSVD2A5
LDTREQ_LC6
SVC A6SVD A4
RSVD6 C5RSVD4B5
RSVD1A3
CLKIN_HA9CLKIN_LA8
DBRDYG10TMSAA9TCKAC9TRST_LAD9TDIAF9
DBREQ_L E10
TDO AE9
TEST25_HE9TEST25_LE8
TEST19G9 TEST18H10
RSVD8 AA7
TEST9C2
TEST17 D7TEST16 E7TEST15 F7TEST14 C7
TEST12AC8
TEST7 C3
TEST6AA6
THERMDC W7THERMDA W8
VDD1_FB_HY6VDD1_FB_LAB6
TEST29_H C9TEST29_L C8
TEST24AE7
TEST23AD7
TEST22AE8
TEST21AB8TEST20AF7
TEST28_H J7TEST28_L H8
TEST27AF8
ALERT_LAE6
TEST10 K8
TEST8 C4
RSVD3B3
RSVD5C1
VDDNB_FB_H H6VDDNB_FB_L G6
RSVD7 D5
KEY2 W18
MEMHOT_L AA8
RSVD10 H18RSVD9 H19
KEY1 M11
TP46
TP1
C5553900P_0402_50V7K 1 2
R348 300_0402_5%@1 2
R365169_0402_1%
12
R75
1K_0
402_
5%
12
U23
NC7SZ08P5X_NL_SC70-5@
B 2
A 1Y4
P5
G3
R77 0_0402_5%
1 2
R349 300_0402_5%@1 2
C5240.1U_0402_16V7K~N
1
2
TP17
C2521U_0603_10V6K1
2
C276 0.01U_0402_16V7K@1 2
TP25
R90 300_0402_5%
1 2
C188 0.01U_0402_16V7K@1 2
TP31
G
DS
Q25 FDV301N_NL_SOT23-3
2
13
TP4
R371 0_0402_5%
1 2
SAMTEC_ASP-68200-07
JDB1
CONN@
2468
101214161820222423
21191715131197531
26
R71 300_0402_5%@ 1 2
+C253
150U_D2_6.3VM
1
2
C557 0.01U_0402_16V7K@1 2
R74 300_0402_5%
1 2
R58 300_0402_5%@1 2
C122 0.01U_0402_16V7K@1 2
C189
3300P_0402_50V7K
1
2
TP18
R189
20K_0402_5%
12
R35
622
0_04
02_5
%@
12
G
D
S
Q10SSM3K7002FU_SC70-3@
21
3
R81 0_0402_5%
1 2
R367 300_0402_5%
1 2
TP32
U24
ADM1032ARMZ MSOP 8P
VDD1 1
ALERT# 6
THERM# 4
GND 5
D+2
D-3
SCLK8
SDATA7
Q42
MMBT3904_NL_SOT23-3@
2
3 1
TP21
TP20
R57 300_0402_5%
12
C556 3900P_0402_50V7K 1 2
R350 300_0402_5%
1 2
J12OPEN PADS
12
R345 0_0402_5%1 2
R36
030
0_04
02_5
%
12
TP45
G
DS
Q27 FDV301N_NL_SOT23-3
2
13
TP44
TP27
TP3
U6
G914E_SOT23-5
IN1
GND2
SHDN3 BYP 4
OUT 5
C2511U_0603_10V6K
1
2
Q43
MMBT3904_NL_SOT23-3
2
3 1
TP43
R217
390_0402_5%12
R366 0_0402_5%
1 2
R36
14.
7K_0
402_
5%
@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE0 +VCC_CORE1
+1.8V
+1.8V
+VDDNB
+0.9V
+1.8V
+1.8V
+1.8V
+1.8V +1.8V
+0.9V
+0.9V
+VDDNB
+VCC_CORE0
+VCC_CORE0
+VCC_CORE0+VCC_CORE1
+VCC_CORE1
+VCC_CORE1
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Griffin PWR & GNDCustom
7 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
3A
2A
18A 18A
Under CPU Socket
Near CPU Socket
VDD(+CPU_CORE) decoupling.
A: Add C165 and C176to follow AMD Layoutreview recommand forEMI
Between CPU Socket and DIMM
180PF Qt'y follow the distance betweenCPU socket and DIMM0. <2.5inch>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
DDR2 SODIMM-I Socket
Custom
8 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
DDR2 SODIMM-II Socket
Custom
9 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
RS780MC HT / PCIE / DVI
Custom
10 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Place < 100mils from pin B25 and B24Place < 100mils from pin AC8 and AB8 Place < 100mils from pin C23 and A24
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
RS780MC Power/GND
Custom
12 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
VDDG33
+1.8V
+1.1V
NC
IOPLLVDD18
+1.8V
NC+1.8V +1.8V
+3.3V
NC+1.8V +1.8V
PIN NAME
IOPLLVDD
+1.8V
+1.8V
+3.3V NC
PIN NAME
NC
+3.3VAVDDNC
NC
+1.2V
AVDDDI
RS740
NC
RS740 RX780 RS780NC
AVDDQ
+1.1V
NC
+1.1V
PLLVDD
RX780
+1.8V +1.8VNC
PLLVDD18
+1.1V
+3.3V
VDDA18HTPLL
+1.1V
RS780
NC
VDDHT
+1.1V
+1.8V
NC
RS740/RX780/RS780 POWER DIFFERENCE TABLE
+1.2V
+1.8V
+1.8V/1.5V
+1.2V
+1.8V
+1.2V +1.1V +1.1V
NC
+1.8V
NC
VDDHTRX
+1.8V
+1.8V
+1.8V
VDDHTTX
+1.8V
+1.2VVDDA18PCIEPLL
NC
VDDA18PCIE
+1.8V/1.5V
NC
+1.8VVDDG18
+1.2V
+1.8V
VDDLTP18
+1.8V
VDD18_MEM
+1.1V
+1.8V
VDDPCIE
+1.1V
+1.2V
+1.2V
VDDLT18
VDDC
+3.3V
VDDLT33
VDD_MEM
+1.8V NC
1.0V-1.1V 7A
300mil
0.5A
0.45A
0.6A
0.7A
0.25A
0.005A
0.005A
0.03A
For A11, ThisVTTHTTX power planeshould connect to+1.35VS.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Clock Generator
Custom
14 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
+3VS_CLK (40 mils)
SEL_27
SEL_HTT66
SEL_SATA
1
0*
0
0*
1*
1 66 MHz 3.3V single ended HTT clock
100 MHz differential HTT clock
100 MHz non-spreading differential SRC clock
100 MHz spreading differential SRC clock
* default
Pin 4 / 5 configure as SRC_7 output
Pin 4 / 5 configure as 27M and 27M_SS outputs
RS780
1.8V 33R/43RRX780
3.3V 33R serialRS740
1.1V 200R/100R
OSC_14M_NB
100M DIFF
GPPSB_REFCLK 100M DIFF 100M DIFF
100M DIFF(IN/OUT)*
HT_REFCLKP
RS740 RX780 RS780
NB CLOCK INPUT TABLE
NC or 100M DIFF OUTPUT
* RS780 can be used as clock buffer to output two PCIE referecence clocksBy deault, chip will configured as input mode, BIOS can program it to output mode.
66M SE(SINGLE END)
NC
100M DIFF
100M DIFF
100M DIFF
100M DIFF
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
NB CLOCKS
NC NC vref
HT_REFCLKN
Clock chip has internal serial terminationsfor differencial pairs, external resistors arereserved for debug purpose.
100M DIFF
REFCLK_P
100M DIFF
REFCLK_N
NC
GFX_REFCLK
GPP_REFCLK
100M DIFF
R40/R41 (value may change)
ICS9LPRS476BKLFT
VDDIO voltage range is 1.05V~3.3V
CLK_NB_REFCLK willget 1.1V with R400200ohm and R401 100ohm.
R419 158_0402_1%
1 2
C354
0.1U
_040
2_16
V7K~
N
1
2
R447 0_0402_5%
12
C56727P_0402_50V8J
1 2
C584
0.1U
_040
2_16
V7K~
N
1
2
C597
0.1U
_040
2_16
V7K~
N
1
2
C588
22U
_080
5_6.
3V6M
1
2
Y414.31818MHz_20P_1BX14318BE1A
12
R12
9
8.2K
_040
2_5%
@
12
C296
0.1U
_040
2_16
V7K~
N
1
2
C568 10P_0402_25V8K@ 1 2
C583
2.2U
_060
3_10
V6K
1
2
C27722P_0402_50V8J
@
1
2
C295
0.1U
_040
2_16
V7K~
N
1
2
C294
0.1U
_040
2_16
V7K~
N
1
2
C334
0.1U
_040
2_16
V7K~
N
1
2
R416 33_0402_5%1 2
R39190.9_0402_1%
12
R420 0_0402_5%
12
R13
4
8.2K
_040
2_5%
12
C311
0.1U
_040
2_16
V7K~
N
1
2
R392261_0402_1%@
12
R461 0_0402_5%
12
C56627P_0402_50V8J
1 2
C596
0.1U
_040
2_16
V7K~
N
1
2
C578 10P_0402_25V8K@ 1 2
R14
9
2.2K
_040
2_5%
12
L58
0_0805_5%
1 2
R422 10K_0402_5%1 2
R13
1
8.2K
_040
2_5%
@
12
R454 0_0402_5%
12
R418 33_0402_5% @1 2
R455 0_0402_5%
12
R13
2
8.2K
_040
2_5%
12
R14633_0402_5%@
12
C587
0.1U
_040
2_16
V7K~
N
1
2
C582
22U
_080
5_6.
3V6M
1
2
R463 0_0402_5%
12
R43
3
10K_
0402
_5%
12
C332
0.1U
_040
2_16
V7K~
N
1
2
R45
8
10K_
0402
_5%
12
R445 0_0402_5%
12
U27
SLG8SP626VTR_QFN72_10x10
VDD_CPU54
VDD_CPU_I/O53
VSS_CPU52
CLKREQ_1#51CLKREQ_2#50
VDD_A49
VSS_SRC19
SRC_1# 20SRC_1 21SRC_0# 22SRC_0 23
CLKREQ_0#24
ATIGCLK_2# 25ATIGCLK_2 26
VSS_ATIG27
VDD_ATIG_IO28
VDD_ATIG29 ATIGCLK_1# 30ATIGCLK_1 31ATIGCLK_0# 32
VSS_SB_SRC36
SB_SRC_1 35SB_SRC_1# 34
ATIGCLK_0 33
VSS_A48
VSS_SATA47
SRC_6/SATA 46SRC_6#/SATA# 45
VDD_SATA44
CLKREQ_3#43CLKREQ_4#42
SB_SRC_SLOW#41
SB_SRC_0 40SB_SRC_0# 39
VDD_SB_SRC38
VDD_SB_SRC_IO37
REF_1/SEL_SATA 64REF_2/SEL_27 63
VDD_REF62 VDD_HTT61
HTT_0/66M_0 60HTT_0#/66M_1 59
VSS_HTT58
PD#57
CPU_K8_0 56CPU_K8_0# 55
SCL1SDA2
VDD_DOT3
SRC_7#/27M 4SRC_7/27M_SS 5
VSS_DOT6
SRC_5# 7SRC_5 8SRC_4# 9SRC_4 10
VSS_SRC11
VDD_SRC_IO12
SRC_3# 13SRC_3 14SRC_2# 15SRC_2 16
VDD_SRC17
VDD_SRC_IO18
REF_0/SEL_HTT66 65
VSS_REF66
XTAL_IN67XTAL_OUT68
VDD_4869
48MHz_1 7048MHz_0 71
VSS_4872GND73
R462 0_0402_5%
12
R417 33_0402_5% @1 2
R424 0_0402_5%
12
C312
0.1U
_040
2_16
V7K~
N
1
2
R456 0_0402_5%
12
R13
3
8.2K
_040
2_5%
@
12
C293
0.1U
_040
2_16
V7K~
N
1
2
C333
0.1U
_040
2_16
V7K~
N
1
2
L60
FBM-L11-160808-601LMT_0603
@12
L59
0_0805_5%
1 2
L55
FBM-L11-160808-601LMT_060312
C335
0.1U
_040
2_16
V7K~
N
1
2
R13
0
8.2K
_040
2_5%
@
12
C3100.
1U_0
402_
16V7
K~N
1
2
R15
0
2.2K
_040
2_5%
@
12
R444 0_0402_5%
12
R460 0_0402_5%
12
R457 0_0402_5%
12
R446 0_0402_5%
12
R45
9
2.2K
_040
2_5%
@
12
R421 0_0402_5%
12
C598
22U
_080
5_6.
3V6M
1
2
R43
2
10K_
0402
_5%
@
12
L56
FBM-L11-160808-601LMT_060312
R423 0_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CRT_HSYNC D_CRT_HSYNCVGA_CRT_HSYNC
VGA_CRT_VSYNC CRT_VSYNC D_CRT_VSYNC
VGA_CRT_R
VGA_CRT_B
CRT_R_L
VGA_DDC_DATA_C
VGA_CRT_G CRT_G_L
HSYNC_L
VGA_DDC_CLK_C
VSYNC_L
CRT_B_L
INVT_PWM
EDID_DAT_LCD
DISPOFF#
EDID_CLK_LCD
+LCDVDD_R
LVDSL0+LVDSL0-
LVDSL1+LVDSL1-
LVDSL2+LVDSL2-
LVDSLC+LVDSLC-
INVPWR_B+ INVPWR_B+
VGA_DDC_CLK_C
VGA_DDC_DATA_C
BKOFF# DISPOFF#
DAC_BRIGINVT_PWM
+LCDVDD
ENVDD
LVDSU0+
LVDSU1-LVDSU1+
LVDSU0-
LVDSU2-LVDSU2+
LVDSUC-LVDSUC+
VGA_CRT_HSYNC<11>
VGA_CRT_VSYNC<11>
VGA_CRT_R<11>
VGA_CRT_G<11>
VGA_CRT_B<11>
MSEN#<28>
DAC_BRIG <28>
EDID_CLK_LCD<11>EDID_DAT_LCD<11>
INVT_PWM <28>
LVDSL0+ <11>LVDSL0- <11>
LVDSL1+ <11>LVDSL1- <11>
LVDSL2+ <11>LVDSL2- <11>
LVDSLC+ <11>LVDSLC- <11>
VGA_DDC_DATA <11>
VGA_DDC_CLK <11>
BKOFF#<28>
ENABLT<11,28>
ENVDD<11>
LVDSU0+<11>LVDSU0-<11>
LVDSU1+<11>LVDSU1-<11>
LVDSU2+<11>LVDSU2-<11>
LVDSUC+<11>LVDSUC-<11>
+CRT_VCC+5VS
+CRT_VCC
+CRT_VCC
+3VS +3VS
B+
+3VS+CRT_VCC +3VS+CRT_VCC +3VS
+LCDVDD
+3VS
+3VS +LCDVDD
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
SB700 Power/GND
Custom
20 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
0.6A
0.1A
+1.8VS : FLASH MEMORY MODE(DEFAULT)+3VS : IDE MODE
0.8A
0.2A
0.2A
0.01A
0.22A
0.6A
0.45A
0.2A
0.01A
For A11 version this power should connected to +1.2VALW due to PWRBTN no response issue.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
SB700 HW Strap
Custom
21 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
REQUIRED STRAPS
WITH A12 SB700, STRAP PIN FOR MEM BOOT AND EC ENABLE SWAPED. I.E. LPC_CLK0 FOR EC ENABLE, AZ_RST# FOR MEM BOOT ENABLE.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
R5C833 Media Card/1394
22 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Layout Note: Place close to R5C833 Chip
Layout Note: Place close to R5C833.
MDIO19 XDALE
MSCDAT2MSCDAT1
MSCDAT3SDCDAT3
MMC Card
MTEST
XDPWRXDR/B#
XDLED#
SD,MMC,MS,XD muti-function pin define
XDCDAT1
XDCD0#
XDRE#
MDIO12MDIO11
MMCCD#
MMCPWR
MMCLED#
XDCDAT5XDCDAT4
MDIO10MDIO09MDIO08
XDCDAT3XDCDAT2
MDIO07MDIO06MDIO05MDIO04MDIO03
XDWE#
MDIO02MDIO01
XDCE#
XDWP#
MDIO18MDIO17
MS Card
MSCD#
MDIO16MDIO15MDIO14
MSWR
MMCDAT0
XDCDAT7XDCDAT6
MMCCMDMMCCLK
MDIO13
XDCLE
MDIO00Media I/F XD Card
MSLED#
MSCDAT0
MSBSMSCCLK
XDCDAT0SDCDAT0SDCDAT1SDCDAT2
SDCD#
SDPWR0SDPWR1SDLED#
SDCCMD
SD Card
SDCCLK
XDCD1#
SDWP#
Pull-up Pull-up Pull-up
MSENUDIO4UDIO3 XDEN
Pull-up
FunctionFunction set pin define
EnableSD,XD,MS,MMC Card
Layout Note: Place close to R5C833 and Shield GND.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
BroadCom LAN bcm5784M
Custom
25 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Layout Notice : Filter place as closechip as possible.
Layout Notice : 3.3V filter. Place as closechip as possible.
Layout Notice : 1.2V filter. Place as closechip as possible.
C50
60.
1U_0
402_
16V4
Z
1
2
L40 FBM-L11-160808-601LMT_060312
L43 FBM-L11-160808-601LMT_060312
C24
22U
_080
5_6.
3VAM
@
1
2
Y1
25MHZ_16P_XSL025000FK1H
1 2
C50
80.
1U_0
402_
16V4
Z
1
2C
497
0.1U
_040
2_16
V4Z
1
2
C180.1U_0402_16V4Z 1
2
C51110U_0805_10V4Z~N
1
2
C29
0.1U
_040
2_10
V7K~
N
1
2
C504 0.1U_0402_16V4Z1 2
R370_0402_5%@1 2
C25
22U
_080
5_6.
3VAM
1
2
C231U_0603_10V6K
1
2
C512
0.1U_0402_16V4Z
1
2
C50
30.
1U_0
402_
16V4
Z
1
2
C224.7U_0805_6.3V6K 1
2
C5000.1U_0402_16V4Z
1
2
C124.7U_0805_6.3V6K
1
2
R360_0402_5%@ 1 2
R26 47K_0402_1%12
C170.1U_0402_16V4Z 1
2
R32470K_0402_5%
12
C30 0.1U_0402_16V4Z 1 2
C50
90.
1U_0
402_
16V4
Z
1
2
C20
4.7U
_080
5_10
V4Z~
N
1
2
C50
50.
1U_0
402_
16V4
Z
1
2
R311.5M_0402_5%@
12
U21
AT24C02N-10SU-2.7_SO8
A0 1A1 2NC 3
GND 4
VCC8WP7SCL6SDA5
R25 47K_0402_1%12
C21 0.1U_0402_16V7K~N
12C4990.1U_0402_16V4Z 1
2
S
GD
Q5
SI3456BDV-T1-E3_TSOP6
3
6
245
1
G
D
S
Q6SSM3K7002FU_SC70-3
2
13
R39 0_0402_5%1 2
R350_0402_5%@ 1 2
R33
84.
7K_0
402_
5%
@
12R340 4.7K_0402_5%1 2
C4950.1U_0402_16V4Z 1
2
L42 FBM-L11-160808-601LMT_060312
C50
70.
1U_0
402_
16V4
Z
1
2
C160.1U_0402_16V4Z 1
2
R23 1.24k_0402_1%1 2
R34
14.
7K_0
402_
5%1
2
C49
80.
1U_0
402_
16V4
Z
1
2
L3FBMA-L11-322513-201LMA40T_1210
1 2
C27
27P_
0402
_50V
8J
1
2
R34 0_0402_5%@12
R30200_0603_1%
12
C26 0.1U_0402_16V7K~N
12
C50
10.
1U_0
402_
16V4
Z
1
2
R40 0_0402_5%@12
R41 0_0402_5%1 2
U5
BCM5784MA0KMLG_QFN68_10x10
TRD3_N 49TRD3_P 50
TRD2_N 47TRD2_P 46
TRD1_N 43TRD1_P 44
TRD0_N 41TRD0_P 40
RDAC37
LINKLED# 2SPD100LED# 1
SPD1000LED# 67TRAFFICLED# 66
XTALI21 XTALO22
VDDC34 VDDC20 VDDC13 VDDC_IO55 VDDC_IO5
VAUX_PRSNT54
TEST158TEST257
VDD
IO6
VDD
IO56
VDD
IO61
CS# 62SO_EEDATA 64SI 63SCLK_EECLK 65
XTALVDDH 23
DC
38
AVDDL51
AVDDL39
BIASVDDH 36
GPHY_PLLVDDL35
DC
68
PCIE_TXD_P26PCIE_TXD_N25PCIE_RXD_P31PCIE_RXD_N32
PCIE_REFCLK_P29PCIE_REFCLK_N28
VMAIN_PRSNT53
PERST#10
PCIE_PLLVDDL30PCIE_PLLVDDL27
WAKE#12
LOW_PWR3
ENERGY_DET 59
REGOUT12_IO 18
VDDC60
VDD
IO15
PCIE_VDDL33
AVDDL45
DC
52
CLK_REQ#11
SUPER_IDDQ 16
PCIE_VDDL24
UART_MODE 9GPIO1_SERIALDI 7
GPIO0_SERIALDO 4
GPIO2 8
REGCTL12 14
VDDC_IO 17
VDD
IO19
AVDDH 42AVDDH 48
GND69
R29 4.7K_0402_5%1 2
C51
04.
7U_0
805_
6.3V
6K
1
2
C49
60.
1U_0
402_
16V4
Z
1
2
L44 FBM-L11-160808-601LMT_060312
C134.7U_0805_6.3V6K
1
2
L41 FBM-L11-160808-601LMT_060312
R380_0402_5%@ 1 2
R22 1K_0402_5% 1 2
L46 FBM-L11-160808-601LMT_060312
C50
20.
1U_0
402_
16V4
Z
1
2
R270_0402_5%@ 12
L45 FBM-L11-160808-601LMT_060312
Q40
MMJT9435T1G_SOT223-4~D
1
23
4
R33 1.5_1206_5%1 2
C28
27P_
0402
_50V
8J
1
2
C140.1U_0402_16V4Z 1
2
C49
40.
1U_0
402_
16V4
Z
1
2
C31 4.7U_0805_10V4Z~N
1 2
R28 4.7K_0402_5%1 2
C194.7U_0805_6.3V6K
1
2
R24 1K_0402_5%
1 2
C150.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDIN3MDIP3
V_DAC
V_DAC
V_DACMDIN0MDIP0
MDIN2MDIP2
RJ45_TX0+RJ45_TX0-
RJ45_RX1+RJ45_RX1-
RJ45_TX3-RJ45_TX3+
RJ45_TX2-RJ45_TX2+
V_DAC
V_DAC
MDIN1MDIP1
RJ45_TX3+
RJ45_RX1+
RJ45_TX3-
RJ45_RX1-
RJ45_TX0+
RJ45_TX0-
RJ45_TX2+
RJ45_TX2-
MDIP0<25>
MDIN1<25>
MDIN2<25>
MDIN0<25>
MDIP2<25>
MDIP1<25>
MDIN3<25>MDIP3<25>
+3VLAN
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
RJ45 / Hyper Flash
Custom
26 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
C479 0.01U_0402_16V7K1 2
R32849.9_0402_1%@
12
R32749.9_0402_1%
@
12
C478 0.01U_0402_16V7K1 2
T1
BOTH_GST5009-LF
TCT11TD1+2TD1-3
TCT24TD2+5TD2-6 MX2- 19MX2+ 20MCT2 21
MX1- 22MX1+ 23MCT1 24
TCT37TD3+8TD3-9
TCT410TD4+11TD4-12
MCT3 18MX3+ 17MX3- 16
MCT4 15MX4+ 14MX4- 13
R321 0_0805_5%@12
R324 FBM-L11-160808-601LMT_0603@12
R32649.9_0402_1%@
12
R33249.9_0402_1%
@ 12
C4840.01U_0402_16V7K
@
1
2
R32549.9_0402_1%
@
12
R320 0_0805_5%@12
C4631000P_1206_2KV7K
12
R1 0_0805_5%@12
C4850.01U_0402_16V7K
@
1
2
C477 0.01U_0402_16V7K1 2
JLAN1
FOXCONN_JM36113-L0R7-7FCONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
NC9
NC10
NC11
NC12
SHLD1 13
SHLD2 14
SHLD2 16
SHLD1 15
R33049.9_0402_1%
@1
2
RP17
75_1206_8P4R_5%
18273645
C4860.01U_0402_16V7K@
1
2
R32949.9_0402_1%@
12
R33149.9_0402_1%
@ 12
C4880.01U_0402_16V7K@
1
2
C476 0.01U_0402_16V7K1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
HD_SYNC
C_MIC2
C_MIC1
HD_SYNC
SDIN_CODEC
HD_RST#
HP_JD
AC_JDREF
AC97_VREF
SPK_L1
SPK_R1
SPK_L2
SPK_R2
HP_OUTRHP_OUTL
PD#
HP_JD
PLUG_IN
PLUG_IN#
HD_RST#
EC_MUTE#
PD#
SPK_L2
SPK_R2
SPK_R1
SPK_L1SPK_L2
SPK_R2SPK_R1
MIC1
MIC2
SPK_L1
BUZZER
SPK_L1
SPK_R1
SPK_L2
SPK_R2
MIC1
MIC2
MIC-1
MIC-2
HP_OUTR
HP_OUTL
HP_R
HPL
HPR
HP_L
PLUG_IN
HD_SYNC <18>
HD_RST#<18,21>
HD_SDOUT <18>
MIC_JD
HD_SDIN3 <18>
HD_BITCLK <18>
EC_MUTE#<28>
BUZR_OFF<28>BEEP#<28>
SB_SPKR<18>
MIC_JD
+VDDA
+VDDA+5VS
+MIC1_VREFO_R
+5VS
+AVDD_AC97
+3VS
+MIC1_VREFO_L
+MIC2_VREFO
+3VS_DVDD +5VS_PVDD
+3VS
+3VS +3VS
+5VS
+5VS_PVDD
+3VS
+MIC1_VREFO_L+MIC1_VREFO_R
GND_AMP
GND_AMP
GND_AMP
GND_AMP
GND_AMP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
Codec ALC262
27 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
20mil
10mil
40mil
Reserved for TEST
GND AGND
Adjustable Output
For EMI
AGND
10mil 10mil
10mil
EAPD Control for Vista
EC Beep
ICH Beep
Speaker Connector
MICROPHONE IN JACK
HEADPHONE OUT JACK
+VDDA=4.5V
Inductor under survey
C63
10.
01U
_040
2_16
V7K
R50320K_0402_1%1 2
R2723K_0402_5% 12
R251 0_0402_5%@12
C6160.1U_0402_16V7K~N
1
2
R495
1M_0402_5%
1 2
C627 2.2U_0603_10V6K1 2
C417 22P_0402_25V8K@1 2
C432 1U_0603_16V6K~N1 2
L68 CHB2012U170_08051 2
L348.2UH_FRH5D28-8R2NNP_1.6A_30%
1 2
C6262.2U_0603_10V6K1 2
U31
SI9182DH-AD-T1-E3_MSOP8~N
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
R493
0_0603_5%
12
L67 CHB2012U170_08051 2
L338.2UH_FRH5D28-8R2NNP_1.6A_30%
1 2
C41
910
P_04
02_2
5V8K
@ 1
2
D12
RB751V-40TE17_SOD323-2 2
1
R499 0_0402_5%1 2
R506 1K_0402_5% 1 2
G
D
S
Q52SSM3K7002FU_SC70-3
2
13
C625
0.1U
_040
2_16
V4Z
1
2
R253 0_0402_5%
@12
C62
94.
7U_0
805_
10V4
Z~N
1
2
G
D
S
Q31SSM3K7002FU_SC70-3
2
13
R257 0_0805_5%
1 2
C418
0.1U_0402_16V7K~N
1
2
R250 0_0402_5%@12
C61
810
P_04
02_2
5V8K
@ 1
2
C621 4.7U_0805_6.3V6K
12
C61
710
P_04
02_2
5V8K
@ 1
2
R286 0_0805_5%
1 2
C425 1U_0603_16V6K~N1 2
C623
470P_0402_50V7K 1
2
C624
10U
_080
5_10
V4Z~
N
1
2
C628
0.1U
_040
2_16
V7K~
N
C424 0.22U_0603_16V4Z1 2
G
D
S
Q30
SSM3K7002FU_SC70-3
2
13
R498 33_0402_5%1 2
C63
00.
1U_0
402_
16V7
K~N
1
2
D29
RB751V_SOD323
21
R262
56.2_0603_1%
12
UA1
ALC269-GR_LQFP48
AVD
D1
25
AVD
D2
38
AVSS1 26AVSS2 37
DVD
D1
DV
DD
_IO
9
DVSS7
PVD
D1
39
PVD
D2
46
PVSS142 PVSS243 CPVEE 34
JDREF 19
VREF 27
MIC1_VREFO_L 28MIC1_VREFO_R 30
MIC2_VREFO 29
CPVREF31
CBN35
CBP36
SENSE A13
SENSE B18
SPK_OUT_L+ 40SPK_OUT_L- 41
SPK_OUT_R+ 45SPK_OUT_R- 44
HP_OUT_L 32HP_OUT_R 33
PCBEEP12
LINE1_L23LINE1_R24
LINE2_L14LINE2_R15
MIC1_L21MIC1_R22
MIC2_L16MIC2_R17
MONO_OUT 20
RESET#11
GPIO0/DMIC_DATA2
GPIO1/DMIC_CLK3
PD#4
SYNC 10
BCLK 6
SDATA_OUT 5
SDATA_IN 8
EAPD/SPDIFO2 47
SPDIFO 48
AGN
D49
C440 0.22U_0603_16V4Z1 2
R259 0_0402_5%@ 1 2
L35FBM-L11-160808-800LMT_0603
12
R249 0_0805_5%
1 2
R501
100K
_040
2_5%
1
2
C430 0.22U_0603_16V4Z1 2
R260
0_0402_5%
1 2
C620 4.7U_0805_6.3V6K
12
R500
100K
_040
2_5%
1
2
R496 39.2K _0402_1%12 C443
220P_0402_50V7K
1
2
JSPK1
ACES_88266-04001~NCONN@
11223344 G1 5
G2 6
U29
74LVC1G125GW_SOT353-5
I2 O 4
P5
G3
OE#
1
L65 CHB2012U170_08051 2
C622470P_0402_50V7K 1
2
+
-
BUR1
LET9040-03A_2P
45@
12
G
D
S
Q51SSM3K7002FU_SC70-3
2
13
R502 20K_0402_1%12
R505 62_0603_1%1 2
R508 10K_0402_5%1 2
JMIC1
FOX_JA6333L-B3S0-7F~N
CONN@
12
3
4
5
6 78910R497 33_0402_5%
1 2
C444
220P_0402_50V7K
1
2
C433
0.1U_0402_16V7K~N
1
2
L64 CHB2012U170_08051 2
R28727K_0603_1%
12
R507 1K_0402_5% 1 2
R28810K_0603_1%
12
C442
0.1U_0402_16V7K~N
1
2
L638.2UH_FRH5D28-8R2NNP_1.6A_30%
1 2L66
8.2UH_FRH5D28-8R2NNP_1.6A_30%1 2
C427
0.1U_0402_16V7K~N
1
2
R266 0_0805_5%
1 2
C44110U_0805_10V4Z~N
1
2
C61910U_0805_6.3V6M
1
2
R263
56.2_0603_1%
12
C61510U_0805_6.3V6M
1
2
C434
0.1U_0402_16V7K~N
1
2
C410
0.1U_0402_16V7K~N
1
2
C42610U_0805_10V4Z~N
1
2
R504 62_0603_1%1 2
C431 0.22U_0603_16V4Z1 2
R2733K_0402_5% 12
C449
4.7U
_080
5_10
V4Z~
N
R258 0_0805_5%
12
R494
10_0402_5%
1 2JHP1
FOX_JA6333L-B3S0-7F~N
CONN@
12
3
4
5
6 78910
R261
0_0402_5%
1 2
U30
NC7SZ08P5X_NL_SC70-5
B2
A1 Y 4
P5
G3
C411
0.1U_0402_16V7K1
2
R252 0_0402_5%12
G
D
S
Q32AP2301GN 1P SOT23
2
13
R264 0_0805_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSI6
KSI1KSI0
KSI5
KSI2
KSI[0..7]
KSI3
KSI7
KSI4
KSO12
KSO14KSO15
KSO6
KSO13
KSO11
KSO[0..15]
KSO4
KSO0
KSO3
KSO8
KSO5
KSO1
KSO9
KSO7
KSO10
KSO2
EC_SMI#
SW_CONFIG1
EC_SMB_CK1EC_SMB_DA1
EC_SMB_DA2EC_SMB_CK2
EC_PME#
CRY2CRY1
EC_MUTE#
AD_BID0
LPC_AD3LPC_AD2LPC_AD1LPC_AD0
ECAGND
FWR#SPI_SIFRD#SPI_SO
LID_SW#
EC_SCI#
SPI_CLK
ENABLT
FAN_SPEED1
BATT_TEMP
ECAGND
EC_RST#
NB_RST#
CRY1
CRY2
CLK_PCI_EC
TP_CLK
EC_GA20
MSEN#
BATT_OVP
EC_SMB_DA2
SW_CONFIG2
+3VALW_ECVCC
EMAIL_BTN
AD_BID0
EC_SMB_CK2
TP_DATA
SB_PWRGD_EC
NB_RST#
VLDT_EN
TP_CLKTP_DATA
ACIN
BATT_CHG_LED#
FSEL#SPICS#
INTERNET_BTN
EC_PME#
SPI_CS#
EC_SO_SPI_SI EC_SI_SPI_SO
SPI_CLK_R
EC_RX_P80CLK
EC_RX_P80CLKEC_TX_P80DATA
EC_TX_P80DATA
EC_SMB_DA1EC_SMB_CK1
SPI_CLK_R
SPI_CS#SPI_CLK_REC_SO_SPI_SIEC_SI_SPI_SO
KB_RST#
SPI_PD
BUZR_OFF
DIMMER_STATUS
EC_THERM#
SB_PWRGD_EC
EC_SMB_DA1
EC_SMB_CK1
BATT_TEMP
BATT_OVP
ACIN
SW_CONFIG1
SW_CONFIG2
SW_RSV1
INTERNET_BTN
SW_RSV2
EMAIL_BTN
LID_SW#
SOFT_BTN
EC_MUTE#
MSEN#
ECO_BTN
KSI[0..7]<29>
SLP_S3#<18>SLP_S5#<18>
FSTCHG <35>
KSO[0..15]<29>
EC_SMI#<18>
EC_SMB_CK1<6,34>
SUSP#<24,32,38,39>
EC_SMB_DA1<6,34>
EC_ON <31>
EC_SMB_CK2<6>EC_SMB_DA2<6>
INVT_PWM <15>BEEP# <27>
SIRQ<17,22>ACOFF <35>LPC_FRAME#<17,24>
DAC_BRIG <15>
NUMLED#<29>
CLK_PCI_EC<17>
IREF <35>
EC_SCI#<18>PM_CLKRUN#<17,22>
ENABLT <11,15>
LPC_AD[0..3]<17,24>
EN_DFAN1 <4>
EC_GA20<18>
BATT_OVP <35>
EC_MUTE# <27>
PWRBTN_OUT#<18>
SW_CONFIG1<29>SW_CONFIG2<29>
SW_RSV1 <29>
MSEN# <15>
EMAIL_BTN <29>
SB_PWRGD <6,11,18>
NB_RST#<11,17,23,24,25>
FAN_SPEED1<4>
ON_OFF<31>
VLDT_EN <32>
TP_DATA <29>TP_CLK <29>
SYSON <24,32,37>VR_ON <40>
EC_RSMRST# <18>EC_LID_OUT# <18>
EC_SWI# <18>
CAPSLED# <29>
BKOFF# <15>
BATT_CHG_LED# <29>
INTERNET_BTN <29>
ACIN <33,35>
PCIE_WAKE#<18,22,24,25>EN_WOL# <25>
KB_RST#<18>
BATT_LOW_LED# <29>
BUZR_OFF <27>
DIMMER_STATUS <29>
EC_THERM# <19>SCRLED#<29>
PWR_BTN_LED# <29>
USBSW_EN#<30>
LID_SW#<29>
CHGVADJ <35>
SW_RSV2 <29>
WLAN_P# <24>
ADP_I <35>
CABLE_DET <25>
GPLED <29>
USB_EN# <30>ECO_GRN_LED# <29>ECO_BLU_LED# <29>
BATT_TEMP <34>
ECO_BTN <29>
SOFT_BTN <29>
LAN_LOW_PWR <25>
W_DISABLE#<24,29>
VFIX_EN <40>
+EC_AVCC+3VALW+3VALW
+3VALW
+3VALW
+3VALW
+5VS
+EC_AVCC
+3VALW
+3VALW
+3VS
+3VALW
+5VALW
+3VALW
+5VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
USB Port X3 + Felica
30 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
W=40mils
iPOD Charger when system shutdown
AC/DC
ON
OFF
ON
ON
ON
OFF
ON
OFF
ON
OFF
S0BIOSMENU S3 S4 S5
USB_EN Hi=Enable, Low=Disable IPOD USB power
W=40mils
20mil
W=40mils
板下
沉板
USB Brd CONN.
U22
G548A2P8U_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
J2
OPEN PADS@
1 2
D20CM1293A-04SO_SOT23-6
<Part Type>
CH
36
Vp5
CH
44
CH
23
Vn2
CH
11
+C515
150U_D2_6.3VM
1
2
G
D
S
Q39SSM3K7002FU_SC70-3
2
13
R317470_0805_5%
1
2
L2
WCM-2012-670T_4P
1 122
33 4 4
R1775K_0402_1%U1H@
12
R20 0_0402_5%
U1L@1 2
R342470_0805_5%
12
R319100K_0402_5%@
12
R339470_0805_5%
12
R3180_0402_5%
1 2
U4
FSUSB31K8X_US8U1H@
NC 1
HSD-2 D- 3
GND 4
D+ 5HSD+6
OE#7
VCC8
C492
470P_0402_50V7K1
2
C514
470P_0402_50V7K
1
2
C464
470P_0402_50V7K
1
2
R21 0_0402_5%
U1L@1 2
U19
G548B2P8U_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
C465
470P_0402_50V7K1
2
R140_0603_5%
@
1 2
R337 0_0402_5%U1H@1 2
C513
470P_0402_50V7K1
2
G
D
S
Q38SSM3K7002FU_SC70-3
2
13
L1
WCM-2012-670T_4P
1 122
33 4 4
R343100K_0402_5%@
12
+C2
150U_D2_6.3VM
1
2
+C11
150U_D2_6.3VM
1
2
JUSB3
ACES_87213-0800G
1122334455667788
GND 9
GND 10
G
D
S
Q41SSM3K7002FU_SC70-3
2
13
R322
100K_0402_5%
1 2
R1951K_0402_1%U1H@
12
C493
470P_0402_50V7K
1
2
C516
0.1U_0402_16V7K~N
1
2
C491
0.1U_0402_16V7K~N
1
2
J3OPEN PADS@1
2
C466
0.1U_0402_16V7K~N
1
2
U20
G548B2P8U_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
G
D
SQ3
SSM3K7002FU_SC70-3U1H@
2
13
JUSB2
SUYIN_020167MR004S511ZR
VBUS1D-2D+3GND4
GND7GND8
GND5GND6
R1643K_0402_1%
U1H@
12
R3440_0402_5%
1 2
R336 0_0402_5%@1 2
JUSB1
TYCO 0-1775501-1 4P CONN@
VCC1USB_N2USB_P3GND4GND5GND6GND7GND8
G
DS
Q4AP2301GN 1P SOT23
U1H@
2
13
R1851K_0402_1%U1H@
12
D1CM1293A-04SO_SOT23-6
<Part Type>
CH
36
Vp5
CH
44
CH
23
Vn2
CH
11
R1510K_0603_1%
U1H@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
EC_ON
PWR_ON-OFF_BTN#51ON#
EC_ON<28>
ON_OFF <28>
51ON# <33>PWR_ON-OFF_BTN#<29>
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
PWR_OK/BTN
Custom
31 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
Power Button
H_3P0
H_4P2
Q11DTC124EKAT146_SC59-3
2
13
CF1HOLEA@
1
H10HOLEA@
1
H3HOLEA@
1
H25HOLEA@
1
H8HOLEA@
1
H11HOLEA@
1
H19HOLEA@
1
R113
33K_0402_5%@1 2
R1144.7K_0402_5%
12
CF3HOLEA@
1
H15HOLEA@
1
H32HOLEA@
1
H27HOLEA@
1
H7HOLEA@
1
H5HOLEA@
1
H28HOLEA@
1
H4HOLEA@
1
H23HOLEA@
1
H9HOLEA@
1
H2HOLEA@
1
H31HOLEA@
1
H21HOLEA@
1
D5RLZ20A_LL34
12
H16HOLEA@
1
H17HOLEA@
1
H18HOLEA@
1
H6HOLEA@
1H29HOLEA@
1
R115
100K_0402_5%
12
H33HOLEA@
1
D6
DAN202U_SC70
2
31
CF2HOLEA@
1
H24HOLEA@
1
H26HOLEA@
1
H1HOLEA@
1
H22HOLEA@
1
H13HOLEA@
1
SW2SW TJG-533-V-T/R
3
2
1
4
5 6
CF4HOLEA@
1
SW3SW TJG-533-V-T/R
3
2
1
4
5 6
H34HOLEA@
1
C2651000P_0402_50V7K~N
@
1
2
H14HOLEA@
1
H12HOLEA@
1
H30HOLEA@
1
H20HOLEA@
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4SUSPSUSP
DIS
CH
G_3
VS
DIS
CH
G_5
VS
DIS
CH
G_1
.8V
S
SUSP
DIS
CH
G_0
.9V
SYSON#
DIS
CH
G_1
.8V
SYSON#
DIS
CH
G_1
.2V
HT
VLDT_EN#
DIS
CH
G_1
.5V
S
SUSP
SUSP
SUSP
VLDT_EN
VLDT_EN#
RUN_ON
1.2VS_GATE
RUN_ON_1.2
RUN_ON
3VS_GATE RUN_ON
SYSON#
SYSON
1.8VS_GATE
SUSP#<24,28,38,39>
VLDT_EN<28>
SYSON<24,28,37>
SYSON#<6,39>SUSP<30>
+5VS+3VS+1.8VS+1.2V_HT+0.9V +1.8V +1.5VS
+1.2V_HT
+3VALW
+1.2VALW
+5VALW
+5VALW
+1.8V
B+_BIAS
+3VS
+5VS
+5VALW
+5VS
+1.8VS
+5VALW
B+_BIAS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
DC Interface
Custom
32 41Wednesday, January 16, 2008
2007/12/12 2008/12/12
+1.2VALW TO +1.2V_HT+5VALW TO +5VS
+3VALW TO +3VS
+1.8V TO +1.8VS
G
D
S
Q48
SSM3K7002FU_SC70-3
2
13
G
D
S
Q20
SSM3K7002FU_SC70-3
2
13
C5621U_0603_10V6K
1
2
G
D
S
Q28
SSM3K7002FU_SC70-3
2
13
U11
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S
Q37
SSM3K7002FU_SC70-3
2
13
R3750_0402_5%1 2 R283
10K_0402_5%
12
R28110K_0402_5%
12
C26410U_0805_10V4Z~N
1
2
C4544.7U_0805_10V4Z~N
1
2
R127100K_0603_5% 1 2
G
D
S
Q35SSM3K7002FU_SC70-3
2
13
C3791U_0603_10V6K
1
2
U7
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
R125470_0805_5%
12
R2840_0402_5%
1 2
R28010K_0402_5%
12
U26
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S
Q23
SSM3K7002FU_SC70-3
2
13
R28210K_0402_5%
12
G
D
S
Q26
SSM3K7002FU_SC70-3
2
13
R126
10K_0402_5%
1 2
C37110U_0805_10V4Z~N
1
2
C5634.7U_0805_6.3V6K~N
1
2C56410U_0805_10V4Z~N
1
2
R151470_0805_5%
12
R12010K_0402_5%
12
R285100K_0603_5% 1 2
C2801U_0603_10V6K
1
2
C5610.22U_0603_10V7K
@
1
2
C4531U_0603_10V6K
1
2
G
D
SQ15
SSM3K7002FU_SC70-3
2
13
G
D
S
Q34SSM3K7002FU_SC70-3
2
13
G
D
S
Q33SSM3K7002FU_SC70-3
2
13
R37610K_0402_5%@
1 2
R175470_0805_5%
12
G
D
S
Q16SSM3K7002FU_SC70-3
2
13
C2794.7U_0805_10V4Z~N
1
2
R226470_0805_5%
12
R384470_0805_5%
12
C3914.7U_0805_10V4Z~N
1
2
R12810K_0402_5%
12
C3800.22U_0603_10V7K
1
2
R306470_0805_5%
12
R2160_0402_5%
1 2
U18
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
C2720.1U_0603_25V7K~N
1
2
C46210U_0805_10V4Z~N
1
2
G
D
S
Q49
SSM3K7002FU_SC70-3
2
13
R385470_0805_5%
12
C4480.22U_0603_10V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CHGRTCP
ACIN <28,35>
51ON#<31>
VINADPIN
RTCVREF
VIN
VS
VS
VIN
VS
CHGRTC
BATT+
RTCVREF
+0.9V+0.9VP
+1.1VS+1.1VSP
+VDDNBP +VDDNB
+1.2VALW+1.2VALWP
+1.5VS+1.5VSP
+NB_CORE+NB_COREP
+3VALWP +3VALW
+5VALWP +5VALW +1.8VP +1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4381P 0.0Custom
34 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
CPU
Recovery at 50 +-3 degree C
PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C
Battery Connect/OTP
BATTERY CONN
Place clsoe to EC pin
SMARTBattery:
1.BAT+2.BAT+3.ID4.B/I5.TS6.SMD7.SMC8.GND9.GND
PJPB1 battery connector
CPU
PC181U_0603_6.3V6M~N
12
PR2461.9K_0402_1%~N1 2
PR27
470K
_040
2_5%
12
PR28150K_0402_1%~N
12
PR19100_0402_5%
1 2
PC140.1U_0402_16V7K~N
@
12
PR25
100_0805_5%~N
1 2
PC19
0.1U
_060
3_25
V7K~
N 1
2
PR22442K_0402_1%~N1 2
PC150.1U_0603_25V7K~N1
2
PR29
220K
_040
2_5%
12
PR23150K_0402_1%~N
12
PU4A
LM358ADT_SO8~N
+3
-2 0 1
P8
G4
PH1
100K_0603_1%_TH11-4H104FT
12
PC131000P_0402_50V7K~N
12
PD4
1SS355_SOD323-2
1 2
PC171000P_0402_50V7K~N
12
G
D
S
PQ3
RHU002N06_SOT3232
13
PR186.49K_0402_1%
1 2
PR161K_0402_5%
1 2
PR30
220K
_040
2_5%
12
PF215A_65VDC_451015
21
PR2110.7K_0402_1%~N
12
PQ2TP0610K-T1-E3_SOT23-3
32.6
2
13
PL2FBMA-L18-453215-900LMA90T_1812
1 2
PD5
1SS3
55_S
OD
323-
2
32.6
12
PC120.01U_0402_25V7K~N
12
PR20100_0402_5%
1 2
PR26150K_0402_1%~N
1 2
PC16
0.1U
_080
5_25
V7M
~N
12
PJP13
SUYIN_200275MR009G154ZL_RV
BATT+ 1
ID 3B/I 4TS 5
SMD 6
GND- 9GND10GND11
BATT+ 2
SMC 7GND- 8
PR1547K_0402_5%~N
12
PR17
1K_0402_5%12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DL_CHG
24751_SRP
24751_SRN
ACSET
P3
P2
BST_CHGA
RE
GN
/BATDRV
24751_ACN24751_ACP
ACDET
DH_CHG
24751_SRSET
ACGOOD#
24751_BAT
OVPSET
24751_ACDRV
/BATDRV
LX_CHG
CELLS
VADJ
24751_ACOP
CHG_B+
CHGEN#
VADJ
REGN
CHG
ACSET
CHGEN#
ACGOOD#
BST_CHG
IREF <28>
ACOFF <28>
FSTCHG<28>
ACIN <28,33>
BATT_OVP<28>
CHGVADJ<28>
ADP_I<28>
BATT+
VIN
VREF
VREF
B+
VREF
VREF
BATT+
VS
RTCVREF
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.0
Charger
B
35 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
JAL70
75W adapter
Input UVP : 17.26V
Fsw : 300KHz
Input OVP : 22.3V
CP setting
ICHG setting
BATT-OVP=0.111*BATT+LI-3S :13.5V----BATT-OVP=1.5V
IREF Current
3.3V 1.65A
CHGVADJ
3.3V
0V
4V+0.105*CHGVADJ
Pre Cell
4.35V
4V
0.4V 0.2A
PQ7FDS4435BZ_SO8
S1
S2
S3
G4
D8
D7
D6
D5
G
D
S
PQ11SSM3K7002F_SC59-3@
2
13
PC260.1U_0402_16V7K~N
1 2
PD6
RLS4148_LLDS2
12
PR310.015_2512_1%
1
3
4
2
PQ6AO4466_SO8
365 7 8
2
4
1
PR35
1_12
10_5
%12
PR34
100K
_040
2_1%1
2 PR380_0603_5%1 2
PC310.1U_0603_25V7K~N
1 2
PC430.01U_0402_25V7K~N
@
12
PQ5FDS4435BZ_SO8
S1S2S3G4
D 8D 7D 6D 5
PC22
4.7U
_120
6_25
V6K~
N
12
PC380.1U_0603_25V7K~N
12
PR5410K_0402_1%~N
12
PR4354.9K_0402_1%
12
PC24
4.7U
_120
6_25
V6K~
N
12
PR50133K_0402_1%
12
PR46100K_0402_1%
@
12
PC32
10U
_120
6_25
V6M
~N
12
PR41100K_0402_1%
12
PU5
BQ24751ARHDR_QFN28_5X5
ACN2ACP3
CHGEN1
ACSET6
IADAPT 15
VADJ12
PGND 22
ACDET5
ACOP7
BAT 17
BATDRV14
CELLS 20
SRN 18
SRP 19
LODRV 23
ACDRV4
VREF10
LEARN 21
SRSET 16
AGND9
VDAC11
OVPSET8
ACGOOD13
PVCC 28
HIDRV 26
PH 25
BTST 27
REGN 24
TP 29
PC23
4.7U
_120
6_25
V6K~
N
12
PR39340K_0402_1%
12
PC210.01U_0603_50V7K~N1
2
PQ8AO4466_SO8
365 7 8
2
4
1
PR33
1_12
10_5
%12
PR4910_0603_5%
1 2
PL310UH_SIL1045RA-100PF_4.5A_30%
1 2
PC44100P_0402_50V8J~N
12
PQ4FDS4435BZ_SO8
S 1S 2S 3G 4
D8D7D6D5
PC351U_0603_10V6K~N
12
PC25
0.01
U_0
402_
25V7
K~N
12
PR534.32K_0402_1%
1 2
PC292.2U_0805_25V6K1
2
PR44100K_0402_1%
1 2
G
D
S
PQ12SSM3K7002F_SC59-3
2
13
PC401U_0603_10V6K~N
12
PC270.1U_0805_25V7M~N1 2
PC45
0.01
U_0
402_
25V7
K~N
12
PR55499K_0402_1%
12
PU4B
LM358ADT_SO8~N
+ 5
- 607
P8
G4
PR360.02_2512_1%
1
3
4
2
PR48100K_0402_1%
@
12
PC340.01U_0402_25V7K~N
12
PC200.01U_0402_25V7K~N1
2
PC410.1U_0603_25V7K~N
12
PR52453K_0402_1%
12
PR32100K_0402_1%
12
PR510_0402_5%@
12
PQ9SI2301BDS-T1-E3_SOT23-3
2
13
PJP14
JUMP_43X118@1 122
PR56100K_0402_1%
12
PR47
270K_0402_1%12
PR42340K_0402_1%
12
PC300.1U_0603_25V7K~N
12
PR5786.6K_0402_1%
12
PC370.1U_0402_16V7K~N
1 2
PR3754.9K_0402_1%
12
PC420.1U_0603_25V7K~N
12
PC280.1U_0603_25V7K~N@
12
PR4080.6K_0402_1%
1 2
PR197
0_0402_5%
12
PC390.1U_0603_25V7K~N@
12
PC360.47U_0603_16V7K~N
1 2
PC33
10U
_120
6_25
V6M
~N
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ILIM2
BST3A BST5A
LX5
DL5
FB3
2VR
EF_
ISL6
237
2VR
EF_
ISL6
237
DH5DH3
EN_LDO
LX3
FB5
ILM1EN1
DL3
3-5V_B23-5V_B1
MAINPWON<34>
POK <39>
VL
VL
ISL6237_B+
VS
+3VALWP
+5VALWP
B+
VL
2VREF_ISL6237
ISL6237_B+
VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4381P 0.0Custom
37 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
1.8VPImax=8A
Iocp=12.6A
1.2VALWPImax=7A
Iocp=11A
1.8VP/1.2VALWP
PR8914K_0402_1%
1 2
PC790.1U_0402_16V7K~N
@
12
PR1130_0402_5%
@
12
PR8275K_0402_1%
12
PR830_0402_5%
12
PU7
TPS51124RGER_QFN24_4x4
GN
D3
TON
SE
L4
VO
11
VFB
12
VFB
25
VO
26
EN28
DR VL1 19
TRIP
117
V5F
ILT
15
VBST1 22
V5I
N16
TRIP
214
DR VL212
LL211
PGOOD27
DR VH210 DR VH1 21
EN1 23
LL1 20
PG
ND
118
VBST29
PGOOD1 24
PG
ND
213
P PAD25
PC710.1U_0402_16V7K~N
1 2
PR913.3_0402_5%
1 2
PC700.1U_0402_16V7K~N
12
PR8814K_0402_1%
12
PL81.8UH_SIL104R-1R8PF_9.5A_30%
1 2
PR900_0402_5%
12
PL71.8UH_SIL104R-1R8PF_9.5A_30%
1 2
PQ19FDS6690AS_NL_SO8
36 578
2
4
1
PR870_0603_1%
12
PR1960_0402_5%
@
12
PR79105K_0402_1%
1 2
PR850_0603_1%
12
PR8075K_0402_1%
1 2
PL14HCB4532KF-800T90_1812
1 2PF4
7A_24VDC_429007.WRML
2 1
PR840_0603_1%
12
PC
6610
U_1
206_
25V
6M~N
12
PC138680P_0603_50V7K@
12
PC734.7U_0805_6.3V6K~N
12
PR81127K_0402_1%
12
PQ17FDS8884_SO8
36 578
2
4
1
PC744.7U_0805_6.3V6K~N 1
2
PC
6722
00P
_040
2_50
V7K
~N
12
PR920_0402_5%
1 2
+PC72220U_D2_4VM
1
2
PQ18FDS8884_SO8
365 7 8
2
4
1
PC771U_0603_10V6K~N
12
PR860_0603_1%
12
PQ20FDS6690AS_NL_SO8
365 7 8
2
4
1
PC760.1U_0402_16V7K~N
@
12
PR1664.7_1206_5%@
12 + PC75
220U_D2_4VM
1
2
PC
6922
00P
_040
2_50
V7K
~N
12P
C68
10U
_120
6_25
V6M
~N1
2
PC784.7U_0805_25V6M~N
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NB_B+
EN_PSVBST_NBCORE
BST_NBCORE-1
DL_NBCORE
NB_VFB
NB_TON
NB_VFBA
LX_NBCORE
NB_V5FILT
DH_NBCORE
51117_B+
SUSP#<24,28,32,39>
NB_STRAP_DATA <11>
+5VALW
B+
+NB_COREP
+5VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
U1 LA-4381P 0.0
NB_CORE
38 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
NB_STRAP_DATA
1.05VSPImax=5A
Iocp=9A
HIGH
LOW
1.05V
1.12V
+1.12V/+1.05V
NB_CORE
AO4712 Rds(on)=15mohm~18mohm
PQ22AO4712_SO8
365 7 8
2
4
1
PR940_0402_5%1 2
PC871U_0603_10V6K~N
12
PR96300_0603_1%1 2
PC82
0.1U_0603_25V7K~N
1 2
PF5
7A_24VDC_429007.WRML
2 1
PC830.1U_0402_16V7K~N@
12
G
D
S
PQ24SSM3K7002F_SC59-3
2
13PC88
0.1U_0402_16V7K~N
12
PC8547P_0402_50V8J~N
1 2
PC
814.
7U_1
206_
25V
6K~N
12
PR1020_0402_5%1 2
PQ21AO4466_SO8
365 7 8
2
4
1
PL15HCB4532KF-800T90_1812
1 2
PR10110K_0402_1%~N
12
PR10084.5K_0402_1%
12
PR9920K_0402_1%~N
12
PR9715.4K_0402_1%
12
PC890.01U_0402_25V7K~N
12
PR1030_0402_5%
1 2
PR1474.7_1206_5%@
12
PR950_0603_1%1 2
PR988.06K_0402_1%
1 2
PR114100K_0402_5%~N
12
PC864.7U_0805_25V6M~N
12
G
D
S PQ23SSM3K7002F_SC59-3
2
13
PC
804.
7U_1
206_
25V
6K~N
12
PL91.8UH_SIL104R-1R8PF_9.5A_30%
1 2
+ PC84220U_D2_4VM
1
2
PU8
TPS51117RGYR_QFN14_3.5x3.5
VOUT3
V5FILT4
EN
_PS
V1
TON2
VFB5
PGOOD6 DRVL 9
DRVH 13
LL 12G
ND
7
PG
ND
8TRIP 11
V5DRV 10V
BS
T14
TP15
PC137680P_0603_50V7K@
12
PR93200K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUSP#
SYSON#
POK<36>
SYSON#<6,32>
SUSP#<24,28,32,38>
+3VALW
+0.9VP
+1.8V
+3VALW
+1.5VSP
+1.8V
+1.2VALW
+5VALW
+3VALW
+1.1VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4381P 0.0Custom
39 41Wednesday, January 16, 2008
2007/12/12 2008/12/12Compal Electronics, Inc.
0.9VP/1.5VSP/1.1/VSP
0.8V
PR1081.15K_0402_1%
32.8
12
PC9110U_1206_25V6M~N
12
PC980.1U_0402_16V7K~N
@
12
PC9522U_1206_6.3V6M~N
32.8
12
PC931U_0603_6.3V6M~N
12
PC9710U_1206_25V6M~N
12
PR10410K_0402_1%~N
12
PR1121K_0402_1%
12
PC9210U_1206_6.3V6M~N
32.8
12
PJP19JUMP_43X118@
11
22
PJP18JUMP_43X118@
11
22
G
D
S
PQ262N7002-7-F_SOT23-3
2
13
PR1090_0402_5%1 2
PR107
0_0402_5%
32.8
1 2
PC1011U_0603_6.3V6M~N
12
PR110
1K_0402_1%
12
PR105
0_0402_5%32.8
1 2
PJP17JUMP_43X118@
11
22
PC96
0.1U_0402_16V7K~N
12
PR1113K_0402_1%
32.8
12
PC10410U_1206_25V6M~N
12
G
D
S
PQ252N7002-7-F_SOT23-3
2
13
PR1150_0402_5%1 2
PR1061K_0402_1%
12
PC94
0.01U_0402_25V7K~N
32.8
12
PC103
0.1U_0402_16V7K~N
12
PC901U_0603_6.3V6M~N
12
PU9
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PR116
4.99
K_04
02_1
%12PC105
0.1U_0402_16V7K~N@
12
PU10
APL5912-KAC-TRL_SO8~N32.8
GN
D1
VOUT 3POK7
EN8VC
NTL
6
VIN 5
VOUT 4
FB 2
VIN 9
PU11
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PC9910U_1206_25V6M~N
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BOOT0
RTN1
FB_0
PHASE_NB
UGATE_NB
PHASE_NB
BOOT1
BOOT_NB
+VCC_CORE1
+VDDNBP
ISN
0
LGATE_NB
DIFF_1
UGATE_NB
BOOT_NB
LGATE0
ISP
1
UGATE0
VGATE
UGATE1
VSEN1
VSEN0
BOOT1
RTN0
PHASE0
LGATE1
PHASE1
PHASE1
PHASE0
UGATE0
BOOT0
ISN
1
LGATE_NB
PHASE_NB
ISP
0
LGATE0
LGATE1
ISN
1
ISP
1
+VCC_CORE0
VW0
COMP0
VW1
COMP1FB_1
DIFF_0
ISL6265_PWROK
UGATE1
ISL6265_P
WR
OK
ISN0ISP0
CPU_VDDNB_RUN_FB_H <6>
CPU_VDDNB_RUN_FB_L <6>
CPU_VDD0_RUN_FB_H<6>
CPU_VDD0_RUN_FB_L<6>
CPU_VDD1_RUN_FB_H<6>
CPU_PWRGD_SVID_REG<6>
CPU_SVD<6>
CPU_SVC<6>
VR_ON<28>
VFIX_EN<28>
CPU_VDD1_RUN_FB_L<6> +VCC_CORE1
CPU_B+
+VCC_CORE0
CPU_B+
+VDDNBP
CPU_B+
CPU_B+
+5VS +3VS
B+
+5VS
+5VS
+VCC_CORE1+VCC_CORE0
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Wednesday, January 16, 2008 4141MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Page 1Solution Description Rev.Page# Title
Version Change List ( P. I. R. List )Item Issue DescriptionDate
Next: PR238, PC202, PQ56, PD42, PJP21
P37
P37
P38
P41
P41 +CPU_CORE 08'01/08
+CPU_CORE
ADD PR201 PR202Modify improve EMI
08'01/02 Add PR200 for BOOT_NB.
0.1
Intersil FAE request.
7 P36 +3VALWP,+5VALWP 08'01/08 Compal adjust +3VALWP,+5VALWP ocp setChange PR71 from 330K to 255K
Change PR72 from 330K to 255K
8 P35 Charger 08'01/08 Compal adjust Charger pre cell set Change PR53 from 15K to 4.32K
Change PQ19 PQ20 from AO4712 to FDS6690AS
9 P38 NB_CORE 08'01/08 Compal Change PR96 from 0ohm to 300ohmTI FAE request.TI FAE request.
0.1
0.1
0.1
1.8VP/1.2VALWP 08'01/08 modify current limit
Change PQ17 PQ18 from AO4466 to FDS8884
1.8VP/1.2VALWP 08'01/08 adjust 1.8VP/1.2VALWP OCP set
Change PR88 from 16.5K to 14K
NB_CORE 08'01/08 Change PR114 from @0 to 100KModify NB_CORE turn off avoised cause force PWM mode