TRIUMF Qweak Electronics Des Ramsay Nov 2008. Status of Electronics November, 2008 36 VME modules (# 001 and # 003-037) delivered to JLab 001, 003,

TRIUMF Qweak Electronics

Des Ramsay Nov 2008

Status of Electronics

November, 2008

36 VME modules (# 001 and # 003-037) delivered to JLab

001, 003, 004, and 005 are back at TRIUMF for front-end upgrade.

038 to Ohio (Paul)

039 to U. Virginia (Kent)

14 Main (0.5M, 1M, 2M, 4M) preamps to JLab

14 Lumi (0.5M, 1M, 25M, 50M) preamps to JLab

20 more preamps ordered by Roger. Insides ready at TRIUMF, need to be boxed and tested.

four KDP-A and four KDP-B ordered by Kent.

now five styles of preamp: Main: 0.5M, 1M, 2M, 4M, 26 kHz Lumi: 0.5M, 1M, 25M, 50M, 17 kHz KDP-A: 0.3M, 0.6M, 1.2M, 2.4M, 25 kHz KDP-B: 4k, 12k, 36k, 100k, 110 kHz SNS: 10k, 100k, 1M, 10M, 16 kHz

Input Cables

Large input capacitance increases the noise gain of the first stage.For Qweak we should limit the input cable capacitance to ~200 pf, for example 5m of RG-62.

Some typical cables:TYPE Z0(ohm) C(pF/M) diameter(mm)RG-58 53 94.4 5.0RG-62 93 44.3 6.2RG-63 125 32.8 10.3

We need low capacitance cables for the preamp inputs 5 m, RG-62, 93

We should not forget shielding of the preamps.

We need the same 20 MHz clock to all the integrators

Ideally, the spin flip should be synchronized with the clock

We may want the spin flip signal (“MPS”) in advance of the flip.

If we ground signals in the hall AND in the electronics cage we have to be sure we don’t get bad line noise. It’s easy to float one end, but is it allowed?

We need to test the actual noise early, with the full set-up and DAQ pattern.

Issues to make sure we address

November, 2008

800 MHz

20 p.e.per event

x 2500

50,000 eper event

6.4 A 6.4 V

VME digitalsignal integrator

1 M I-V

to DAQ

in shielding outside hall

Nature of the Current Mode Signalsfor Qweak

QIBin 22 shot noise:

Comparison of noise levels for Qweak

Type of noise

Charge quantum

(e)

Spectral density

Noise in 500 Hz BW

(1 ms integral)

Noise in 50 kHz

BW

(VME input)

Beam-on shot noise

50,000 320 7200 Vrms 72 mVrms

LED test shot noise

2500 72 1600 Vrms 16 mVrms

Battery test shot noise

1 1.4 31 Vrms 310 Vrms

preamp noise

0.5 11 Vrms 110 Vrms

integrator noise

1.3 29 Vrms 290 Vrms

800 MHz event rate20 p.e. per electron eventPMT gain 2500 to give 6.4 A1 M preamp (6.4 volts to integrator)

HzV /

Electronic noise is small compared to counting statistics.The current source test would reach 10-9 (one ppb) in a day.

TRIUMF VME integrator details

FPGA

FPGA Prog/Debug Ports

VME Module SelectSwitches

Status LEDsVME AccessExt Clock EnbExt Gate Enb

Ext NIM Gate

Ext NIM Clock

DC-DCConverter

ADC

8 inputs

filter

8 channels, each takes a -10 to +10 volt signal.

Module triggered by external NIM signal (e.g. MPS)

Integrates for the selected time (up to 1/30 second)

Stores sum as 1,2,3, or 4 blocks plus the total sum

All modules are clocked by the same 20 MHz clock so all are exactly synched

Internally, 18-bit ADC runs at up to 500 ksps

50 kHz sharp-cutoff analog anti-aliasing filter precedes ADC

Simple description of VME Integrator

August, 2008

Offset adjust

Chan 1

Chan 2

OutIN

Chan 1 gain

Chan 2 gain

+5 V DC

4210.5

0.5124

M

M

Location of adjustments on TRIUMF MK2 “main”-style preamp:

Offset adjust

Chan 1

Chan 2

OutIN

Chan 1 gain

Chan 2 gain

+5 V DC

502510.5

0.512550

M

M

Location of adjustments on TRIUMF MK2 “lumi”-style preamp:

Two channels per module

Four switch-selectable gain settings.

For Qweak main preamp Vout/Iin = 0.5, 1, 2, or 4 megohm

Output ±10 V. Adjustable ±2 V offset. Drives 130 m RG-213

Noise referred to output = 0.5 with 5m of RG-62 on input

Power: 5 VDC Ground fully isolated by internal DC-DC converter.

BNC connectors for input and output.

Simple description of TRIUMF preamp

August, 2008

HzV /

END

Existing Ion Source Signals

• Integration triggered by MPS• signals derived from 20 MHz crystal clock• Qweak integrator uses this clock as well

Averaging of Digitization Noise(we don’t want the analog bandwidth too low)

• The 18 bit ADCs have ~0.5 LSB rms noise per sample.• This is reduced by averaging ~500 samples per integration.• This will only work if raw signal spreads over enough channels.

• Assuming equivalent noise bandwidth 47 kHz (f3db= 30 kHz) and 18 bit ADC at mid range:

condition Q rms noise before channels channels (e) integration () (FWHM)

beam ON 50,000 69 mV 1420 3339best possible 1 0.31 mV 6.3 15

So this is OK even for very quiet signals. Averaging makes integral equivalent to about 21 bits

Aliasing

• sample at the center of each interval (n samples)• Q = (sum of samples) x (t)• band limit signal to small fraction of sampling frequency to eliminate the wiggles and kinks.• we impose an analog cutoff at 1/10 the sampling frequency

Integral From Samples (we want the analog bandwidth low)

Main VME registers

August, 2008

Sample Frequency = system clock / (PERIOD_MULT + 40) 0 ≤ PERIOD_MULT ≤ 255• Number of Blocks per integral (1,2,3, or 4)• Samples per Block : 1 ≤ SAMPLE_PER_BLOCK ≤ 16383• Gate to Trigger Delay = 2.5 s + (sample period x GATE_DELAY) 0 ≤ GATE_DELAY ≤ 255• Gate Source: 0=internal, 1=external• System Clock Source: 0=internal, 1=external• Internal Gate Frequency = (100 kHz) / (INT_GATE_FREQ) 1 ≤ INT_GATE_FREQ ≤ 65535• Individual block sums and total sum for each channel• Firmware Revision Date: REV_DATE always shows the release date of the current firmware revision running in the module

Quasi-differential isolated BNC connectors – 100 k from BNC outer conductor to ground.

Input range -10 V to +10 V. Input impedance 12 K.

Eight integrators per single width VME module.

Module clocked by 20 MHz signal from ion source. Sampling rate set as a fraction of the clock. Range 68 ksps to 500 ksps with 20 MHz clock.

Integration time software selectable – set as a fixed number of samples. (e.g. 2000 samples = 4 ms at 500 ksps)

Module gated by external NIM signal (e.g. MPS). Integration starts a selected time (gate-to-trigger delay) after the leading edge of the gate and runs for preset number of samples.

32 bit overall sum available to the DAQ via VME bus. This sum can be divided into 1,2,3, or 4 sub- blocks (time intervals) as selected through VME. At full scale, the sum fills up in 1/30 s at 500 ksps.

Internal gate and internal 20 MHz clock provided for testing. 50 kHz, 5-pole anti-aliasing filter 18 bit ADC, sample rate up to 500 ksps Buffered output permits reading previous integral during integration. Crate power 0.5 A at +12 V and 1.0 A at +5 V

Short description of VME Integrator

August, 2008

Firmware Running Modes

• Integration starts at the preset time (set via VME) after the gate.• We have tried three modes:1. No conversion until gate received.2. Continuous conversion – integration starts at next sample period.3. Continuous conversion, but timing is re-synched on each gate.

We noticed, for 4 ms integrals, 500 ksps, and 4 x 1 ms blocks:• Mode 1 – first block in four block integral was low (~25 mV).• Mode 2 – no difference in blocks, but phase of two modules could

differ by half a sample period (1 s at our 500 ksps).• Mode 3 – initially seemed to solve both problems, but with long runs,

detected small residual block difference (1.5 V with500-sample blocks).

Neither the block offset or small time offset can affect the asymmetry

Nevertheless, it looks like we can eliminate both by using scheme 3with sufficient gate-to-trigger delay.

time

current

3.6 pA(0.6 ppm p-p)( ppm)

6 A

helicity- + - + - + -

Size of Qweak Signal

• figure shows regular spin flip; in practice use + - - + or - + + -

• for 50 kHz noise bandwidth, rms shot noise is 70 nA

• on a scope the noise band would be 100,000 x the signal !

3.0zA

TRIUMF VME integrator

solder side:component side:

VME Integrator Front End

Full-differential Quasi-differential

Offset adjust

Chan 1

Chan 2

OutIN

Chan 1 gain

Chan 2 gain +5 V DC

Location of adjustments on TRIUMF SNS preamp:

• To open the preamp for adjustment, remove the hex nuts from the OUTPUT side and remove the black screws from the INPUT side.

• The rotary gain switches are used to select gain of 10k, 100k, 1M, or 10M. Turn the switch counter-clockwise to increase the gain.

• The offset is set for 1.0 volts when shipped, but can be changed with the offset adjust pot.

Changing gains and offset on the TRIUMF SNS preamp

increasegain

increasegain

Signal loss at start of spin states

If polarization has not settled by start of integration, some signal is lost

In the case of the above (+ - - +) quartet, more (+) is lost than (-)

For the parity signal itself, this is only a small part of an already small signal and is likely OK

In the case of helicity correlated current or position it may be a problem

+ +

- -

E497 DAQ Sequence for One Spin State

150 M I to V Amplifier

• sample at the sides of each interval (n+1 samples)• Q = (average of first and last samples plus sum of others) x (t)• band limit signal to small fraction of sampling frequency to eliminate the wiggles and kinks.• we impose an analog cutoff at 1/10 the sampling frequency

Integral From Samples (trapezoidal rule)

Shot Noise Recap

QIBin 22

)( 23

dbfT2

1

one-sided shot noise, [A2]

equivalent noise bandwidth [Hz]

or

chargequantum [C]

current [A]

Example, 1 ms integration with beam on, assuming 800 MHz: • Q = 50,000 e• I = 6.4 A (800 MHz x 50,000 e)• B = 500 Hz• in = 7.2 nA rms (7.2 mV with a 1 M preamp)

Note that in 1 ms, N = 8 x 105 counts. = 1120 ppm, same as 7.2 nA/6.4 A N/1