Trends in MEMS Manufacturing & Packaging - Sensors Web …€¦ · · 2012-01-23• PZT • Resists • ... had an estimated 60-70% of the European market for airbag sensors In

© 2011

Copyrights © Yole Développement SARL. All rights reserved.

Trends in MEMS

Manufacturing & Packaging

New Manufacturing Approaches for MEMS Pave the Way to

Smaller, more Cost-Effective Devices!

© 2011 • 2


Content

• Executive Summary 4

– Main manufacturing evolution

– MEMS wafer forecasts by type of manufacturing

• 2000 – 2020 MEMS Devices Evolution 56

– Inertial (Accelerometers, gyroscopes)

– Magnetometers

– Pressure

– Microphones

– Micro mirrors

– Micro bolometers

– Oscillators

• MEMS historical & expected evolution 105

– VOA

– Accelerometer for seismic

– Gyros for consumer

• Cost analysis 112

• Technical Trends 141

– MEMS Manufacturing Trends

– MEMS &ASIC interconnects

– 3D MEMS

– CMOS MEMS

– Standard Process to Technology to Product Platforms

– MEMS Packaging Trends

• Impact on MEMS Equipment & Materials 230

– Tools • DRIE

• Sacrificial release

• Release stiction

• Deposition & cleaning

• Lithography

• Bonding

• Singulation

• Test & CAD tools

– Engineered Wafers & Materials • Glass

• SOI

• PZT

• Resists

• Conclusions 330

• Appendices 335

© 2011 • 3


New MEMS manufacturing processes drivers

Form factor

driven

Cost driven

Performance

driven

The development of new innovative MEMS processes have to answer to the

following requirements:

For consumer MEMS

applications (e.g. cell

phones, laptops …), medical

applications

For consumer MEMS

applications (e.g. cell

phones, laptops …)

For high performance

MEMS applications (e.g.

aeronautics, industry …)

Both new MEMS

manufacturing &

MEMS packaging

technologies can

solve these issues.

© 2011 • 4


The 4 evolutionary steps for MEMS manufacturing

Bulk MM

Surface MM

Thin SOI

CMOS MEMS

70-80’s 80-90’s 90-2000’s Today/Future

Thick SOI

Cavity SOI

ME

MS

P

ro

du

cts D

im

en

sio

ns

Timeline

Co

st R

ed

uc

tio

n

3D Integration

?

© 2011 • 5


30 years of MEMS Manufacturing History

1990s’

2000s’

2010s’

2020s’

Processing

level

MEMS level

Packaging

level

System level

Over the time, the MEMS manufacturing evolution has aimed at climbing the value chain

towards increasing functionalities at the system level.

Major breakthroughs

In the 1990s Sensonor had international success with

SA20, a sensor for Airbag systems. It was made up of

a piezoresistive beam of Silicon. Around 35 million

sensors were sold all over the world, and the company

had an estimated 60-70% of the European market for

airbag sensors

In the 2000s, the comb drive architecture is

becoming one of the major MEMS architecture for

sensing inertial movement.

TI success for DMD is just starting.

Packaging is becoming an enabling

process step. First MEMS products

using 3D TSV are coming to the

market.

SiTime’s MEMS oscillator

CMOS MEMS has been

phased out. 3D integration

has allowed the integration of

different functionalities at the

Si level. Room temperature

bonding and cost competitive

TSV technologies have made

such realization possible.

© 2011 • 6


Analyzed MEMS Technologies

• Graph shows the MEMS technologies investigated in this report. These technologies will affect the MEMS manufacturing/packaging at

different levels: Substrate level (SOI, glass, thin wafers), MEMS die level (getters, fusion bonding, release stiction, singulation, CMOS MEMS,

DRIE, trench isolation) and packaging level (TGV, TSV, pixel-level packaging, thin film capping, active capping).

• Technology & products platform are transverse approaches.

Technology Platforms

Product Platforms

Substrate

level

Front End level

Packaging

level

Active

Capping

Thin Films

Packaging

Through Silicon

Vias (polySi, metal)

Trench

Isolation

Release

Stiction

Engineered SOI

Substrates

Glass

Substrates

Piezo

MEMS

MEMS

Singulation

Pixel-level

Packaging

Thin

Wafers

Getters

Through Glass

Vias

CMOS-MEMS

Fusion

Bonding

SEM of mono-pixel packaging (source Ulis/Leti)Mono-pixel packaging (source Ulis)

DRIE

Resists

Standard

packaging

MUMPs

processes

Advanced

optical MEMS

Si

inrterposers

Hermetic

WLP

Through Si

vias

Pressure

sensor

Inertial

MEMS

© 2011 • 7


MEMS Wafer Forecasts by Type of Process

2009 2010 2011 2012 2013 2014 2015

Thin Wafers 6'' & 8''

CMOS MEMS 8''

CMOS MEMS 6''

Thin Films Packaging 6''

Thin Films Packaging 8''

TSV 6'' & 8''

Sacrificial Etched 8''

Sacrificial Etched 6''

Wafer Bonded 8''

Wafer Bonded 6''

DRIE 8''

DRIE 6''

© 2011 • 8


The different MEMS technological approaches

Hybrid

Monolithic

Bulk (wet, DRIE)

Surface (sacrificial layers)

Thin/thick SOI

polySi

Si mono

Epi polySi

Thin Films (surface polySi cappig)

WLC

Si

Glass

Wire bonding Side by side

Vertical stack

3D TSV W2W

C2W

Integrated MEMS

MEMS First

Above CMOS

Integration of MEMS steps during CMOS (« interleaved

MEMS ») either in FEOL or BEOL

Sensitive element Packaging ASIC Integration

MEMS

+ASIC

VTI, Invensense …

Freescale, Tronics

VTI, Sensonor

ST

Bosch

Si

Quartz

Murata, Epson

Toyocom SiTime, Discera, Bosch,

Memstronic, Freescale

Freescale, osch,

STM,

SensorDynamics Dalsa, IMT, Silex … (more a foundry busines)

1995

Sidebraze DIP

1996-2002

Plastic PDIP

1999 - today

SMT SOIC

& Die Down

2006

Stacked Die

QFN

~125 sq mm ~100 sq mm ~25 sq mm

6 & 6 mm

1995

Sidebraze DIP

1996-2002

Plastic PDIP

1999 - today

SMT SOIC

& Die Down

2006

Stacked Die

QFN

~125 sq mm ~100 sq mm ~25 sq mm

6 & 6 mm

TI, FLIR, Ulis

Baolab, MEMSIC, AD,

Akustica

3D WLP

© 2011 • 9


Executive Summary Yole MEMS Integration Technology Map, The CMOS MEMS Frontier !

10

0

10

1

10

2

10

3

10

4

10

5

10

6

10

7

10

8

10

9

100 101 102 103 104 105 106 107 108 109

DMD

Ultrasonic imagers

Fingerprint sensors

Above IC CMOS MEMS

Above IC CMOS MEMS

OR wafer bonding Bolometers

Single membrane

microphone

Multi membrane microphone/micro

loudspeakers

CMOS MEMS (e.g. interleaved BEOL Akustica) OR Hybrid Integration

PIR Sensor Num

ber

of T

ransis

tors

Number of µmechanical elements

The CMOS MEMS area: because of the array structure of MEMS,

CMOS MEMS integration is compulsory.

Inertial MEMS

Adapted from Akustica

IMU

Ink Jet Heads

RF MEMS

Here, CMOS MEMS is case-to-case

depend on: cycle time, flexibility, cost,

integration, market demand, power

consumption.

The CMOS MEMS Frontier!

© 2011 • 10


Example of Inertial MEMS Evolution

2000 2010 2020

MEMS die size (mm²) 10 mm² ~2-3 mm² 1-2 mm²

Packaged die size 2x5x5 mm3 QFN package (3.0 mm x

3.0 mm, height 0.9 mm) < 1x2x2 mm3

Power consumption 0.1 mW 0.05 mW < 0.05 mW

MEMS ASP ($) >$3 (3-axis) $0.7 <$0.5

Volume (Munits) 35 771 > 2 500

Major manufacturing

evolution

• 4” & 6” wafer size

• Integrated MEMS from

AD

• Mostly wire bonding

side by side

• 6” and 8” emerging

• SOI wafers and epiPoly

Si approaches (3µ thick

proof mass)

• AD shifts to hybrid

• Stacked/side by side

wire bonded MEMS &

ASIC

• Mostly 8” wafer size

• Capping is removed

• ASIC becomes the

active capping

• 3D TSV implemented

Trends in MEMS Manufacturing & Packaging - Sensors Web …€¦ · · 2012-01-23• PZT • Resists • ... had an estimated 60-70% of the European market for airbag sensors In

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