Topic:The Motorola M680X0 Family Team:Ulrike Eckardt Frederik Fleck André Kudra Jan Schuster Date:Thursday, 12/10/1998 CS-350 Computer Organization Term.

Topic: The Motorola M680X0 Family

Team: Ulrike EckardtFrederik FleckAndré KudraJan Schuster

Date: Thursday, 12/10/1998

CS-350 Computer CS-350 Computer OrganizationOrganization

Term Paper Term Paper PresentationPresentation

Presentation OverviewPresentation Overview

Frederik: Introduction and MC68000

Ulrike: MC68020 and MC68030

Jan: MC68040 and MC68060

André: Amiga and Market Potential

M680X0 Family OverviewM680X0 Family Overview

• all are CISC Processors

• Upward Compatibility

• MC68000-68020: CMOS Technology

• MC68030-68060: HCMOS Technology

MC68000: Basic Features (1)MC68000: Basic Features (1)

• released in 1979

• 8 32-bit Data Registers

• 8 32-bit Address Registers

• 1 32-bit Program Counter

• 1 16-bit Condition Code Register

• 1 32-bit Stack Pointer

• supports 5 Data Formats(Bits, BCD, Bytes, Words, Long Words)

• 14 effective Addressing Modes,grouped in 6 sections

• 24-bit Address Bus, 16 MByte directly addressable

• 16-bit Data Bus

• Instruction Set consists of 56 instructions

MC68000: Basic Features (2)MC68000: Basic Features (2)

MC68000: Programming MC68000: Programming ModelModel

User Programming Model:• 16 General Purpose Registers

• Program Counter

• Lower Byte of CCR

Supervisor Programming Model: includes User Programming Model, additionally ...

• Supervisor Stack Pointer

• complete 16-bit CCR, including the Upper Byte

MC68020: Basic Features (1)MC68020: Basic Features (1)

• released in June 1984, first full 32-bit implementation, 2nd generation CPU

• 32-bit Data Bus and Address Bus, 4 GByte directly addressable

• on-chip 256 Byte Instruction Cache

• available in 16, 20, 25, and 33 MHz

• listed performance of 10 MIPS at 33 MHz

MC68020: Basic Features (2)MC68020: Basic Features (2)

• 18 effective Addressing Modes, 12 are the same

as in the MC68000, and 6 are new ones

• supports 7 Data Formats,2 more than the MC68000(32-bit Fields, 64-bit Quad Word Integer)

• Instruction Set consists of 96 instructions

MC68020: Programming MC68020: Programming ModelModel

User Programming Model:• contains same registers as MC68000

Supervisor Programming Model: includes User Programming Model, additionally ...

• 1 32-bit Interrupt Stack Pointer• 1 32-bit Master Stack Pointer• 1 32-bit Vector• 2 3-bit Alternate Function Code Registers• complete 16-bit CCR, including the Upper Byte• 1 32-bit Cache Control Register

• released in 1986

• 256 Byte on-chip Instruction Cache and Data Cache

• on-chip Memory Management Unit

• available in 16, 20, 25, 33, 40, and 50 MHz

• listed performance of 18 MIPS at 50 MHz

• Instruction Set consists of 106 instructions

• Data Formats and Addressing Modes:same as MC68020

MC68030: Basic FeaturesMC68030: Basic Features

MC68030: Programming MC68030: Programming ModelModel

User Programming Model:• contains same registers as MC68000

Supervisor Programming Model: includes User Programming Model, and additionally ...

• all Supervisor Registers of MC68020, additionally ...

• 1 32-bit CPU Route Pointer

• 1 32-bit Supervisor Route Pointer (MMU)

• 1 32-bit Translation Control Register (MMU)

• 2 32-bit Transparent Translation Registers (MMU)

• 1 16-bit MMU Status Register

• supports Demand-Paged Virtual Memory

• programs request memory by accessing logical

addresses

• MMU translates logical into physical addresses

• uses a Translation Table in memory

• for acceleration purposes, the last translated addresses are stored in the Translation Registers

(works like a cache)

MC68030: Memory Management MC68030: Memory Management UnitUnit

• released in April 1989, 3rd generation of MC68000-

compatible 32-bit CPUs

• 2 independent on-chip MMUs, one for Instruction

and one for Data Stream Access

• 4 KByte on-chip Instruction and Data Caches

• on-chip MC68881/MC68882-compatible FPU

• on-chip Bus Snoop Logic (directly supports Cache

Coherency and Multi-Processor-Applications)

• available in 25, 33, and 40 MHz

• listed performance of 44 MIPS at 40 MHz

MC68040: Basic Features (1)MC68040: Basic Features (1)

• supports 3 additional Data Formats for Floating Point Operations, 16-Byte format

(128-bit)for memory access

• Addressing Modes: same as MC68030

• Instruction Set consists of 120 instructions,22 of those are FPU instructions

MC68040: Basic Features (2)MC68040: Basic Features (2)

MC68040: Programming MC68040: Programming ModelModelUser Programming Model:

• contains same registers as MC68000, additionally ...

• 8 80-bit Floating-Point Data Registers

• 3 32-bit Floating-Point Control Registers

Supervisor Programming Model: includes User Programming Model, additionally ...

• all Supervisor Registers of MC68030, but ...• 2 32-bit Instruction TTRs (Instruction MMU)

• 2 32-bit Data TTRs (Data MMU)

• no Cache Address Register

• 1 32-bit User Route Pointer (no CPU RP)

• released in April 1994

• Superscalar Integer Performance of over 100MIPS at 66 MHz

• 2 Integer Units

• 1 on-chip Branch Prediction Logic with 256-entry

Branch Cache

• 8 KByte Instruction and Data Cache

• 2 on-chip MMUs like the MC68040

MC68060: Basic Features (1)MC68060: Basic Features (1)

• allows simultaneous execution of 2 IntegerInstructions (or 1 Integer and 1 Float

Instruction)and 1 Branch Instruction per clock cycle

• on-chip Power Management

• Data Formats and Addressing Modes:same as MC68040

• Instruction Set consists of 122 instructions,24 of those are FPU instructions

• on-chip Temperature Control

MC68060: Basic Features (2)MC68060: Basic Features (2)

MC68060: Programming MC68060: Programming ModelModel

User Programming Model:• contains same registers as MC68040

Supervisor Programming Model: includes User Programming Model, and additionally ...

• all Supervisor Registers of MC68040, but ...

• 1 32-bit Processor Configuration Register (no ISP)

• 1 32-bit Bus Control Register

• no MMU Status Register

Amiga FeaturesAmiga Features• First Amiga (A1000) was introduced in 1985

• CPU: Motorola MC68000, running at 7.14 MHz

• Multiprocessing Hardware with severalCustom Chips (Agnus, Denise, Paula)

• Flexible Memory Architecture (programs can even be executed in the graphics memory)

• Video Compatibility (NTSC and PAL, professionally

used by Television Studios)

• AmigaOS: powerful Multitasking OS with GUI,called ‘Workbench’ (1.x, 2.x, and 3.x)

Workbench 1.xWorkbench 1.x

Workbench 2.xWorkbench 2.x

Workbench 3.xWorkbench 3.x

Amiga Family OverviewAmiga Family Overview

Amiga Models over TimeAmiga Models over TimeModel Year CPUs MHz OS Version Chipset

A1000 1985 68000 7.14 1.0, 1.1, 1.2 OCSA500 1987 68000 7.14 1.2, 1.3 OCSA2000 1987 68000 7.14 1.2, 1.3 OCSA2500 1989 68000 7.14 1.2, 1.3 OCS

1989 68020 14 1.2, 1.3 OCSA3000 1990 68030 16 2.0 ECS

1990 68030 25 2.0 ECSA500+ 1991 68000 7.14 2.04 ECSA600 1991 68000 7.14 2.05 ECSCDTV 1991 68000 7,14 1.3 ECSA1200 1992 68EC020 14 3.0, 3.1 AGAA4000 1992 68030 various 3.0, 3.1 AGA

1992 68EC030 various 3.0, 3.1 AGA1992 68040 various 3.0, 3.1 AGA1992 68060 various 3.0, 3.1 AGA

CD32 1993 68EC020 14 3.0 AGAA4000T 1994 68030 various 3.0, 3.1 AGA

1994 68EC030 various 3.0, 3.1 AGA1994 68040 various 3.0, 3.1 AGA1994 68060 various 3.0, 3.1 AGA

Market PotentialMarket Potential

• lack in the Marketing Strategy:no high MHz numbers

• sales options very limited:Apple and Commodore (closed

systems)

• only remaining major significance:Embedded Computing