TMS320F28335 data manual 有訊號控制流程

8/3/2019 TMS320F28335 data manual

1/196

TMS320F28335, TMS320F28334, TMS320F28332TMS320F28235, TMS320F28234, TMS320F28232Digital Signal Controllers (DSCs)

Data Manual

PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.

Literature Number: SPRS439I

June 2007Revised March 2011


2/196

TM S 320 F28 335 , TM S 320 F2 833 4 , TM S 320 F2 833 2TM S 320 F28 235 , TM S 320 F2 823 4 , TM S 320 F2 823 2

SPRS439IJUNE 2007 REVISED MARCH 2011 www.ti.com

C on ten ts

1 TMS320F2833x, TMS320F2823x DSCs .................................................................................. 111.1 Features .................................................................................................................... 111.2 Getting Started ............................................................................................................. 12

2 Introduction ...................................................................................................................... 132.1 Pin Assignments ........................................................................................................... 152.2 Signal Descriptions ........................................................................................................ 24

3 Functional Overview .......................................................................................................... 343.1 Memory Maps .............................................................................................................. 353.2 Brief Descriptions .......................................................................................................... 42

3.2.1 C28x CPU ....................................................................................................... 423.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 423.2.3 Peripheral Bus .................................................................................................. 423.2.4 Real-Time JTAG and Analysis ................................................................................ 433.2.5 External Interface (XINTF) .................................................................................... 433.2.6 Flash ............................................................................................................. 433.2.7 M0, M1 SARAMs ............................................................................................... 433.2.8 L0, L1, L2, L3, L4, L5, L6, L7 SARAMs ..................................................................... 443.2.9 Boot ROM ........................................................................................................ 44

3.2.9.1 Peripheral Pins Used by the Bootloader ........................................................ 453.2.10 Security .......................................................................................................... 453.2.11 Peripheral Interrupt Expansion (PIE) Block ................................................................. 473.2.12 External Interrupts (XINT1XINT7, XNMI) .................................................................. 473.2.13 Oscillator and PLL .............................................................................................. 473.2.14 Watchdog ........................................................................................................ 473.2.15 Peripheral Clocking ............................................................................................. 47

3.2.16 Low-Power Modes .............................................................................................. 473.2.17 Peripheral Frames 0, 1, 2, 3 (PFn) ........................................................................... 483.2.18 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 483.2.19 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 483.2.20 Control Peripherals ............................................................................................. 493.2.21 Serial Port Peripherals ......................................................................................... 49

3.3 Register Map ............................................................................................................... 503.4 Device Emulation Registers .............................................................................................. 523.5 Interrupts .................................................................................................................... 53

3.5.1 External Interrupts .............................................................................................. 573.6 System Control ............................................................................................................ 58

3.6.1 OSC and PLL Block ............................................................................................ 593.6.1.1 External Reference Oscillator Clock Option .................................................... 603.6.1.2 PLL-Based Clock Module ......................................................................... 613.6.1.3 Loss of Input Clock ................................................................................ 62

3.6.2 Watchdog Block ................................................................................................. 633.7 Low-Power Modes Block ................................................................................................. 64

4 Peripherals ....................................................................................................................... 654.1 DMA Overview ............................................................................................................. 654.2 32-Bit CPU-Timers 0/1/2 ................................................................................................. 67

2 Contents Copyright 20072011, Texas Instruments Incorporated
http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


3/196

TM S 320 F28 335 , TM S 320 F2 833 4 , TM S 320 F28 332TM S 320 F28 235 , TM S 320 F2 823 4 , TM S 320 F28 232

www.ti.com SPRS439I JUNE 2007 REVISED MARCH 2011

4.3 Enhanced PWM Modules (ePWM1/2/3/4/5/6 ) ........................................................................ 694.4 High-Resolution PWM (HRPWM) ....................................................................................... 734.5 Enhanced CAP Modules (eCAP1/2/3/4/5/6) ........................................................................... 744.6 Enhanced QEP Modules (eQEP1/2 ) ................................................................................... 764.7 Analog-to-Digital Converter (ADC) Module ............................................................................ 78

4.7.1 ADC Connections if the ADC Is Not Used .................................................................. 824.7.2 ADC Registers .................................................................................................. 834.7.3 ADC Calibration ................................................................................................. 84

4.8 Multichannel Buffered Serial Port (McBSP) Module .................................................................. 844.9 Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B) .................................... 874.10 Serial Communications Interface (SCI) Modules (SCI-A, SCI-B, SCI-C) .......................................... 924.11 Serial Peripheral Interface (SPI) Module (SPI-A ) ..................................................................... 964.12 Inter-Integrated Circuit (I2C) ............................................................................................. 994.13 GPIO MUX ................................................................................................................ 1004.14 External Interface (XINTF) .............................................................................................. 107

5 Device Support ................................................................................................................ 109

5.1 Device and Development Support Tool Nomenclature ............................................................. 1095.2 Documentation Support ................................................................................................. 1115.3 Community Resources .................................................................................................. 116

6 Electrical Specifications ................................................................................................... 1176.1 Absolute Maximum Ratings ............................................................................................. 1176.2 Recommended Operating Conditions ................................................................................. 1186.3 Electrical Characteristics ................................................................................................ 1186.4 Current Consumption .................................................................................................... 119

6.4.1 Reducing Current Consumption ............................................................................. 1216.4.2 Current Consumption Graphs ............................................................................... 1226.4.3 Thermal Design Considerations ............................................................................. 123

6.5 Emulator Connection Without Signal Buffering for the DSP ....................................................... 1246.6 Timing Parameter Symbology .......................................................................................... 125

6.6.1 General Notes on Timing Parameters ...................................................................... 1256.6.2 Test Load Circuit .............................................................................................. 1256.6.3 Device Clock Table ........................................................................................... 126

6.7 Clock Requirements and Characteristics ............................................................................. 1276.8 Power Sequencing ....................................................................................................... 128

6.8.1 Power Management and Supervisory Circuit Solutions .................................................. 1286.9 General-Purpose Input/Output (GPIO) ................................................................................ 131

6.9.1 GPIO - Output Timing ........................................................................................ 1316.9.2 GPIO - Input Timing .......................................................................................... 132

6.9.3 Sampling Window Width for Input Signals ................................................................. 1336.9.4 Low-Power Mode Wakeup Timing .......................................................................... 134

6.10 Enhanced Control Peripherals ......................................................................................... 1396.10.1 Enhanced Pulse Width Modulator (ePWM) Timing ....................................................... 1396.10.2 Trip-Zone Input Timing ....................................................................................... 1396.10.3 Enhanced Capture (eCAP) Timing ......................................................................... 1406.10.4 Enhanced Quadrature Encoder Pulse (eQEP) Timing ................................................... 1406.10.5 ADC Start-of-Conversion Timing ............................................................................ 141

6.11 External Interrupt Timing ................................................................................................ 141

Copyright 20072011, Texas Instruments Incorporated Contents 3


4/196



6.12 I2C Electrical Specification and Timing ............................................................................... 1426.13 Serial Peripheral Interface (SPI) Timing .............................................................................. 142

6.13.1 Master Mode Timing .......................................................................................... 1426.13.2 SPI Slave Mode Timing ...................................................................................... 147

6.14 External Interface (XINTF) Timing ..................................................................................... 150

6.14.1 USEREADY = 0 ............................................................................................... 1506.14.2 Synchronous Mode (USEREADY = 1, READYMODE = 0) ............................................. 1516.14.3 Asynchronous Mode (USEREADY = 1, READYMODE = 1) ............................................ 1526.14.4 XINTF Signal Alignment to XCLKOUT ..................................................................... 1546.14.5 External Interface Read Timing ............................................................................. 1556.14.6 External Interface Write Timing ............................................................................. 1576.14.7 External Interface Ready-on-Read Timing With One External Wait State ............................ 1596.14.8 External Interface Ready-on-Write Timing With One External Wait State ............................. 1626.14.9 XHOLD and XHOLDA Timing ............................................................................... 165

6.15 On-Chip Analog-to-Digital Converter .................................................................................. 1686.15.1 ADC Power-Up Control Bit Timing .......................................................................... 169

6.15.2 Definitions ...................................................................................................... 1706.15.3 Sequential Sampling Mode (Single-Channel) (SMODE = 0) ............................................ 1716.15.4 Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1) .......................................... 1726.15.5 Detailed Descriptions ......................................................................................... 173

6.16 Multichannel Buffered Serial Port (McBSP) Timing ................................................................. 1746.16.1 McBSP Transmit and Receive Timing ...................................................................... 1746.16.2 McBSP as SPI Master or Slave Timing .................................................................... 177

6.17 Flash Timing .............................................................................................................. 1816.18 Migrating Between F2833x Devices and F2823x Devices ......................................................... 182

7 Revision History .............................................................................................................. 1838 Thermal/Mechanical Data .................................................................................................. 184

4 Contents Copyright 20072011, Texas Instruments Incorporated


5/196



L is t o f F igu r e s

2-1 F2833x, F2823x 176-Pin PGF/PTP LQFP (Top View) ...................................................................... 152-2 F2833x, F2823x 179-Ball ZHH MicroStar BGA (Upper Left Quadrant) (Bottom View) .............................. 172-3 F2833x, F2823x 179-Ball ZHH MicroStar BGA (Upper Right Quadrant) (Bottom View)............................. 182-4 F2833x, F2823x 179-Ball ZHH MicroStar BGA (Lower Left Quadrant) (Bottom View) .............................. 192-5 F2833x, F2823x 179-Ball ZHH MicroStar BGA (Lower Right Quadrant) (Bottom View)............................. 202-6 F2833x, F2823x 176-Ball ZJZ Plastic BGA (Upper Left Quadrant) (Bottom View)...................................... 212-7 F2833x, F2823x 176-Ball ZJZ Plastic BGA (Upper Right Quadrant) (Bottom View).................................... 222-8 F2833x, F2823x 176-Ball ZJZ Plastic BGA (Lower Left Quadrant) (Bottom View)...................................... 232-9 F2833x, F2823x 176-Ball ZJZ Plastic BGA (Lower Right Quadrant) (Bottom View).................................... 233-1 Functional Block Diagram ...................................................................................................... 353-2 F28335/F28235 Memory Map ................................................................................................. 373-3 F28334/F28234 Memory Map ................................................................................................. 383-4 F28332/F28232 Memory Map ................................................................................................. 383-5 External and PIE Interrupt Sources ............................................................................................ 543-6 External Interrupts................................................................................................................ 54

3-7 Multiplexing of Interrupts Using the PIE Block ............................................................................... 553-8 Clock and Reset Domains ...................................................................................................... 583-9 OSC and PLL Block Diagram................................................................................................... 593-10 Using a 3.3-V External Oscillator............................................................................................... 603-11 Using a 1.9 -V External Oscillator.............................................................................................. 603-12 Using the Internal Oscillator .................................................................................................... 603-13 Watchdog Module................................................................................................................ 634-1 DMA Functional Block Diagram ................................................................................................ 664-2 CPU-Timers ....................................................................................................................... 674-3 CPU-Timer Interrupt Signals and Output Signal ............................................................................. 674-4 Multiple PWM Modules in an 2833x/2823x System ......................................................................... 69

4-5 ePWM Submodules Showing Critical Internal Signal Interconnections ................................................... 724-6 eCAP Functional Block Diagram ............................................................................................... 744-7 eQEP Functional Block Diagram ............................................................................................... 764-8 Block Diagram of the ADC Module ............................................................................................ 794-9 ADC Pin Connections With Internal Reference .............................................................................. 804-10 ADC Pin Connections With External Reference ............................................................................. 814-11 McBSP Module .................................................................................................................. 854-12 eCAN Block Diagram and Interface Circuit ................................................................................... 884-13 eCAN-A Memory Map ........................................................................................................... 894-14 eCAN-B Memory Map ........................................................................................................... 904-15 Serial Communications Interface (SCI) Module Block Diagram............................................................ 954-16 SPI Module Block Diagram (Slave Mode)

....................................................................................98

4-17 I2C Peripheral Module Interfaces .............................................................................................. 994-18 GPIO MUX Block Diagram .................................................................................................... 1014-19 Qualification Using Sampling Window ....................................................................................... 1064-20 External Interface Block Diagram............................................................................................. 1074-21 Typical 16-bit Data Bus XINTF Connections................................................................................ 1084-22 Typical 32-bit Data Bus XINTF Connections................................................................................ 1085-1 Example of F2833x, F2823x Device Nomenclature........................................................................ 1106-1 Typical Operational Current Versus Frequency (F28335/F28235/F28334/F28234) ................................... 1236-2 Typical Operational Power Versus Frequency (F28335/F28235/F28334/F28234) .................................... 123

Copyright 20072011, Texas Instruments Incorporated List of Figures 5


6/196



6-3 Emulator Connection Without Signal Buffering for the DSP ............................................................. 1246-4 3.3-V Test Load Circuit......................................................................................................... 1256-5 Clock Timing..................................................................................................................... 1286-6 Power-on Reset ................................................................................................................. 1296-7 Warm Reset ..................................................................................................................... 1306-8 Example of Effect of Writing Into PLLCR Register ......................................................................... 1316-9 General-Purpose Output Timing.............................................................................................. 1326-10 Sampling Mode ................................................................................................................. 1326-11 General-Purpose Input Timing................................................................................................ 1336-12 IDLE Entry and Exit Timing.................................................................................................... 1346-13 STANDBY Entry and Exit Timing Diagram .................................................................................. 1366-14 HALT Wake-Up Using GPIOn................................................................................................. 1386-15 PWM Hi-Z Characteristics ..................................................................................................... 1396-16 ADCSOCAO or ADCSOCBO Timing ........................................................................................ 1416-17 External Interrupt Timing....................................................................................................... 1416-18 SPI Master Mode External Timing (Clock Phase = 0) ..................................................................... 1446-19 SPI Master Mode External Timing (Clock Phase = 1) ..................................................................... 1466-20 SPI Slave Mode External Timing (Clock Phase = 0)....................................................................... 1486-21 SPI Slave Mode External Timing (Clock Phase = 1)....................................................................... 1496-22 Relationship Between XTIMCLK and SYSCLKOUT ....................................................................... 1536-23 Example Read Access ......................................................................................................... 1566-24 Example Write Access ......................................................................................................... 1586-25 Example Read With Synchronous XREADY Access ...................................................................... 1606-26 Example Read With Asynchronous XREADY Access ..................................................................... 1616-27 Write With Synchronous XREADY Access.................................................................................. 1636-28 Write With Asynchronous XREADY Access ................................................................................ 1646-29 External Interface Hold Waveform............................................................................................ 1666-30 XHOLD/XHOLDA Timing Requirements (XCLKOUT = 1/2 XTIMCLK).................................................. 167

6-31 ADC Power-Up Control Bit Timing ........................................................................................... 1696-32 ADC Analog Input Impedance Model ........................................................................................ 1706-33 Sequential Sampling Mode (Single-Channel) Timing...................................................................... 1716-34 Simultaneous Sampling Mode Timing ....................................................................................... 1726-35 McBSP Receive Timing........................................................................................................ 1766-36 McBSP Transmit Timing ....................................................................................................... 1766-37 McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 0 ................................................... 1776-38 McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 0 ................................................... 1786-39 McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 1 ................................................... 1796-40 McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 1 ................................................... 180

6 List of Figures Copyright 20072011, Texas Instruments Incorporated


7/196



L is t o f T ab l e s

2-1 F2833x Hardware Features .................................................................................................... 132-2 F2823x Hardware Features .................................................................................................... 142-3 Signal Descriptions............................................................................................................... 243-1 Addresses of Flash Sectors in F28335/F28235 ............................................................................. 393-2 Addresses of Flash Sectors in F28334/F28234.............................................................................. 393-3 Addresses of Flash Sectors in F28332/F28232.............................................................................. 393-4 Handling Security Code Locations ............................................................................................. 403-5 Wait-states ........................................................................................................................ 413-6 Boot Mode Selection............................................................................................................. 443-7 Peripheral Bootload Pins........................................................................................................ 453-8 Peripheral Frame 0 Registers .................................................................................................. 503-9 Peripheral Frame 1 Registers .................................................................................................. 503-10 Peripheral Frame 2 Registers .................................................................................................. 513-11 Peripheral Frame 3 Registers .................................................................................................. 513-12 Device Emulation Registers..................................................................................................... 52

3-13 PIE Peripheral Interrupts ....................................................................................................... 553-14 PIE Configuration and Control Registers...................................................................................... 563-15 External Interrupt Registers..................................................................................................... 573-16 PLL, Clocking, Watchdog, and Low-Power Mode Registers ............................................................... 593-17 PLL Settings ...................................................................................................................... 613-18 CLKIN Divide Options ........................................................................................................... 613-19 Possible PLL Configuration Modes ............................................................................................ 623-20 Low-Power Modes ............................................................................................................... 644-1 CPU-Timers 0, 1, 2 Configuration and Control Registers................................................................... 684-2 ePWM Control and Status Registers (Default Configuration in PF1)...................................................... 704-3 ePWM Control and Status Registers (Remapped Configuration in PF3 - DMA-Accessible)........................... 71

4-4 eCAP Control and Status Registers ........................................................................................... 754-5 eQEP Control and Status Registers ........................................................................................... 774-6 ADC Registers ................................................................................................................... 834-7 McBSP Register Summary...................................................................................................... 864-8 3.3-V eCAN Transceivers ...................................................................................................... 884-9 CAN Register Map .............................................................................................................. 914-10 SCI-A Registers .................................................................................................................. 934-11 SCI-B Registers .................................................................................................................. 934-12 SCI-C Registers ................................................................................................................. 944-13 SPI-A Registers................................................................................................................... 974-14 I2C-A Registers ................................................................................................................. 1004-15 GPIO Registers

.................................................................................................................102

4-16 GPIO-A Mux Peripheral Selection Matrix ................................................................................... 1034-17 GPIO-B Mux Peripheral Selection Matrix ................................................................................... 1044-18 GPIO-C Mux Peripheral Selection Matrix ................................................................................... 1054-19 XINTF Configuration and Control Register Mapping....................................................................... 1085-1 TMS320x2833x, 2823x Peripheral Selection Guide ....................................................................... 1116-1 TMS320F28335/F28235 Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT ................. 1196-2 TMS320F28334/F28234 Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT ................. 1206-3 Typical Current Consumption by Various Peripherals (at 150 MHz) .................................................... 1216-4 Clocking and Nomenclature (150-MHz Devices) ........................................................................... 126

Copyright 20072011, Texas Instruments Incorporated List of Tables 7


8/196



6-5 Clocking and Nomenclature (100-MHz Devices) ........................................................................... 1266-6 Input Clock Frequency ......................................................................................................... 1276-7 XCLKIN Timing Requirements PLL Enabled ............................................................................. 1276-8 XCLKIN Timing Requirements PLL Disabled ............................................................................ 1276-9 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ...................................................... 1276-10 Power Management and Supervisory Circuit Solutions ................................................................... 1286-11 Reset (XRS) Timing Requirements .......................................................................................... 1306-12 General-Purpose Output Switching Characteristics........................................................................ 1316-13 General-Purpose Input Timing Requirements .............................................................................. 1326-14 IDLE Mode Timing Requirements ........................................................................................... 1346-15 IDLE Mode Switching Characteristics ....................................................................................... 1346-16 STANDBY Mode Timing Requirements ..................................................................................... 1356-17 STANDBY Mode Switching Characteristics ................................................................................ 1356-18 HALT Mode Timing Requirements ........................................................................................... 1376-19 HALT Mode Switching Characteristics ...................................................................................... 1376-20 ePWM Timing Requirements ................................................................................................. 1396-21 ePWM Switching Characteristics ............................................................................................ 1396-22 Trip-Zone Input Timing Requirements ...................................................................................... 1396-23 High-Resolution PWM Characteristics at SYSCLKOUT = (60 150 MHz).............................................. 1406-24 Enhanced Capture (eCAP) Timing Requirement .......................................................................... 1406-25 eCAP Switching Characteristics ............................................................................................. 1406-26 Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements .................................................. 1406-27 eQEP Switching Characteristics ............................................................................................. 1406-28 External ADC Start-of-Conversion Switching Characteristics............................................................. 1416-29 External Interrupt Timing Requirements .................................................................................... 1416-30 External Interrupt Switching Characteristics ................................................................................ 1416-31 I2C Timing ...................................................................................................................... 1426-32 SPI Master Mode External Timing (Clock Phase = 0) .................................................................... 143

6-33 SPI Master Mode External Timing (Clock Phase = 1) .................................................................... 1456-34 SPI Slave Mode External Timing (Clock Phase = 0) ...................................................................... 1476-35 SPI Slave Mode External Timing (Clock Phase = 1) ...................................................................... 1496-36 Relationship Between Parameters Configured in XTIMING and Duration of Pulse ................................... 1506-37 XINTF Clock Configurations .................................................................................................. 1536-38 External Interface Read Timing Requirements ............................................................................. 1556-39 External Interface Read Switching Characteristics......................................................................... 1556-40 External Interface Write Switching Characteristics ......................................................................... 1576-41 External Interface Read Switching Characteristics (Ready-on-Read, 1 Wait State) ................................... 1596-42 External Interface Read Timing Requirements (Ready-on-Read, 1 Wait State) ....................................... 1596-43 Synchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State) ....................................... 159

6-44 Asynchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State)....................................... 1596-45 External Interface Write Switching Characteristics (Ready-on-Write, 1 Wait State) ................................... 1626-46 Synchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ....................................... 1626-47 Asynchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ...................................... 1626-48 XHOLD/XHOLDA Timing Requirements (XCLKOUT = XTIMCLK) ...................................................... 1666-49 XHOLD/XHOLDA Timing Requirements (XCLKOUT = 1/2 XTIMCLK) ................................................. 1676-50 ADC Electrical Characteristics (over recommended operating conditions) ............................................ 1686-51 ADC Power-Up Delays......................................................................................................... 1696-52 Typical Current Consumption for Different ADC Configurations (at 25-MHz ADCCLK) .............................. 169

8 List of Tables Copyright 20072011, Texas Instruments Incorporated


9/196



6-53 Sequential Sampling Mode Timing ........................................................................................... 1716-54 Simultaneous Sampling Mode Timing ....................................................................................... 1726-55 McBSP Timing Requirements ................................................................................................ 1746-56 McBSP Switching Characteristics ........................................................................................... 1756-57 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 0) ................................ 1776-58 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 0)............................ 1776-59 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 0) ................................ 1786-60 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 0)............................ 1786-61 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 1) ................................ 1796-62 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 1)............................ 1796-63 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1) ................................ 1806-64 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1) ........................... 1806-65 Flash Endurance for A and S Temperature Material ...................................................................... 1816-66 Flash Endurance for Q Temperature Material .............................................................................. 1816-67 Flash Parameters at 150-MHz SYSCLKOUT............................................................................... 1816-68 Flash/OTP Access Timing ..................................................................................................... 1816-69 Minimum Required Flash/OTP Wait-States at Different Frequencies ................................................... 1818-1 Thermal Model 176-Pin PGF Results ........................................................................................ 1848-2 Thermal Model 176-Pin PTP Results ........................................................................................ 1848-3 Thermal Model 179-Ball ZHH Results ....................................................................................... 1848-4 Thermal Model 176-Ball ZJZ Results ....................................................................................... 185

Copyright 20072011, Texas Instruments Incorporated List of Tables 9


10/196



10 List of Tables Copyright 20072011, Texas Instruments Incorporated


11/196



D ig i ta l S ign al C on tro l lers (D S C s)Check for Samples: TMS320F28335, TMS320F28334, TMS320F28332, TMS320F28235, TMS320F28234, TMS320F28232

1 TMS320F2833x, TMS320F2823x DSCs

1.1 Features123

High-Performance Static CMOS Technology Enhanced Control Peripherals

Up to 150 MHz (6.67-ns Cycle Time) Up to 18 PWM Outputs

1 .9-V/1.8 -V Core, 3.3-V I/O Design Up to 6 HRPWM Outputs With 150 ps MEPResolution High-Performance 32-Bit CPU (TMS320C28x)

Up to 6 Event Capture Inputs IEEE-754 Single-Precision Floating-PointUnit (FPU) (F2833x only) Up to 2 Quadrature Encoder Interfaces

1 6 x 16 and 32 x 32 MAC Operations Up to 8 32-Bit/Nine 16-Bit Timers

16 x 16 Dual MAC Three 32-Bit CPU Timers

Harvard Bus Architecture Serial Port Peripherals

Fast Interrupt Response and Processing Up to 2 CAN Modules

Unified Memory Programming Model Up to 3 SCI (UART) Modules Code-Efficient (in C/C++ and Assembly) Up to 2 McBSP Modules (Configurable as

SPI) Six-Channel DMA Controller (for ADC, McBSP,ePWM, XINTF, and SARAM) One SPI Module

16-Bit or 32-Bit External Interface (XINTF) One Inter-Integrated-Circuit (I2C) Bus

Over 2M x 16 Address Reach 12-Bit ADC, 16 Channels

On-Chip Memory 80-ns Conversion Rate

F28335/F28235: 256K x 16 Flash, 34K x 16 2 x 8 Channel Input MultiplexerSARAM Two Sample-and-Hold

F28334/F28234: 128K x 16 Flash, 34K x 16 Single/Simultaneous ConversionsSARAM Internal or External Reference

F28332/F28232: 64K x 16 Flash, 26K x 16 Up to 88 Individually Programmable,SARAM

Multiplexed GPIO Pins With Input Filtering 1K x 16 OTP ROM JTAG Boundary Scan Support (1)

Boot ROM (8K x 16) Advanced Emulation Features With Software Boot Modes (via SCI, SPI, Analysis and Breakpoint Functions

CAN, I2C, McBSP, XINTF, and Parallel I/O) Real-Time Debug via Hardware

Standard Math Tables Development Support Includes

Clock and System Control ANSI C/C++ Compiler/Assembler/Linker

Dynamic PLL Ratio Changes Supported Code Composer Studio IDE

On-Chip Oscillator DSP/BIOS

Watchdog Timer Module Digital Motor Control and Digital Power

GPIO0 to GPIO63 Pins Can Be Connected to Software LibrariesOne of the Eight External Core Interrupts

Low-Power Modes and Power Savings Peripheral Interrupt Expansion (PIE) Block That

IDLE, STANDBY, HALT Modes SupportedSupports All 58 Peripheral Interrupts Disable Individual Peripheral Clocks

128-Bit Security Key/Lock

Protects Flash/OTP/RAM Blocks

Prevents Firmware Reverse Engineering

(1) IEEE Standard 1149.1-1990 Standard Test Access Port andBoundary Scan Architecture

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2MicroStar BGA, Code Composer Studio, DSP/BIOS, TMS320C28x, Delfino, PowerPAD, TMS320C54x, TMS320C55x, C28x are trademarksof Texas Instruments.3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Copyright 20072011, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does not

necessarily include testing of all parameters.
http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttps://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28335https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28334https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28332https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28235https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28234https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28232https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28232https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28234https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28235https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28332https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28334https://commerce.ti.com/stores/servlet/SCSAMPLogon?storeId=10001&langId=-1&catalogId=10001&reLogonURL=SCSAMPLogon&URL=SCSAMPSBDResultDisplay&GPN1=tms320f28335http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


12/196



Package Options: Temperature Options:

Lead-free, Green Packaging A: 40C to 85C (PGF, ZHH, ZJZ)

Low-Profile Quad Flatpack (PGF, PTP) S: 40C to 125C (PTP, ZJZ)

MicroStar BGA (ZHH) Q: 40C to 125C (PTP, ZJZ)

Plastic BGA (ZJZ)

1.2 Getting Started

This section gives a brief overview of the steps to take when first developing for a C28x device. For moredetail on each of these steps, see the following:

Getting Started With TMS320C28x Digital Signal Controllers(literature number SPRAAM0).

C2000 Getting Started Website (http://www.ti.com/c2000getstarted)

TMS320F28x DSC Development and Experimenter's Kits (http://www.ti.com/f28xkits)

12 TMS320F2833x, TMS320F2823x DSCs Copyright 20072011, Texas Instruments Incorporated

Submit Documentation Feedback

Product Folder Link(s): TMS320F28335TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234TMS320F28232
http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://www.ti.com/lit/pdf/spraam0http://www.ti.com/c2000getstartedhttp://www.ti.com/f28xkitshttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://www.ti.com/f28xkitshttp://www.ti.com/c2000getstartedhttp://www.ti.com/lit/pdf/spraam0http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


13/196



2 Introduction

The TMS320F28335, TMS320F28334, TMS320F28332, TMS320F28235, TMS320F28234, andTMS320F28232 devices, members of the TMS320C28x/ Delfino DSC/MCU generation, are highlyintegrated, high-performance solutions for demanding control applications.

Throughout this document, the devices are abbreviated as F28335, F28334, F28332, F28235, F28234,

and F28232, respectively. Table 2-1 and Table 2-2 provide a summary of features for each device.

Table 2-1. F2833x Hardware Features

FEATURE TYPE (1) F28335 (150 MHz) F28334 (150 MHz) F28332 (100 MHz)

Instruction cycle 6.67 ns 6.67 ns 10 ns

Floating-point Unit Yes Yes Yes

3.3-V on-chip flash (16-bit word) 256K 128K 64K

Single-access RAM (SARAM) (16-bit word) 34K 34K 26K

One-time programmable (OTP) ROM 1K 1K 1K

(16-bit word)

Code security for on-chip Yes Yes Yes

flash/SARAM/OTP blocks

Boot ROM (8K x 16) Yes Yes Yes

16/32-bit External Interface (XINTF) 1 Yes Yes Yes

6-channel Direct Memory Access (DMA) 0 Yes Yes Yes

PWM outputs 0 ePWM1/2/3/4/5/6 ePWM1/2/3/4/5/6 ePWM1/2/3/4/5/6

ePWM1A/2A/3A/4A/5A/HRPWM channels 0 ePWM1A/2A/3A/4A/5A/6A ePWM1A/2A/3A/4A

6A

32-bit Capture inputs or auxiliary PWM0 eCAP1/2/3/4/5/6 eCAP1/2/3/4 eCAP1/2/3/4

outputs

32-bit QEP channels (four inputs/channel) 0 eQEP1/2 eQEP1/2 eQEP1/2

Watchdog timer Yes Yes Yes

No. of channels 16 16 16

12-Bit ADC MSPS 2 12.5 12.5 12.5

Conversion time 80 ns 80 ns 80 ns

32-Bit CPU timers 3 3 3

Multichannel Buffered Serial Port1 2 (A/B) 2 (A/B) 1 (A)

(McBSP)/SPI

Serial Peripheral Interface (SPI) 0 1 1 1

Serial Communications Interface (SCI) 0 3 (A/B/C) 3 (A/B/C) 2 (A/B)

Enhanced Controller Area Network (eCAN) 0 2 (A/B) 2 (A/B) 2 (A/B)

Inter-Integrated Circuit (I2C) 0 1 1 1

General Purpose I/O pins (shared) 88 88 88

External interrupts 8 8 8

176-Pin PGF Yes Yes Yes

176-Pin PTP Yes Yes Yes

Packaging 179-Ball ZHH Yes Yes Yes

176-Ball ZJZ Yes Yes Yes

A: 40C to 85C (PGF, ZHH, ZJZ) (PGF, ZHH, ZJZ) (PGF, ZHH, ZJZ)

Temperature S: 40C to 125C (PTP, ZJZ) (PTP, ZJZ) (PTP, ZJZ)options

Q: 40C to 125C (PTP, ZJZ) (PTP, ZJZ) (PTP, ZJZ)

(Q100 Qualification)

(1) A type change represents a major functional feature difference in a peripheral module. Within a peripheral type, there may be minordifferences between devices that do not affect the basic functionality of the module. These device-specific differences are listed in theTMS320x28xx, 28xxx DSP Peripheral Reference Guide (literature number SPRU566) and in the peripheral reference guides.

Copyright 20072011, Texas Instruments Incorporated Introduction 13


http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://www.ti.com/lit/pdf/spru566http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://www.ti.com/lit/pdf/spru566http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


14/196



Table 2-1. F2833x Hardware Features (continued)


Product status (2) TMS TMS TMS

(2) See Section 5.1, Device and Development Support Tool Nomenclature, for descriptions of device stages.

Table 2-2. F2823x Hardware Features


Instruction cycle 6.67 ns 6.67 ns 10 ns

Floating-point Unit No No No

3.3-V on-chip flash (16-bit word) 256K 128K 64K

Single-access RAM (SARAM) (16-bit 34K 34K 26K

word)

One-time programmable (OTP) ROM 1K 1K 1K

(16-bit word)

Code security for on-chip Yes Yes Yes

flash/SARAM/OTP blocks

Boot ROM (8K x 16) Yes Yes Yes

16/32-bit External Interface (XINTF) 1 Yes Yes Yes

6-channel Direct Memory Access (DMA) 0 Yes Yes Yes

PWM outputs 0 ePWM1/2/3/4/5/6 ePWM1/2/3/4/5/6 ePWM1/2/3/4/5/6

HRPWM channels 0 ePWM1A/2A/3A/4A/5A/6A ePWM1A/2A/3A/4A/5A/6A ePWM1A/2A/3A/4A

32-bit Capture inputs or auxiliary PWM0 eCAP1/2/3/4/5/6 eCAP1/2/3/4 eCAP1/2/3/4

outputs

32-bit QEP channels (four inputs/channel) 0 eQEP1/2 eQEP1/2 eQEP1/2

Watchdog timer Yes Yes Yes

No. of channels 16 16 16

12-Bit ADC MSPS 2 12.5 12.5 12.5

Conversion time 80 ns 80 ns 80 ns

32-Bit CPU timers 3 3 3

Multichannel Buffered Serial Port1 2 (A/B) 2 (A/B) 1 (A)(McBSP)/SPI

Serial Peripheral Interface (SPI) 0 1 1 1

Serial Communications Interface (SCI) 0 3 (A/B/C) 3 (A/B/C) 2 (A/B)

Enhanced Controller Area Network0 2 (A/B) 2 (A/B) 2 (A/B)

(eCAN)

Inter-Integrated Circuit (I2C) 0 1 1 1

General Purpose I/O pins (shared) 88 88 88

External interrupts 8 8 8

176-Pin PGF Yes Yes Yes

176-Pin PTP Yes Yes YesPackaging

179-Ball ZHH Yes Yes Yes

176-Ball ZJZ Yes Yes Yes

A: 40C to 85C (PGF, ZHH, ZJZ) (PGF, ZHH, ZJZ) (PGF, ZHH, ZJZ)

S: 40C to 125C (PTP, ZJZ) (PTP, ZJZ) (PTP, ZJZ)Temperature options

Q: 40C to 125C(Q100 (PTP, ZJZ) (PTP, ZJZ) (PTP, ZJZ)Qualification)

Product status (2) TMS TMS TMS

(1) A type change represents a major functional feature difference in a peripheral module. Within a peripheral type, there may be minordifferences between devices that do not affect the basic functionality of the module. These device-specific differences are listed in theTMS320x28xx, 28xxx DSP Peripheral Reference Guide (literature number SPRU566) and in the peripheral reference guides.

(2) See Section 5.1, Device and Development Support Tool Nomenclature, for descriptions of device stages.

14 Introduction Copyright 20072011, Texas Instruments Incorporated


http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://www.ti.com/lit/pdf/spru566http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://www.ti.com/lit/pdf/spru566http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


15/196

88

8786

85

84

83

82

81

8079

78

77

76

75

7473

72

71

70

69

68

6766

65

64

63

62

6160

59

58

57

56

55

5453

52

51

50

49

4847

4645

133

134135

136

137

138

139

140

141142

143

144

145

146

147148

149

150

151

152

153

154155

156

157

158

159

160161

162

163

164

165

166

167168

169

170

171

172

173174

175176

1 2 3 4 5 6 7 8 9 10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

132

131

130

129

128

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

100

99

98

97

96

95

94

93

92

91

90

89

GPIO48/ECAP5/XD31

TCK

EMU1

EMU0VDD3VFLVSS

TEST2

TEST1

XRS

TMS

TRST

TDO

TDI

GPIO33/SCLA/EPWMSYNCO/ADCSOCBO

GPIO32/SDAA/EPWMSYNCI/ADCSOCAOGPIO27/ECAP4/EQEP2S/MFSXB

GPIO26/ECAP3/EQEP2I/MCLKXB

VDDIOVSS

GPIO25/ECAP2/EQEP2B/MDRB

GPIO24/ECAP1/EQEP2A/MDXB

GPIO23/EQEP1I/MFSXA/SCIRXDB

GPIO22/EQEP1S/MCLKXA/SCITXDB

GPIO21/EQEP1B/MDRA/CANRXB

GPIO20/EQEP1A/MDXA/CANTXB

G PIO1 9/ /SC IR XD B/CA NT XASPISTEA

GPIO18/SPICLKA/SCITXDB/CANRXA

VDDVSSVDD2A18VSS2AGNDADCRESEXT

ADCREFP

ADCREFM

ADCREFIN

ADCINB7ADCINB6

ADCINB5

ADCINB4

ADCINB3

ADCINB2

ADCINB1

ADCINB0VDDAIO

GPIO75/XD4

GPIO74/XD5

GPIO73/XD6

GPIO72/XD7

GPIO71/XD8

GPIO70/XD9

VD

D

VS

S

GPIO69/XD10

GPIO68/XD11

GPIO67/XD12

VD

DIO

VS

S

GPIO66/XD13

VS

S

VD

D

GPIO65/XD14

GPIO64/XD15

GPIO63/SCITXDC/XD16

GPIO62/SCIRXDC/XD17

GPIO61/MFSRB/XD18

GPIO60/MCLKRB/XD19

GPIO59/MFSRA/XD20

VD

D

VS

S

VD

DIO

VS

S

XCLKIN

X1

VS

S

X2

VD

D

GPIO58/MCLKRA/XD21

GPIO57/

/XD22

SPISTEA

GPIO56/SPICLKA/XD23

GPIO55/SPISOMIA/XD24

GPIO54/SPISIMOA/XD25

GPIO53/EQEP1I/XD26

GPIO52/EQEP1S/XD27

VD

DIO

VS

S

GPIO51/EQEP1B/XD28

GPIO50/EQEP1A/XD29

GPIO49/ECAP6/XD30

GPIO30/CANRXA/XA18

GPIO29/SCITXDA/XA19

VS

S

VD

D

GPIO0/EPWM1A

GPIO1/EPWM1B/ECAP6/MFSRB

GPIO2/EPWM2A

VS

S

VD

DIO

GPIO3/EPWM2B/ECAP5/MCLKRB

GPIO4/EPWM3A

GPIO5/EPWM3B/MFSRA/ECAP1

GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO

VS

S

VD

D

GPIO7/EPWM4B/MCLKRA/ECAP2

GPIO8/EPWM5A/CANTXB/ADCSOCAO

GPIO9/EPWM5B/SCITXDB/ECAP3

GPIO10/EPWM6A/CANRXB/ADCSOCBO

GPIO11/EPWM6B/SCIRXDB/ECAP4

GPIO12

/CANTXB/MDXB

/TZ1

VS

S

VD

D

GPIO13/

/CANRXB/MDRB

TZ2

GPIO14/

/XHOLD/

/

TZ3

SCITXDBMCLKXB

GPIO15/

/XHOLDA

TZ4

/SCIRXDB/MFSXB

GPIO16/SPISIMOA/CANTXB/TZ5

GPIO17/SPISOMIA/CANRXB/TZ6

VD

D

VS

S

VD

D1A18

VS

S1AGND

VS

SA2

VD

DA2

ADCINA7

ADCINA6

ADCINA5

ADCINA4

ADCINA3

ADCINA2

ADCINA1

ADCINA0

ADCLO

VS

SAIO

GPIO76/XD3

GPIO77/XD2

GPIO78/XD1

GPIO79/XD0

GPIO38/XWE0XCLKOUT

VDDVSS

GPIO28/SCIRXDA/XZCS6

GPIO34/ECAP1/XREADY

VDDIOVSS

GPIO36/SCIRXDA/XZCS0VDD

VSSGPIO35/SCITXDA/XR/W

XRDGPIO37/ECAP2/XZCS7

GPIO40/XA0/XWE1

GPIO41/XA1

GPIO42/XA2

VDDVSS

GPIO43/XA3

GPIO44/XA4

GPIO45/XA5VDDIO

VSSGPIO46/XA6

GPIO47/XA7

GPIO80/XA8

GPIO81/XA9

GPIO82/XA10

VSSVDD

GPIO83/XA11

GPIO84/XA12VDDIO

VSSGPIO85/XA13

GPIO86/XA14

GPIO87/XA15

GPIO39/XA16GPIO31/CANTXA/XA17

IRXDA/XZCS6



2.1 Pin Assignments

The 176-pin PGF/PTP low-profile quad flatpack (LQFP) pin assignments are shown in Figure 2-1. The179-ball ZHH ball grid array (BGA) terminal assignments are shown in Figure 2-2 through Figure 2-5. The

176-ball ZJZ plastic ball grid array (PBGA) terminal assignments are shown in Figure 2-6 throughFigure 2-9.Table 2-3 describes the function(s) of each pin.

Figure 2-1. F2833x, F2823x 176-Pin PGF/PTP LQFP (Top View)

NOTEThe powerpad on the bottom side of the PTP package is not connected to the ground (GND)

of the die. Proper thermal management of the PowerPAD package requires PCB

preparation. A thermal land is required on the surface of the PCB directly underneath the

body of the PowerPAD package. The size of the thermal land should be as large as needed

to dissipate the required heat. Note that the PowerPAD package with exposed pad down

must be soldered to the PCB. Refer to the PowerPAD Thermally Enhanced Package

Application Report (literature number SLMA002) for more details on using the PowerPAD

package.



http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.ti.com/lit/pdf/SLMA002http://www.ti.com/lit/pdf/SLMA002http://www.ti.com/lit/pdf/SLMA002http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://www.ti.com/lit/pdf/SLMA002http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://www.ti.com/lit/pdf/SLMA002http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


16/196

ADCINB0 ADCINB2 ADCINB6 ADCREFP

ADCINA1

ADCRESEXT ADCINA2 ADCLO ADCINA0 ADCINB4

VSS1AGND

ADCINA4 ADCINA3 ADCINB3 ADCREFIN

P P

N N

M M

L LADCINA5

GPIO18/

SPICLKA/

SCITXDB/

CANRXA

VSSA2 ADCI NA7 ADC IN B7

GPIO17/

SPISOMIA/

CANRXB/

TZ6

VDD1A18VDD

GPIO14/

/

SCITXDB/

MCLKXB

TZ3XHOLD/

GPIO13/

CANRXB/

MDRB

TZ2/

VDDAIO

K K

J J

H H

1 2 3 4 5

6 7

GPIO20/

EQEP1A/

MDXA/

CANTXB

VSS2AGND

GPIO21/

EQEP1B/

MDRA/

CANRXB

GPIO22/EQEP1S/

MCLKXA/

SCITXDB

VSS

1 2 3 4 5 6 7

VSSAIO VSS

VDD

VDD

GPIO23/

EQEP1I/

MFSXA/

SCIRXDB

GPIO19/

SCIRXDB/

CANTXA

SPISTEA/

ADCINA6

GPIO16/

SPISIMOA/

CANTXB/

TZ5

GPIO15/

/

SCIRXDB/

MFSXB

TZ4XHOLDA/

VDDA2

VDD2A18

ADCREFMADCINB5ADCINB1



Figure 2-2. F2833x, F2823x 179-Ball ZHH MicroStar BGA (Upper Left Quadrant) (Bottom View)



http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


17/196

GPIO50/

EQEP1A/

XD29

TMS TEST2 EMU1

GPIO51/

EQEP1B/

XD28

GPIO48/

ECAP5/

XD31

TCK

GPIO52/

EQEP1S/

XD27

VSS

GPIO27/

ECAP4/

EQEP2S/

MFSXB

XRS EMU0

GPIO53/

EQEP1I/

XD26

VDD

GPIO55/

SPISOMIA/

XD24

VSS

GPIO56/

SPICLKA/

XD23

GPIO58/

MCLKRA/

XD21

GPIO33/

SCLA/

EPWMSYNCO/

ADCSOCBO

TRST

GPIO32/

SDAA/

EPWMSYNCI/

ADCSOCAO

VDDIO

8 9

10 11 12 13 14

PP

NN

MM

LL

KK

JJ

HH

GPIO57/

/

XD22

SPISTEA

X1 XCLKIN

GPIO59/

MFSRA/

XD20

VSS

GPIO25/

ECAP2/

EQEP2B/

MDRB

VSS

VDD

VSS

8 9 10 11 12 13 14

VSS

VSS

TEST1

VDD3VFL

GPIO24/

ECAP1/

EQEP2A/

MDXB

GPIO26/

ECAP3/

EQEP2I/

MCLKXB

TDO

VDDIO

VSSX2

GPIO54/

SPISIMOA/

XD25

TDI

VDDIO

GPIO49/

ECAP6/

XD30



Figure 2-3. F2833x, F2823x 179-Ball ZHH MicroStar BGA (Upper Right Quadrant) (Bottom View)



http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.html


18/196

GPIO11

EPWM6B

SCIRXDB

ECAP4

/

/

/

GPIO12

CANTXB

MDXB

/

/

/

TZ1

GPIO10

EPWM6A

CANRXB

/

/

/

ADCSOCBO

GPIO9/

EPWM5B/

SCITXDB/

ECAP3

GPIO81/

XA9

GPIO8/

EPWM5A/

CANTXB/

ADCSOCAO

GPIO7/

EPWM4B/

MCLKRA/

ECAP2

GPIO84/

XA12

GPIO6/

EPWM4A/

EPWMSYNCI/

EPWMSYNCO

GPIO4/

EPWM3A

GPIO5/

EPWM3B/

MFSRA/

ECAP1

GPIO3/

EPWM2B/

ECAP5/

MCLKRB

VDDIO

VDDIO

VSSGPIO2/

EPWM2A

GPIO1/

EPWM1B/

ECAP6/

MFSRB

GPIO86/

XA14

GPIO83/

XA11

G

F

E

D

GPIO0/

EPWM1A

GPIO29/

SCITXDA/

XA19

VSSGPIO85/

XA13

GPIO82/

XA10

VDD

GPIO30/

CANRXA/

XA18

GPIO39/

XA16VSS VDD

GPIO31/CANTXA/

XA17

GPIO87/

XA15VDDIO

C

B

A

1 2 3 4 5 6 7

G

F

E

D

C

B

A

VSSGPIO45/

XA5

VSSGPIO80/

XA8

GPIO46/

XA6

GPIO43/

XA3

GPIO44/

XA4

GPIO47/

XA7VSS

1 2 3 4 5

6 7

VSSVDD

VSS



Figure 2-4. F2833x, F2823x 179-Ball ZHH MicroStar BGA (Lower Left Quadrant) (Bottom View)



http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28335.htmlhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SPRS439I&partnum=TMS320F28335http://focus.ti.com/docs/prod/folders/print/tms320f28232.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28234.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28235.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28332.htmlhttp://focus.ti.com/docs/prod/folders/print/tms320f28334.htmlhttp://focus.ti.com/docs/prod/folders/print/tms3

TMS320F28335 data manual 有訊號控制流程

Documents