Slovak University of Technology Institute of Electronics and Photonics MOS-AK Workshop Bucharest 2013 Three-Dimensional Electro-Thermal Circuit Model of Power Super-Junction MOSFET Sep. 20, 2013 Bucharest MOS Modeling and Parameter Extraction Working Group 11 th MOS-AK/GSA ESSDERC ESSCIRC Workshop Aleš Chvála Slovak University of Technology in Bratislava
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Three-Dimensional Electro-Thermal Circuit Model of Power Super-Junction
MOSFET
Sep. 20, 2013 Bucharest MOS Modeling and Parameter Extraction Working Group11th MOS-AK/GSA ESSDERC ESSCIRC Workshop
Aleš Chvála
Slovak University of Technology in Bratislava
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Motivation
Development and calibration of electro-thermal MOSFET model for power technology
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Outline
• Introduction
• Electrical compact model of Super Junction MOSFET
• Electrical equivalent of three-dimensional thermal system
• Experiment and model verification (UIS test)
• Conclusions
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
• Circuit simulators are standard tools in the development and optimization of electronic systems
• SPICE-like models provide faster results but in general do not take into account nonlinear thermal dependences of certain parameters
• Properties of power semiconductor devices are very strongly temperature-dependent
• Self-heating and dynamic interdependence between electrical and thermal components of corresponding model need to be implement
INTRODUCTION
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Super Junction MOSFET – high voltage technology (BV ~ 600V)
For analysis novel locally charge balancedtrench based super-junction n-channelpower MOSFET was used. Samples exceedV(BR)DSS ~ 600 V, VGSTH = 4 V,RON = 23mΩ/cm2 and single pulse drain-to-source avalanche energy EAS = 800 mJ forL = 10mH
ELECTRICAL COMPACT MODEL
T. Fujihira, “Theory of Semiconductor SuperJunction Devices,” Jpn J. Appl. Phys, 36(10), pp. 6254-6262, 1997.
P. Moens, et al., “UltiMOS: A Local Charge-Balanced Trench-Based 600V Super-Junction Device,” proc. of the 23rd International Symposium on PowerSemiconductor Devices & ICs, ISPSD, pp. 304-307, 2011.
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Die
Lead framePackage
S D
G
ELECTRICAL COMPACT MODELSuper Junction MOSFET
2D doping concentration DPAK2 package
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thermal systemElectrical circuit
PowerPower
Temperature
Circuit electro-thermal model
INTRODUCTION
Interaction between electrical and thermal parts
Slovak University of TechnologyInstitute of Electronics and Photonics
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Breakdown characteristicsof SJ MOSFET
Transfer characteristicsof SJ MOSFET
ELECTRICAL COMPACT MODEL
T (K)
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
CV characteristics of SJ MOSFET
ELECTRICAL COMPACT MODEL
Measurement setup for CGS, CGD
and CDS measurements
H.Suto et.al, 'Methodology for Accurate C-V Measurements of GateInsulators below 1.5nm EOT', Extended Abstracts of the 2002 Int'l Conf. on Solid State Devices and Materials, Nagoya, pp. 748-749
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thermal destruction (SBURN)
ELECTRICAL COMPACT MODEL
BLACKBURN, D. L. Power MOSFET failure revisited, In Power Electronics Specialists Conference PESC '88, Kyoto, Japan, 1988, pp. 681-688.
Donoval, D., Vrbicky, A., Marek, J., Chvala, A., Beno, P., "Evaluation of the ruggedness of power DMOS transistor from electro-thermal simulation of UIS behaviour", Solid-State Electronics, 52, pp. 892-898, 2008.
Destructive energy3/4 vs. starting temperature and respective extrapolation of maximum device temperature
Estimate of device temperature from VDS(Breakdown) = f(temperature)
Slovak University of TechnologyInstitute of Electronics and Photonics