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The NOR gate output will be high if the two inputs are __________ a) 00 b) 01 c) 10 d) 11 Answer: a Explanation: In 01, 10 or 11 output is low if any of the I/P is high. So, the correct option will be 00. How many two-input AND and OR gates are required to realize Y = CD+EF+G? a) 2, 2 b) 2, 3 c) 3, 3 d) 3, 2 Answer: a Explanation: Y = CD + EF + G The number of two input AND gate = 2 The number of two input OR gate = 2. A universal logic gate is one which can be used to generate any logic function. Which of the following is a universal logic gate? a) OR b) AND c) XOR d) NAND Answer: d Explanation: An Universal Logic Gate is one which can generate any logic function and also the three basic gates: AND, OR and NOT. Thus, NOR and NAND can generate any logic function and are thus Universal Logic Gates. A full adder logic circuit will have __________ a) Two inputs and one output b) Three inputs and three outputs c) Two inputs and two outputs d) Three inputs and two outputs Answer: d Explanation: A full adder circuit will add two bits and it will also accounts the carry input
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May 15, 2022

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Page 1: The NOR gate output will be high if the two inputs are

The NOR gate output will be high if the two inputs are __________

a) 00

b) 01

c) 10

d) 11

Answer: a

Explanation: In 01, 10 or 11 output is low if any of the I/P is high. So, the correct option will

be 00.

How many two-input AND and OR gates are required to realize Y = CD+EF+G?

a) 2, 2

b) 2, 3

c) 3, 3

d) 3, 2

Answer: a

Explanation: Y = CD + EF + G

The number of two input AND gate = 2

The number of two input OR gate = 2.

A universal logic gate is one which can be used to generate any logic function. Which of

the following is a universal logic gate?

a) OR

b) AND

c) XOR

d) NAND

Answer: d

Explanation: An Universal Logic Gate is one which can generate any logic function and also

the three basic gates: AND, OR and NOT. Thus, NOR and NAND can generate any logic

function and are thus Universal Logic Gates.

A full adder logic circuit will have __________

a) Two inputs and one output

b) Three inputs and three outputs

c) Two inputs and two outputs

d) Three inputs and two outputs

Answer: d

Explanation: A full adder circuit will add two bits and it will also accounts the carry input

Page 2: The NOR gate output will be high if the two inputs are

generated in the previous stage. Thus three inputs and two outputs (Sum and Carry) are

there. In case of half adder circuit, there are only two inputs bits and two outputs (SUM and

CARRY).

How many two input AND gates and two input OR gates are required to realize Y = BD

+ CE + AB?

a) 3, 2

b) 4, 2

c) 1, 1

d) 2, 3

Answer: a

Explanation: There are three product terms. So, three AND gates of two inputs are required.

As only two input OR gates are available, so two OR gates are required to get the logical sum

of three product terms.

Which of the following are known as universal gates?

a) NAND & NOR

b) AND & OR

c) XOR & OR

d) EX-NOR & XOR

Answer: a

Explanation: The NAND & NOR gates are known as universal gates because any digital

circuit can be realized completely by using either of these two gates, and also they can

generate the 3 basic gates AND, OR and NOT.

The gates required to build a half adder are __________

a) EX-OR gate and NOR gate

b) EX-OR gate and OR gate

c) EX-OR gate and AND gate

d) EX-NOR gate and AND gate

Answer: c

Explanation: The gates required to build a half adder are EX-OR gate and AND gate. EX-OR

outputs the SUM of the two input bits whereas AND outputs the CARRY of the two input

bits.

Page 3: The NOR gate output will be high if the two inputs are

The inverter is ……………

1. NOT gate

2. OR gate

3. AND gate

4. None of the above

Ans. 1

The inputs of a NAND gate are connected together. The resulting circuit is ………….

1. OR gate

2. AND gate

3. NOT gate

4. None of the above

Ans. 3

The NOR gate is OR gate followed by ………………

1. AND gate

2. NAND gate

3. NOT gate

4. None of the above

Ans. 3

The NAND gate is AND gate followed by …………………

1. NOT gate

2. OR gate

3. AND gate

4. None of the above

Ans. 1

Digital circuit can be made by the repeated use of ………………

1. OR gates

2. NOT gates

3. NAND gates

4. None of the above

Page 4: The NOR gate output will be high if the two inputs are

Ans. 3

The only function of NOT gate is to ……………..

1. Stop signal

2. Invert input signal

3. Act as a universal gate

4. None of the above

Ans. 2

When an input signal 1 is applied to a NOT gate, the output is ………………

1. 0

2. 1

3. Either 0 & 1

4. None of the above

Ans. 1

In Boolean algebra, the bar sign (-) indicates ………………..

1. OR operation

2. AND operation

3. NOT operation

4. None of the above

Ans. 3

An OR gate has 4 inputs. One input is high and the other three are low. The output

is …….

1. Low

2. High

3. alternately high and low

4. may be high or low depending on relative magnitude of inputs

Ans. 2

Page 5: The NOR gate output will be high if the two inputs are

Both OR and AND gates can have only two inputs.

1. True

2. False

Ans. 2

The output will be a LOW for any case when one or more inputs are zero in a/an

…………

1. OR Gate

2. NOT Gate

3. AND Gate

4. NAND Gate

Ans. 3

A single transistor can be used to build ………….. gates .

1. OR Gate

2. NOT Gate

3. AND Gate

4. NAND Gate

Ans. 3

The logic gate that will have HIGH or “1” at its output when any one of its inputs is

HIGH is a/an …………… gate.

1. OR Gate

2. NOT Gate

3. AND Gate

4. NAND Gate

Ans. 1

…………. NAND circuits are contained in a 7400 NAND IC.

1. 1

2. 2

3. 4

4. 8

Page 6: The NOR gate output will be high if the two inputs are

Ans. 3

Exclusive-OR (XOR) logic gates can be constructed from ………..logic gates.

1. OR gates only

2. AND gates and NOT gates

3. AND gates, OR gates, and NOT gates

4. OR gates and NOT gates

Ans. 3

……….. truth table entries are necessary for a four-input circuit.

1. 4

2. 8

3. 12

4. 16

Ans. 4

A NAND gate has …….. inputs and ……. output.

1. LOW inputs and LOW outputs

2. HIGH inputs and HIGH outputs

3. LOW inputs and HIGH outputs

4. None of these

Ans. 3

The basic logic gate whose output is the complement of the input is ………….

1. OR gate

2. AND gate

3. INVERTER gate

4. Comparator

Ans. 3

……….. input values will cause an AND logic gate to produce a HIGH output.

1. At least one input is HIGH

2. At least one input is LOW

Page 7: The NOR gate output will be high if the two inputs are

3. All inputs are HIGH

4. All inputs are LOW

Ans. 3

The binary number 10101 is equivalent to decimal number …………..

1. 19

2. 12

3. 27

4. 21

Answer : 4

2’s complement of binary number 0101 is ………..

1. 1011

2. 1111

3. 1101

4. 1110

Answer : 1

Explanation: 1’s complement of 0101 is 1010 and 2’s complement is 1010+1 = 1011

Decimal number 10 is equal to binary number ……………

1. 1110

2. 1010

3. 1001

4. 1000

Answer : 2

Explanation: 1010 = 8 + 2 = 10 in decimal.

A device which converts BCD to seven segments is called ……..

1. Encoder

2. Decoder

3. Multiplexer

4. None of these

Page 8: The NOR gate output will be high if the two inputs are

Answer : 2

Explanation: Decoder converts binary/BCD to alphanumeric.

In 2’s complement representation the number 11100101 represents the decimal number

……………

1. +37

2. -31

3. +27

4. -27

Answer : 4

Explanation:

A = 11100101. Therefore Ā = 00011010 and A’ = Ā + 1 = 00011011 = 16 + 8 + 2 + 1 = 27.

Therefore A = -27.

For the gate in the given figure the output will be ………..

1. 0

2. 1

3. A

4. Ā

Answer : 4

Explanation: If A = 0, Y = 1 and A = 1, Y = 0 Therefore Y = Ā.

The number of digits in octal system is ………

1. 8

2. 7

3. 9

4. 10

Answer : 1

Page 9: The NOR gate output will be high if the two inputs are

Explanation: The octal system has 8 digits 0 to 7.

Decimal 43 in hexadecimal and BCD number system is respectively……. and ……..

1. B2 and 01000011

2. 2B and 01000011

3. 2B and 00110100

4. B2 and 01000100

Answer : 2

Explanation:

The greatest negative number which can be stored is 8 bit computer using 2’s

complement arithmetic is ……..

1. -256

2. -128

3. -255

4. -127

Answer: 2

Explanation: The largest negative number is 1000 0000 = -128.

The basic storage element in a digital system is ………….

1. flipflop

2. counter

3. multiplexer

4. encoder

Answer : 1

Explanation: Storing can be done only in memory and flip-flop is a memory element.

Page 10: The NOR gate output will be high if the two inputs are

The output of a half adder is ……….

1. Sum

2. Sum and Carry

3. Carry

4. none of these

Answer: 2

7BF16 = __________ 2

1. 0111 1011 1110

2. 0111 1011 1111

3. 0111 1011 0111

4. 0111 1011 0011

Answer : 2

Explanation:

7BF16 = 0111 1011 1111 in binary.

(= 7 x 162 + 11 x 16

1 + 15 x 16

0 = 1983 in decimal )

The hexadecimal number (3E8)16 is equal to decimal number ………

1. 1000

2. 982

3. 768

4. 323

Answer : 1

Explanation: 3 x 162 + 14 x 16

1 + 8 = 1000

The number of distinct Boolean expression of 4 variables is …….

1. 16

2. 256

3. 1024

4. 65536

Answer : 4

Page 11: The NOR gate output will be high if the two inputs are

Explanation:

1’s complement of 11100110 is ……………….

1. 00011001

2. 10000001

3. 00011010

4. 00000000

Answer: 1

Explanation: By replacing 1 by 0 and 0 by 1.

An inverter gates can be developed using

a. Two diodes

b. Resistance and capacitance

c. Transistor

d. Inductance and capacitance

Answer: (c) Transistor

The truth table for an S-R flip-flop has how many VALID entries?

a) 1

b) 2

c) 3

d) 4

View Answer

Answer: c

Explanation: The SR flip-flop actually has three inputs, Set, Reset and its current state. The

Invalid or Undefined State occurs at both S and R being at 1.

The logic circuits whose outputs at any instant of time depends only on the present

input but also on the past outputs are called ________________

a) Combinational circuits

b) Sequential circuits

c) Latches

Page 12: The NOR gate output will be high if the two inputs are

d) Flip-flops

View Answer

Answer: b

Explanation: In sequential circuits, the output signals are fed back to the input side. So, The

circuits whose outputs at any instant of time depends only on the present input but also on the

past outputs are called sequential circuits. Unlike sequential circuits, if output depends only

on the present state, then it’s known as combinational circuits.

The basic latch consists of ___________

a) Two inverters

b) Two comparators

c) Two amplifiers

d) Two adders

Answer: a

Explanation: The basic latch consists of two inverters. It is in the sense that if the output Q =

0 then the second output Q’ = 1 and vice versa.

In S-R flip-flop, if Q = 0 the output is said to be ___________

a) Set

b) Reset

c) Previous state

d) Current state

Answer: b

Explanation: In S-R flip-flop, if Q = 0 the output is said to be reset and set for Q = 1.

The output of latches will remain in set/reset untill ___________

a) The trigger pulse is given to change the state

b) Any pulse given to go into previous state

c) They don’t get any pulse more

d) The pulse is edge-triggered

Answer: a

Explanation: The output of latches will remain in set/reset untill the trigger pulse is given to

change the state.

What is a trigger pulse?

a) A pulse that starts a cycle of operation

b) A pulse that reverses the cycle of operation

c) A pulse that prevents a cycle of operation

Page 13: The NOR gate output will be high if the two inputs are

d) A pulse that enhances a cycle of operation

Answer: a

Explanation: Trigger pulse is defined as a pulse that starts a cycle of operation.

In a J-K flip-flop, if J=K the resulting flip-flop is referred to as _____________

a) D flip-flop

b) S-R flip-flop

c) T flip-flop

d) S-K flip-flop

Answer: c

Explanation: In J-K flip-flop, if both the inputs are same then it behaves like T flip-flop.

The flip-flop is only activated by _____________

a) Positive edge trigger

b) Negative edge trigger

c) Either positive or Negative edge trigger

d) Sinusoidal trigger

Answer: c

Explanation: Flip flops can be activated with either a positive or negative edge trigger.

Both the J-K & the T flip-flop are derived from the basic _____________

a) S-R flip-flop

b) S-R latch

c) D latch

d) D flip-flop

Answer: b

Explanation: The SR latch is the basic block for the D latch/flip flop from which the JK and T

flip flops are derived. A latch is similar to a flip-flop, only without a clock input.

The flip-flops which has not any invalid states are _____________

a) S-R, J-K, D

b) S-R, J-K, T

c) J-K, D, S-R

d) J-K, D, T

Page 14: The NOR gate output will be high if the two inputs are

Answer: d

Explanation: Unlike the SR latch, these circuits have no invalid states. The SR latch or flip-

flop has an invalid or forbidden state where no output could be determined.

What does the triangle on the clock input of a J-K flip-flop mean?

a) Level enabled

b) Edge triggered

c) Both Level enabled & Edge triggered

d) Level triggered

Answer: b

Explanation: The triangle on the clock input of a J-K flip-flop mean edge triggered. Whereas

the absence of triangle symbol implies that the flip-flop is level-triggered.

What does the circle on the clock input of a J-K flip-flop mean?

a) Level enabled

b) Positive edge triggered

c) negative edge triggered

d) Level triggered

Answer: c

Explanation: The circle on the clock input of a J-K flip-flop mean negative edge triggered.

Whereas the absence of triangle symbol implies that the flip-flop is level-triggered.

What does the direct line on the clock input of a J-K flip-flop mean?

a) Level enabled

b) Positive edge triggered

c) negative edge triggered

d) Level triggered

Answer: d

Explanation: The direct line on the clock input of a J-K flip-flop mean level triggered.

Whereas the presence of triangle symbol implies that the flip-flop is edge-triggered.

Page 15: The NOR gate output will be high if the two inputs are

The given hexadecimal number (1E.53)16 is equivalent to ____________

a) (35.684)8

b) (36.246)8

c) (34.340)8

d) (35.599)8

Answer: b

Explanation: First, the hexadecimal number is converted to it’s equivalent binary form, by

writing the binary equivalent of each digit in form of 4 bits. Then, the binary equivalent bits

are grouped in terms of 3 bits and then for each of the 3-bits, the respective digit is written.

Thus, the octal equivalent is obtained.

(1E.53)16 = (0001 1110.0101 0011)2

= (00011110.01010011)2

= (011110.010100110)2

= (011 110.010 100 110)2

= (36.246)8.

The octal number (651.124)8 is equivalent to ______

a) (1A9.2A)16

b) (1B0.10)16

c) (1A8.A3)16

d) (1B0.B0)16

Answer: a

Explanation: First, the octal number is converted to it’s equivalent binary form, by writing the

binary equivalent of each digit in form of 3 bits. Then, the binary equivalent bits are grouped

in terms of 4 bits and then for each of the 4-bits, the respective digit is written. Thus, the

hexadecimal equivalent is obtained.

(651.124)8 = (110 101 001.001 010 100)2

= (110101001.001010100)2

= (0001 1010 1001.0010 1010)2

= (1A9.2A)16.

The octal equivalent of the decimal number (417)10 is _____

a) (641)8

b) (619)8

c) (640)8

Page 16: The NOR gate output will be high if the two inputs are

d) (598)8

Answer: a

Explanation: Octal equivalent of decimal number is obtained by dividing the number by 8

and collecting the remainders in reverse order.

8 | 417

8 | 52 — 1

8 | 6 – 4

So, (417)10 = (641)8.

Convert the hexadecimal number (1E2)16 to decimal.

a) 480

b) 483

c) 482

d) 484

Answer: c

Explanation: Hexadecimal to Decimal conversion is obtained by multiplying 16 to the power

of base index along with the value at that index position.

(1E2)16 = 1 * 162 + 14 * 16

1 + 2 * 16

0 (Since, E = 14)

= 256 + 224 + 2 = (482)10.

(170)10 is equivalent to ____________

a) (FD)16

b) (DF)16

c) (AA)16

d) (AF)16

Answer: c

Explanation: Hexadecimal equivalent of decimal number is obtained by dividing the number

by 16 and collecting the remainders in reverse order.

16 | 170

16 | 10 – 10

Hence, (170)10 = (AA)16.

Convert (214)8 into decimal.

a) (140)10

Page 17: The NOR gate output will be high if the two inputs are

b) (141)10

c) (142)10

d) (130)10

Answer: a

Explanation: Octal to Decimal conversion is obtained by multiplying 8 to the power of base

index along with the value at that index position.

(214)8 = 2 * 8v + 1 * 81 + 4 * 8

0

= 128 + 8 + 4 = (140)10.

Convert (0.345)10 into an octal number.

a) (0.16050)8

b) (0.26050)8

c) (0.19450)8

d) (0.24040)8

Answer: b

Explanation: Converting decimal fraction into octal number is achieved by multiplying the

fraction part by 8 everytime and collecting the integer part of the result, unless the result is 1.

0.345*8 = 2.76 2

0.760*8 = 6.08 6

00.08*8 = 0.64 0

0.640*8 = 5.12 5

0.120*8 = 0.96 0

So, (0.345)10 = (0.26050)8.

Convert the binary number (01011.1011)2 into decimal.

a) (11.6875)10

b) (11.5874)10

c) (10.9876)10

d) (10.7893)10

Answer: a

Explanation: Binary to Decimal conversion is obtained by multiplying 2 to the power of base

index along with the value at that index position.

(01011)2 = 0 * 24 + 1 * 2

3 + 0 * 2

2 + 1 * 2

1 + 1 * 2

0 = 11

Page 18: The NOR gate output will be high if the two inputs are

(1011)2 = 1 * 2-1

+ 0 * 2-2

+ 1 * 2-3

+ 1 * 2-4

= 0.6875

So, (01011.1011)2 = (11.6875)10.

Octal to binary conversion: (24)8 =?

a) (111101)2

b) (010100)2

c) (111100)2

d) (101010)2

Answer: b

Explanation: Each digit of the octal number is expressed in terms of group of 3 bits. Thus, the

binary equivalent of the octal number is obtained.

(24)8 = (010100)2.

Convert binary to octal: (110110001010)2 =?

a) (5512)8

b) (6612)8

c) (4532)8

d) (6745)8

Answer: b

Explanation: The binary equivalent is segregated into groups of 3 bits, starting from left. And

then for each group, the respective digit is written. Thus, the octal equivalent is obtained.

(110110001010)2 = (6612)8.

Any signed negative binary number is recognised by its ________

a) MSB

b) LSB

c) Byte

d) Nibble

Answer: a

Explanation: Any negative number is recognized by its MSB (Most Significant Bit).

If it’s 1, then ít’s negative, else if it’s 0, then positive.

Page 19: The NOR gate output will be high if the two inputs are

An important drawback of binary system is ________

a) It requires very large string of 1’s and 0’s to represent a decimal number

b) It requires sparingly small string of 1’s and 0’s to represent a decimal number

c) It requires large string of 1’s and small string of 0’s to represent a decimal number

d) It requires small string of 1’s and large string of 0’s to represent a decimal number

Answer: a

Explanation: The most vital drawback of binary system is that it requires very large string of

1’s and 0’s to represent a decimal number. Hence, Hexadecimal systems are used by

processors for calculation purposes as it compresses the long binary strings into small parts.

Representation of hexadecimal number (6DE)H in decimal:

a) 6 * 162 + 13 * 16

1 + 14 * 16

0

b) 6 * 162 + 12 * 16

1 + 13 * 16

0

c) 6 * 162 + 11 * 16

1 + 14 * 16

0

d) 6 * 162 + 14 * 16

1 + 15 * 16

0

Answer: a

Explanation: Hexadecimal to Decimal conversion is obtained by multiplying 16 to the power

of base index along with the value at that index position.

In hexadecimal number D & E represents 13 & 14 respectively.

So, 6DE = 6 * 162 + 13 * 16

1 + 14 * 16

0.

The quantity of double word is ________

a) 16 bits

b) 32 bits

c) 4 bits

d) 8 bits

Answer: b

Explanation: One word means 16 bits, Thus, the quantity of double word is 32 bits.

How many entries will be in the truth table of a 4-input NAND gate?

Page 20: The NOR gate output will be high if the two inputs are

1. 6

2. 8

3. 32

4. 16

Answer: d

Explanation:

A NAND gate is a universal logic gate that performs the negation (NOT) of an AND logic

operations in digital circuits.

As we know,

Y = 2n Y number of Entries in the truth table

Where , n = number of inputs.

What is the addition of the binary number 101001+ 010011=?

1. 010100

2. 111100

3. 000111

4. 101110

Answer: b

Explanation: If you want to add any binary number, first, you need to know the binary

addition rules.

0 + 1 = 1

1 + 0 = 1

0 + 0 = 0

1 + 1 = 0 (with carry 1)

101001+ 010011 = 111100

What is the binary subtraction of 101001 - 010110 =?

Page 21: The NOR gate output will be high if the two inputs are

1. 010011

2. 100110

3. 011001

4. 010010

Answer: a

Explanation: If you want to subtract any binary number, first, you need to know the binary

subtraction rules.

1 - 0 = 1

0 - 1 = 1 (With borrow 1)

0 - 0 = 0

1 - 1 = 0

therefore, the subtraction of 101001 - 010110 = 010011

DeMorgan's Law states that

1. (A+B)' = A'*B

2. (AB)' = A' + B'

3. (AB)' = A' + B

4. (AB)' = A + B

Answer: b

Explanation: DeMorgan's theorems play a vital role in digital electronics. It gives an

equivalency between the logic gates. There are two distinct types of DeMorgan's theorems:

the first gives the equivalent of the NAND gate, and the other gives the equivalent of the

NOR gate. As per the dual property of DeMorgan's theorem (AB)' = A' + B' & (A+B) = A' *

B'

One nibble is equal to how many bits

1. 4

2. 2

3. 16

4. 8

Page 22: The NOR gate output will be high if the two inputs are

Answer: a

Explanation: In digital electronics, the smallest unit of storage consisting of either 0 or 1 is

called a bit. The arrangement of such 4 bits is known as a nibble. The arrangement of such 8

bits is known as a byte.

Suppose the output of an XNOR gate is 1. Which of the given input combination is

correct?

1. A = 0, B' = 1

2. A = 1, B = 1

3. A = 0, B = 1

4. A = 0, B = 0

Answer: d

Explanation:

An XNOR refers to a digital logic gate with two or more inputs and one output that executes

logical equality. The output of an XNOR gate is true either all of its inputs are true, or all of

its inputs are false. When one of its inputs is false, and others are true, then the output is false.

The output of the XNOR gate is given by the following equation.

AB + A'B,' For A = 0 AND B = 0 the output will be 1.

The number of inputs in a half adder is?

1. 8

2. 2

3. 11

4. 32

Answer: b

Explanation: The total number of inputs in a half adder is 2. The half adder circuit has two

inputs: P and Q, which add two input digits and generate a carry and sum. With the help of

half Adder, we can design circuits capable of performing simple addition with the help of

logic gates. An EXOR gate has two inputs and carries links to input EXOR gates. The output

of the half added is also two, SUM and CARRY.

Page 23: The NOR gate output will be high if the two inputs are

What is the radix of the octal number system?

1. 2

2. 10

3. 8

4. 16

Answer: c

Explanation: A radix of a number system refers to the number of base digits, including zero,

that are used to represent large values. In the binary number system, that would be 2 (0,1). In

the octal number system, that would be 8 (0 to 7). In the decimal number system, that would

be 10 (0 to 9). In the hexadecimal number system, that would be 16 (0 to 15).

8051 microcontrollers are manufactured by which of the following companies?

a) Atmel

b) Philips

c) Intel

d) All of the mentioned

Answer: d

Explanation: 8051 microcontrollers are manufactured by Intel, Atmel, Philips/Signetics,

Infineon, Dallas Semi/Maxim.

8051 series has how many 16 bit registers?

a) 2

b) 3

c) 1

d) 0

Answer: a

Explanation: It has two 16 bit registers DPTR and PC.

What is the bit size of the 8051 microcontroller?

a) 8-bit

b) 4-bit

c) 16-bit

Page 24: The NOR gate output will be high if the two inputs are

d) 32-bit

Answer: a

Explanation: It is an 8-bit microcontroller which means most of the operations are limited to

8 bit only

Name the architecture and the instruction set for microcontroller?

a) Van- Neumann Architecture with CISC Instruction Set

b) Harvard Architecture with CISC Instruction Set

c) Van- Neumann Architecture with RISC Instruction Set

d) Harvard Architecture with RISC Instruction Set

Answer: b

Explanation: Harvard architecture has different memory spaces for both program memory

and data memory with Complex Instruction Set Computer(CISC). The difference between

CISC and RISC is RISC has few instructions than CISC. Where as in Van- Neumann,

program and data memory are same. Van- Neumann is also called as Princeton architecture.

Program counter stores what?

a) Address of before instruction

b) Address of the next instruction

c) Data of the before execution to be executed

d) Data of the execution instruction

Answer: b

Explanation: Points to the address of the next instruction to be executed from ROM. It is 16

bit register means the 8051 can access program address from 0000H to FFFFH. Total 64KB

of code.

8085 microprocessor is an 8-bit microprocessor designed by?

A. IBM

B. Dell

C. Intel

D. VAX

Ans : C

Page 25: The NOR gate output will be high if the two inputs are

Explanation: 8085 is pronounced as "eighty-eighty-five" microprocessor. It is an 8-bit

microprocessor designed by Intel in 1977.

What is true about Program counter?

A. It is an 8-bit register, which holds the temporary data of arithmetic and logical operations.

B. When an instruction is fetched from memory then it is stored in the program counter

C. It provides timing and control signal to the microprocessor

D. It is a 16-bit register used to store the memory address location of the next instruction to

be executed.

Ans : D

Explanation: Program counter : It is a 16-bit register used to store the memory address

location of the next instruction to be executed.