The Instruction Set Architecture

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The Instruction Set The Instruction Set ArchitectureArchitecture

September 27September 27thth, 2007, 2007

By: Corbin JohnsonBy: Corbin Johnson

CS 146CS 146

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What is the Instruction Set What is the Instruction Set Architecture?Architecture?

It contains instructions to use and manipulate It contains instructions to use and manipulate programmer-accessible hardware in a computer.programmer-accessible hardware in a computer.

in terms of in terms of

place in a place in a

computercomputer

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What is the relationship between What is the relationship between the Instruction Set Architecture and the Instruction Set Architecture and

Assembly / Machine language?Assembly / Machine language?An assembly / machine program is made An assembly / machine program is made

up of the instructions in the ISA and up of the instructions in the ISA and makes use of registries in the ISA.makes use of registries in the ISA.

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Here’s how it worksHere’s how it works

Higher level languages (Java, C++, etc…) Higher level languages (Java, C++, etc…) are translated into assembly / machine are translated into assembly / machine language by compilers.language by compilers.

When a user calls the program, the When a user calls the program, the compiled program is loaded into RAM.compiled program is loaded into RAM.

The program then executes, line by line, The program then executes, line by line, until the Operating System takes back until the Operating System takes back control of the computer.control of the computer.

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A Sample Computer: ARCA Sample Computer: ARC

The ARC has an ISA that is a subset of The ARC has an ISA that is a subset of the ISA of the SPARC, or Scalable the ISA of the SPARC, or Scalable Processor Architecture processor Processor Architecture processor developed by Sun in the mid 80’s.developed by Sun in the mid 80’s.

Has most important features of SPARC Has most important features of SPARC but has left out most complex portions.but has left out most complex portions.

ARC is considered a RISC or “Reduced ARC is considered a RISC or “Reduced Instruction Set Computer.”Instruction Set Computer.”

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Goal: Program the ARCGoal: Program the ARC

A program can be written for the ARC A program can be written for the ARC using the ISA of the ARC.using the ISA of the ARC.

Discuss three main parts of ARC:Discuss three main parts of ARC:RAMRAMProcessor (CPU)Processor (CPU) Instruction SetInstruction Set

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Discuss three main parts of ARC:Discuss three main parts of ARC: RAMRAM Processor (CPU)Processor (CPU) Instruction SetInstruction Set

32 bit memory32 bit memoryByte AddressableByte AddressableMemory-mapped I/OMemory-mapped I/O

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The OSThe OS221111 bits of memory bits of memoryOnly OS uses this Only OS uses this

areaarea

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The User SpaceThe User SpaceUndefined amountUndefined amountUser’s program fillsUser’s program fills

Into unused space Into unused space Designed to work well Designed to work well

If stack small and If stack small and

Program large or Program large or

Vice versa. Vice versa.

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The System StackThe System StackUndefined amountUndefined amountProgram’s executionProgram’s execution

Uses stack for storage Uses stack for storage Grows towards lowerGrows towards lower

Memory as user’s Memory as user’s

Space grows towardsSpace grows towards

Higher memory. Higher memory.

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Memory-Mapped I/OMemory-Mapped I/OStatic slotsStatic slotsData talks with inputData talks with input

And output devices And output devices

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The CPUThe CPUExecutes programsExecutes programs

In main memoryIn main memory Contains RegistriesContains Registries

Holding dataHolding dataFour-Step cycle toFour-Step cycle to

Execute programExecute program

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The Four Step The Four Step

CycleCycle1)1) Fetch next instructionFetch next instruction

2)2) Decode the instructionDecode the instruction

3)3) Read operand in main Read operand in main memory if anymemory if any

4)4) Execute instruction and store Execute instruction and store results, if any.results, if any.

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The registersThe registers Positions in CPU that Positions in CPU that

hold data during hold data during calculationcalculation

Special Registries: Special Registries: %r0, %sp, %link, %psr, %r0, %sp, %link, %psr, % pc% pc

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The Arithmetic and The Arithmetic and Logic UnitLogic Unit

Takes care of Takes care of calculations that need calculations that need to be executedto be executed

Fed instructions by the Fed instructions by the Control UnitControl Unit

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Some Features of the ISA:Some Features of the ISA: All of the instructions in the Instruction Set are All of the instructions in the Instruction Set are

32 bit32 bit ARC is load-store: all operands must be either ARC is load-store: all operands must be either

loaded to use or stored in memory to be storedloaded to use or stored in memory to be stored ARC is two’s compliment ARC is two’s compliment

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Three different classes of instructions:Three different classes of instructions: Arithmetic and LogicArithmetic and Logic Memory AccessMemory Access Transfer of ControlTransfer of Control

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Arithmetic and LogicArithmetic and LogicIncludes Includes instructions like Add instructions like Add and Subtractand SubtractAlso includes Also includes instructions like AND, instructions like AND, OR and NOT.OR and NOT.

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Memory AccessMemory AccessIncludes Includes instructions load and instructions load and storestoreLoads into registers Loads into registers and stores into and stores into memory slots in RAMmemory slots in RAM

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Transfer of ControlTransfer of ControlInstructions help get Instructions help get to different places in to different places in programprogramPlace in ISA where Place in ISA where conditionals first are conditionals first are seen (if statement, seen (if statement, loops, etc…)loops, etc…)Essentially changes Essentially changes program counter program counter registerregister

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The Syntax of the ARC Assembly The Syntax of the ARC Assembly LanguageLanguage

The The MnemonicMnemonic is a way for the programmer is a way for the programmer to remember the instruction’s name.to remember the instruction’s name.

A A CompilerCompiler will take a written assembly will take a written assembly language code and convert it to machine language code and convert it to machine code.code.

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What’s that cc after addcc?What’s that cc after addcc?

CC stands for Condition Code and they are set in the CC stands for Condition Code and they are set in the PSR (it is a 32 bit registry)PSR (it is a 32 bit registry)

There are 4: There are 4:

Z: if the result of the instruction is zero, this flag is set.Z: if the result of the instruction is zero, this flag is set.

N: if the most significant bit is 1, this bit is setN: if the most significant bit is 1, this bit is set

C: if there is a carry out of the MSB or a borrow into it, C: if there is a carry out of the MSB or a borrow into it, this flag is set.this flag is set.

V: Overflow. The result cannot be represented in 32 V: Overflow. The result cannot be represented in 32 bits.bits.

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THE PSR THE PSR (Processor Status Register)(Processor Status Register)

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More on The Syntax of the ARC More on The Syntax of the ARC Assembly LanguageAssembly Language

Brackets Brackets [ ] around an operand means to load [ ] around an operand means to load (or store) from (or in) the memory which is (or store) from (or in) the memory which is addressed by the operand within the brackets.addressed by the operand within the brackets.

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A few of the 35 instructionsA few of the 35 instructions

The ARC ISA has more than 35 The ARC ISA has more than 35 instructions.instructions.

Memory: ld [%r5 + 2064] , %r1Memory: ld [%r5 + 2064] , %r1Arithmetic: addcc %r1, 129, %r1Arithmetic: addcc %r1, 129, %r1Control: call sub_rControl: call sub_r

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From Assembly Language to From Assembly Language to Machine CodeMachine Code

Each Assembly Each Assembly Language Language instruction is instruction is translated one translated one line for one line line for one line (one to one).(one to one).

rd: destination registryrd: destination registry

Cond: based on the PSR, this Cond: based on the PSR, this executes differentlyexecutes differently

Simm13: a user defined Simm13: a user defined constant in 2’s compliment constant in 2’s compliment in 13 bits.in 13 bits.

Rs1: registry 1 in the CPURs1: registry 1 in the CPU

Disp30/Disp 22: 30/22 bit number is Disp30/Disp 22: 30/22 bit number is shifted to the left to achieve 32 bit shifted to the left to achieve 32 bit destination of it’s function.destination of it’s function.

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SummarySummary

Although not explicitly shown, this method Although not explicitly shown, this method will take an upper level program and will take an upper level program and convert it into actual things the computer convert it into actual things the computer can do.can do.

Involves translation from the higher level Involves translation from the higher level into assembly language into machine code into assembly language into machine code using the ARC ISA.using the ARC ISA.

The Instruction Set Architecture

Documents

main parts of arc

arcthe arc

assembly machine program

compiled program

arca program

program large

executedfed instructions

anyexecute instruction