Top Banner
Tera-Pixel APS for CALICE Progress meeting, 12 th July 2006 Jamie Crooks, Microelectronics/RAL
8

Tera-Pixel APS for CALICE

Feb 03, 2016

Download

Documents

vaughn

Tera-Pixel APS for CALICE. Progress meeting, 12 th July 2006 Jamie Crooks, Microelectronics/RAL. Phone meeting with Foundry (June 19 th ). Foundry Actions: Check the possibility of performing process splits in Shuttle run - PowerPoint PPT Presentation
Welcome message from author
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Page 1: Tera-Pixel APS for CALICE

Tera-Pixel APS for CALICE

Progress meeting, 12th July 2006

Jamie Crooks, Microelectronics/RAL

Page 2: Tera-Pixel APS for CALICE

Phone meeting with Foundry (June 19th)

• Foundry Actions:• Check the possibility of performing process splits in Shuttle run• Check the availability of the corner model for Deep N-well Diode - dnwell33• Check the availability of the GDS files of the following IO pad libraries:

– staggered analog pads– PCI inline pads

• Check if Foundry offers large IO pads (100um x 100um) both for Analog and Digital• Send Rutherford the shuttle schedule for the beginning of 2007

• Rutherford Actions:• Send Foundry a draft of Calice project• Send Foundry Rutherford’s requirements for TCAD tool both for MI3 and Calice

projects.• Fill out and send Foundry the CIS Application General Questionnaire for Calice project

(see attached)

Yes this is possibleNo model avail.

Sent example pixel GDS

pending

Sent summary document (details from Guilio)

Page 3: Tera-Pixel APS for CALICE

DemoPixel

Page 4: Tera-Pixel APS for CALICE

Analog Pixel

• Voltage amplifiers disappointing

• Charge amplifiers may be more appropriate

• Autozero comparator may be too complex– Clock line switching in every pixel

• Simpler comparator design possible if we can reset the pixel after a hit?

Page 5: Tera-Pixel APS for CALICE

Charge Amplifier

VoutCfb

Cd

Smaller Cfb Larger output step Charge-to-voltage gain is independent of Cd (hence can have 4 diodes in parallel) Larger voltage step at output than seen before Purely capacitive feedback requires a reset phase Diode feedback provides resistive ‘biasing’ feedback No corner of MonteCarlo models for diode Parasitic feedback subject to layout and accuracy of 3D parasitic extraction tools!

Page 6: Tera-Pixel APS for CALICE

Vout

Charge Amplifiers

Vout

Vout

Diode feedback

Capacitor feedback

Parasitic Capacitance feedback

Page 7: Tera-Pixel APS for CALICE

Local Reference

Dfb

Active Pixel(s)

Cfb

Cd

Rst

x1Vref

Vth

DAC

101Vref+Vth

Page 8: Tera-Pixel APS for CALICE

Diode

feedback

MIM-cap feedback

Parasitic-cap feedback

Number of pmos 1 1 1

Vdd 2.5 2.5 2.5

Static current 500nA 500nA 500nA

Process Corners Slow Typ Fast Slow Typ Fast Slow Typ Fast

Vout step (450e-) 4diode 49.0 45.1 39.5 15.4 14.4 14.5 59.7 55.7 51.2

Voltage Gain

DC diode voltage

DC output voltage

Final value (DC o/p)

Noise