TENDER DOCUMENT - NITTTR, Kolkata

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TENDER DOCUMENT

(Advt. No. 11/2021-22)

ELECTRICAL ENGINEERING DEPARTMENT

NATIONAL INSTITUTE OF TECHNICAL TEACHERS’ TRAINING AND RESEARCH, KOLKATA

Block-FC, Sector-III, Salt Lake City, Kolkata- 7000 106

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NATIONAL INSTITUTE OF TECHNICAL TEACHERS’

TRAINING AND RESEARCH, KOLKATA (An Autonomous Institution under the Ministry of Education, Govt. of India)

Block – FC, Sector – III, Salt Lake City, Kolkata – 700106

Website: http://www.nitttrkol.ac.in

NOTICE INVITING TENDER

Sealed tenders are invited from manufacturers / bonafide suppliers / authorized dealers

of Equipment for Embedded System Lab of Electrical Engineering Department.

Tender Document (TD) is obtainable from website or CPPP from 28/11/2021 to

20/12/2021. The cost of downloaded TD, Rs. 500/- and EMD @ 4% on Estimated

Price of each equipment are payable through separate DD i/f/o Director, NITTTR,

Kolkata. The last date of submitting TD is 20/12/2021 upto 3 pm. Technical Bid

will be opened at 4 pm on the same date.

Advt. No. 11/2021-22 DIRECTOR

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To,

M/s. __________________________________

__________________________________

Sub: Invitation of quotations for supply of various Equipment in Electrical Engineering Department for Embedded System Lab

Dear Sir,

Sealed tenders (Two bid system) are invited from the bonafide suppliers / manufacturers / authorized dealers for supply of various equipment whose specifications are stated below: -

Embedded System Lab

Estimated Price of the Item: Rs. 25,00,000/- Earnest Money Deposit (EMD): Rs. 1,00,000/-

Embedded System is consisting of following items:

1) PIC Microcontroller Based Kits

2) ARM 9 core (Android Based)

3) ARM 11 based Kits

4) Proteus Design Suit Ver 8.4

5) Interface Cards for PIC

6) PIC Microcontroller Based sensors

7) KEIL RTX 166 Software

8) Xilinx Vivado Design Suite and Embedded Processing

9) MCB 2300 boards which has NXP LPC2378 ARM System-onchip

10) Spartan3E FPGA Board

11) Spartan6 FPGA Board

12) Flowcode 6 and C Compiler

13) Digital Storage Oscilloscope

14) Dual Trace Analog Oscilloscope

Technical Specifications:

1) PIC Microcontroller Based Kits

a) PIC 18F452 Microcontroller: Quantity: 5

Parameter Name Value

Program Memory Type Flash

Program Memory Size (KB) 32

CPU Speed (MIPS/DMIPS) 10

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SRAM (B) 1,536

Data EEPROM/HEF (bytes) 256

Digital Communication Peripherals 1-UART, 1-SPI, 1-I2C1-MSSP (SPI/I2C)

Capture/Compare/PWM Peripherals 2 CCP,

Timers 1 x 8-bit, 3 x 16-bit

ADC Input 8 ch, 10-bit

Operating Voltage Range (V) 2 to 5.5

The PIC18F452 features a 'C' compiler friendly development environment, 256 bytes of EEPROM,

Self-programming, an ICD, 2 capture/compare/PWM functions, 8 channels of 10-bit Analog-to-

Digital (A/D) converter, the synchronous serial port can be configured as either 3-wire Serial

Peripheral Interface (SPI™) or the 2-wire Inter-Integrated Circuit (I²C™) bus and Addressable

Universal Asynchronous Receiver Transmitter (AUSART). All of these features make it ideal for

manufacturing equipment, instrumentation and monitoring, data acquisition, power conditioning,

environmental monitoring, telecom and consumer audio/video applications.

Document: Operation Manual

b) PIC Microcontroller 16F1503 Quantity: 5

Parameter Name Value

Program memory 3.5kB

SRAM memory capacity 128B

Interface MSSP (SPI / I2C)

Supply voltage 2.3...5.5V DC

Number of inputs/outputs 12

Number of 8 bit timers 2

Number of 16 bit timers 1

Kind of architecture Harvard 8bit

Built-in generator 16 MHz, 32kHz

Family PIC16

Document: Operation Manual

2) ARM 9 core (Android Based) Quantity: 5

The ARM926EJ-S processor is a member of the ARM9 family of general-purpose Microprocessors.

The processor supports the 32-bit ARM and 16-bit Thumb instruction sets. The processor includes

features for efficient execution of Java byte codes. The processor supports the ARM debug

architecture and includes logic to assist in both hardware and software debug.

The ARM926EJ-S processor provides support for external coprocessors enabling floating-point or

other application-specific hardware acceleration to be added. The tightly-coupled instruction and

data memories are instantiated externally to the ARM926EJ-S macrocell, providing the flexibility of

optimizing the memory subsystem for performance, power, and particular RAM type.

ARM 9 based system can be used for training and development of android based systems. The board

includes pre-installed Windows Embedded CE or Linux OS. The mother board integrates a rich set

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of peripherals and interfaces including Ethernet, USB Host & Device, Camera, Serial ports, Audio,

LCD, Keyboard, SD/MMC, Buttons, LEDs and etc.

Document: Operation Manual

3) ARM 11 based Kits Quantity: 2

An advanced ARM11 CPU can be used for running operating system and application code, and for

dedicated video processing. The ARM1136J-S processor incorporates an integer unit that

implements the ARM architecture v6. The processor is high-performance, low-power, ARM cached

processor macrocells that provide full virtual memory capabilities. This processor should have the

following features:

• An integer unit with integral Embedded ICE-RT logic

• An eight-stage pipeline

• External coprocessor interface

• Instruction and Data Memory Management Units, managed using MicroTLB structutes

backed by uniform TLB

• Instruction and Data Caches

• The caches are virtually indexed and physically addressed

• 64-bit interface to both caches

• A by passable write buffer

• Level one Tightly-Coupled Memory that can be used as a local RAM with DMA

• High-speed Advanced Microprocessor Bus Architecture level two interfaces supporting

prioritized multiprocessor implementations

• Vector Floating Point coprocessor support

• JTAG –based debug

Document: Operation Manual

4) Proteus Design Suit Ver 8.4 Quantity: 10 Users

The Proteus Design Suite is a proprietary software tool suite used primarily for electronic design

automation. The software is used mainly by electronic design engineers and technicians to create

schematics and electronic prints for manufacturing printed circuit boards. The general features

include:

• Runs on Windows 98/Me/2k/XP and later.

• Automatic wire routing and dot placement/removal.

• Powerful tools for selecting objects and assigning their properties.

• Total support for buses including component pins, inter-sheet terminals, module ports and

wires.

• Bill of Materials and Electrical Rules Check reports.

• Netlist outputs to suit all popular PCB layout tools.

• Major features of PROTEUS VSM include:

• True Mixed Mode simulation based on Berkeley SPICE3F5 with extensions for digital

simulation and true mixed mode operation.

• Support for both interactive and graph based simulation.

• CPU Models available for popular microcontrollers such as the PIC and 8051 series.

• Interactive peripheral models include LED and LCD displays, a universal matrix keypad, an

RS232 terminal and a whole library of switches, pots, lamps, LEDs etc.

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• Virtual Instruments include voltmeters, ammeters, a dual beam oscilloscope and a 24 channel

logic analyser.

• On-screen graphing - the graphs are placed directly on the schematic.

• Graph Based Analysis types include transient, frequency, noise, distortion, AC and DC

sweeps and fourier transform. An Audio graph allows playback of simulated waveforms. ·

Direct support for analogue component models in SPICE format.

• Open architecture for ‘plug in’ component models coded in C++ or other languages. These

can be electrical, graphical or a combination of the two.

• Digital simulator includes a BASIC-like programming language for modelling and test vector

generation.

• A design created for simulation can also be used to generate a netlist for creating a PCB

Document: Operation Manual

5) Interface Cards for PIC Quantity: 2

Interfacing cards for PIC microcontroller are small circuit boards in the range from simple LED

boards to more complex boards like device programmers, Bluetooth and TCP/IP, Zigbee. These

cards support a number of programmable devices from the PIC, dsPIC, PIC24, ARM, AVR and

FPGA families.

Document: Operation Manual

6) PIC Microcontroller Based sensors Quantity: 2

Sensor for sensing dissolved oxygen in liquid, oxygen in Air, salinity of liquid, Turbidity, pH of

solution with amplifier. Electrode sensors for sensing Calcium Ion, sensing Nitrate Ion, Chloride

Ion. Calorimeter sensor. Sensor for sensing conductivity of solution. Heart Rate monitoring (hand

grip) sensor. EKG sensor with Electrodes. Thermocouple. CO2 Gas Sensor. Magnetic Field Sensor.

Blood Pressure Sensor.

Document: Operation Manual

7) KEIL RTX 166 Software Quantity: 10 Users

The RTX166 Real-Time Kernel is a full-blown real-time kernel with support for multiple events,

numerous tasks, various methods of inter-task communication, and flexible configuration options.

RTX166 Full is available as a stand-alone product (part number FR166). The detail specifications

are listed below:

Round-Robin Multitasking

Preemptive Multitasking

Cooperative Multitasking

Timeout Events

Interval Events

Signal Events

Message Events

Semaphore Events

Memory Pools

Stack Extension

If a C166 interrupt procedure exceeds the stack overflow limit, a new stack may be swapped in.

CAN Libraries

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For the Infineon C16x and STMicroelectronics ST10.

MAX Defined Tasks 256

MAX Active Tasks 256

Required CODE Space 6K-35K bytes

Required RAM Space 2K-3K bytes

Timer Used 0-8

System Clock Divisor 1,000-40,000 cycles

Interrupt Latency 0

Interrupts are never disabled.

Context Switch Time Depends on Stack Load. < 400 states

Task Priority Levels 128

MAX Signals 256

MAX Counting Semaphores 256

MAX Mailboxes 256

Mailbox Size 8 entries

MAX Memory Pools

Document: Operation Manual

8) Xilinx Vivado Design Suite and Embedded Processing Quantity: 10 Users

The Vivado Design Suite 16.1 supply design teams with the tools and methodology needed to

leverage C-based design and optimized reuse, IP sub-system reuse, integration automation and

accelerated design closure. When coupled with the UltraFast™ High-Level Productivity Design

Methodology Guide, this unique combination is proven to accelerate productivity by enabling

designers to work at a high level of abstraction while facilitating design reuse.

Accelerating High Level Design

• Software-defined IP Generation with Vivado High-Level Synthesis

• Block-based IP Integration with Vivado IP Integrator

• On demand reconfiguration with Dynamic Function eXchange (DFX)

• Model-based Design Integration with Model Composer and System Generator for DSP

Accelerating Verification

• Vivado Logic Simulation

• Integrated Mixed Language Simulator

• Integrated & Standalone Programming and Debug Environments

• Accelerate Verification by >100X with C, C++ or SystemC with Vivado HLS

• Verification IP

Accelerating Implementation

• 4X Faster Implementation

• 20% Better Design Density

Document: Operation Manual

9) MCB 2300 boards which has NXP LPC2378 ARM System-onchip Quantity: 2

The Keil MCB2300 Evaluation Board introduces the NXP LPC2300 ARM family and allow us to

create and test working programs for this advanced architecture. Two serial interfaces, a speaker,

analog input (via potentiometer), two CAN interfaces, LCD, USB, Ethernet, and eight LEDs make

this board a great starting point for any ARM based project.

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Components Included

The MCB2300 Evaluation Board includes the following:

MCB2300 Evaluation Board,

Real View MDK-ARM Evaluation Tools.

MCB2300 Quick Start Guide.

Evaluation Software

The MCB2300 Evaluation Board and Starter Kit include the MDK-Lite development tools. These

tools help you get started writing programs and testing the microcontroller and its capabilities.

Sample applications which run on the MCB2300 are included.

Technical Specifications

MCU LPC2378

XTAL 12 MHz

ARM Processor ARM7TDMI

MCU Clock 72 MHz

On-Chip RAM 58K

On-Chip FLASH 512K

Push Buttons 2

I/O Port LEDs 8

Analog Input

(Potentiometer)

Analog Output

(Speaker)

Serial Ports 2

CAN Ports 2

USB Device Interface

USB Host/OTG

Ethernet Interface 10/100

SD Card Interface

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LCD Character

JTAG Interface

ETM Interface Optional

20-pin JTAG Connector

Connector USB

Supply 5 VDC

Current

(Typical) ≈ 65 mA

Current

(Maximum) ≈ 120 mA

Document: Operation Manual

10) Spartan3E FPGA Board Quantity: 5

The Spartan®-3E family of Field-Programmable Gate Arrays (FPGAs) is specifically designed to

meet the needs of high volume, cost-sensitive consumer electronic applications. The Spartan-3E

family is a superior alternative to mask programmed ASICs. FPGAs avoid the high initial cost, the

lengthy development cycles, and the inherent inflexibility of conventional ASICs. Also, FPGA

programmability permits design upgrades in the field with no hardware replacement necessary, an

impossibility with ASICs.

Features

• Very low cost, high-performance logic solution for high-volume,

consumer-oriented applications

• Up to 376 I/O pins or 156 differential signal pairs

• LVCMOS, LVTTL, HSTL, and SSTL single-ended signal standards

• 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signalling

• 622+ Mb/s data transfer rate per I/O

• True LVDS, RSDS, mini-LVDS, differential HSTL/SSTL differential I/O

• Enhanced Double Data Rate (DDR) support

• DDR SDRAM support up to 333 Mb/s

• Densities up to 33,192 logic cells, including optional shift register or distributed

RAM support

• Efficient wide multiplexers, wide logic

• Fast look-ahead carry logic

• Enhanced 18 x 18 multipliers with optional pipeline

• IEEE 1149.1/1532 JTAG programming/debug port

• Hierarchical Select RAM™ memory architecture

• Up to 648 Kbits of fast block RAM

• Up to 231 Kbits of efficient distributed RAM

• Up to eight Digital Clock Managers (DCMs)

• Clock skew elimination (delay locked loop)

• Frequency synthesis, multiplication, division

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• High-resolution phase shifting

• Wide frequency range (5 MHz to over 300 MHz)

• Configuration interface to industry-standard PROMs

• Low-cost, space-saving SPI serial Flash PROM

• x8 or x8/x16 parallel NOR Flash PROM

• Low-cost Xilinx® Platform Flash with JTAG

• Complete Xilinx ISE® and Web PACK™ software

• MicroBlaze™ and PicoBlaze embedded processor cores

• Fully compliant 32-/64-bit 33 MHz PCI support (66 MHz in some devices)

Document: Operation Manual

11) Spartan 6 FPGA Board Quantity: 5

Spartan®-6 devices offer industry-leading connectivity features such as high logic-to-pin ratios,

small form-factor packaging, MicroBlaze™ soft processor, and a diverse number of supported I/O

protocols. Ideally suited for a range of advanced bridging applications found in consumer,

automotive infotainment, and industrial automation.

Value Features

Programmable System Integration

High pin-count to logic ratio for I/O connectivity Over 40 I/O standards for simplified system design PCI Express® with integrated endpoint block

Increased System Performance

Up to 8 low power 3.2Gb/s serial transceivers 800Mb/s DDR3 with integrated memory controller

BOM Cost Reduction

Cost-optimized for system I/O expansion MicroBlaze™ processor soft IP to eliminate external

processor or MCU components

Total Power Reduction

1.2V core voltage or 1.0V core voltage option Zero power with hibernate power-down mode

Accelerated Design Productivity

Enabled by ISE® Design Suite—a no-cost, front-to-back FPGA design solution for Linux and Windows

Fast design closure using integrated wizards

Document: Operation Manual

12) Flowcode 6 and C Compiler Quantity: 10 Users

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Flowcode and C compiler are the latest development environment for programming embedded

devices such as PIC, AVR (including Arduino) and ARM using flowcharts instead of a textual

programming language. Flowcode is a high-level programming language dedicated to simplifying

complex functionality such as Bluetooth, Mobile Phones Communications, USB etc.

Flowcode software is a graphical programming tool that can be used to develop complex electronic

and electromechanical systems of control and measurement based on microcontrollers. A 2D and

3D graphical development interface allows students to construct a complete electronic system on-

screen, develop a program based on standard flowcharts, simulate the system and then produce hex

code for PICmicro® microcontrollers, dsPIC and PIC24 microcontrollers, AVR and Arduino

microcontrollers, and ARM microcontrollers.

Flowcode version 6 software should have the following features:

Icon tool bar, Project explorer, C code program, Control tool bar, Component tool bar, Flowchart

program, Properties editor, Component debug, Icon list window, Analogue window, System panel,

Dashboard panel, Scope window, Chip, Create new components, Component library expansion,

System components, Dashboard HMI, components, Close to real time simulation, API (Application

Programming Interface), Dashboard HMIs, Consoles, Electromechanical system creation, System

panel, Laser cutters and 3D printers, 3D design environment, Third party instrument support, Tight E-

blocks integration, Dashboard HMI, Softscope and Consoles.

Document: Operation Manual

13) Digital Storage Oscilloscope Quantity: 2

The 100 Mhz Digital storage oscilloscope stores and analyses the signal digitally. It is now the most

common type of oscilloscope in use because of the advanced trigger, storage, display and

measurement features which it typically provides

Document: Operation Manual

14) Dual Trace Analog Oscilloscope Quantity: 5

30 Mhz Dual Trace Analog Oscilloscope have the following features Max. Input Voltage: 400V pk,

Input Impedance: 1MW ±3%,30 pF ±5pF, Bandwidth: (-3dB)

Document: Operation Manual

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Terms & Conditions:

1. The tenderer(s) shall be either manufacturer of base machine / equipment / tool or an authorized

business partner / marketing agent / service agent / reseller etc. of the original manufacturer. In case of

authorized business partner / marketing agent / service agent /reseller etc. authorization certificate shall

be attached along with the tender. It is expected that the tenderer(s) should quote product of renowned

company with global presence and acceptance.

2 Bids shall be submitted in two parts as under:

(i) Technical bid consisting of all technical details along with commercial terms and conditions.

(ii) Financial bid indicating item-wise price for the items mentioned in the technical bid.

The technical bid and the financial bid should be sealed by the bidder in separate covers duly

super-scribed and both these sealed covers are to be put in a bigger cover which should also be

sealed and duly super-scribed.

(iii) “……. The technical bids are to be opened in the first instance, at prescribed time & date and

the same will be scrutinized and evaluated by competent committee/authority with reference to

parameters prescribed in the tender documents and the offers received from the tenderers.

Thereafter, in the second stage, the financial bids of only the technically acceptable offers (as

decided in the first stage above) are to be opened for further scrutiny, evaluation, ranking and

placement of contract”

3. Tender documents must be submitted with “EMD in and cost of TD, Rs. 500/- in two separate DD” in a sealed

envelope. The envelope must be super-scribed with “Quotation for Embedded System Lab under

Tender Advt. No. 11/2021-22 of Electrical Engineering Department”.

4. The quoted items shall be as per the specifications. The rate quoted must be for NITTTR, KOLKATA

inclusive of packing, forwarding, supply, installation, testing, commissioning and handed over in good

working condition to the NITTTR, Authority. GST, surcharge and insurance, if any must be indicated

separately. Educational discount, shall be indicated clearly. For imported items, Custom duty shall be

indicated separately. The institute will provide the necessary documents for Excise and Custom duty

exemption on selected items while placing the purchase order.

4.1 As a research Institute NITTTR, Kolkata is subject to GST at a rate not more than 5 % as

National Institute of Technical Teachers’ Training & Research, Kolkata (West Bengal) is

registered with the Department of Scientific and Industrial Research (DSIR) for purposes of

availing Customs Duty exemptions in terms of Notfn. No. 51196- Customs dated 23.7.1996

Notfn.No. 2812003- Customs dt 01.3.2003, Notfn No. 4312017- Customs dt. 30.6.2017 & Notfn.

No.4712017-Integrated Tax (Rate) dt 14.11.2017, Notfn. No 10/2018- Integrated Tax (Rate) dt

25.1.2018 and Notfn. No. 4512017 – Central Tax (Rate) dt.14.11.2017, Notfn. No 4512017 Union

Territory Tax (Rate) dt. 14.11.2017, Notfn. No. 9/2018 - Central Tax (Rate) dt 25.1.2018, Notfn.

No 912018-Union Territory Tax (Rate) dt.25.1.2018, as amended from time to time for research

purpose only.

4.2 All legal disputes shall be under the jurisdiction of the Kolkata Courts in the state of West Bengal.

4.3 Director NITTTR Kolkata reserves the right to accept or reject any or all the tenders without

assigning any reason whatsoever and decision of the Director, NITTTR Kolkata in the matter shall be

final and binding.

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5. Earnest Money Deposit (EMD):

5.1 EMD [i.e. Rs. 1,00,000/-] in the form of Crossed Account payee demand draft, fixed deposit

receipt from commercial bank or Bank guarantee from a commercial bank drawn in favour of Director,

NITTTR Kolkata on any scheduled bank payable at Kolkata shall be submitted along with the

Tender in a separate envelope marked as EMD. Tender without earnest money deposit shall be

OUTRIGHTLY REJECTED. A model format of bank guarantee for furnishing EMD is enclosed in

Annexure- A.

5.2 Forfeiture of EMD: EMD of a tenderer will be forfeited if the tenderer withdraws or amends its tender or

impairs or derogates from the tender in any respect within the period of validity of its tender. Further, if

the successful tenderer fails to furnish the required performance security within the specified period, its

EMD will be forfeited.

5.3 Refund of EMD: EMD furnished by all unsuccessful tenderers should be returned to them without any

interest whatsoever, at the earliest after expiry of the final tender validity period but not later than 30

days after conclusion of the contract. EMD of the successful tenderer should be returned, without any

interest whatsoever, after receipt of performance security from it as called for in the contract.

5.4 Exemption from payment of Earnest Money should be claimed with scanned copies of required

documents to substantiate the claim towards their credentials along with the tender.

6. Each bidder shall submit only one tender.

7. Validity of Tender:

Tender shall remain valid for a period not less than 6 months after the deadline date specified for submission.

8. Delivery Period:

Delivery period shall be maximum 60 days from the day of receipt of award of contract.

9. Evaluation of Tender:

NITTTR, KOLKATA will evaluate and compare the tenders determined to be substantially responsive for

each item separately i.e., which are

9.1 properly signed; and

9.2 conform to the technical specifications and terms and conditions

10. Submission of Documents

The tender should inter alia include the following:

10.1 Copy of current GST Return.

10.2 Copy of Income Tax acknowledgement for the last financial year and PAN No.

10.3 Copy of Valid Trade License.

10.4 Copy of valid excise duty clearance certificate, if applicable.

10.5 Copy of current custom duty clearance certificate if applicable.

10.6 Copy of valid registration certificate, from State/Central Govt.

10.7 Copy of valid registration certificate of SSI Unit if any.

10.8 The Tenderer(s) should be required to furnish a list of clients serviced during the last 3 years.

10.9 The tenderer(s) shall submit a list of projects/supply handled in the last 3 years.

10.10 The tenderer(s) shall furnish the Audited statement of Accounts for last 3 years.

11. Bid Price:

While furnishing the quoted price, the tenderer(s) may note the following:

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11.1 The tenderer(s) is/are required to quote the item under single Laboratory . Corrections, if any in

quoted price, shall be made by crossing out, initialing, dating and rewriting.

11.2 All duties, taxes and other levies payable by the contractor under the contract shall be included in the

total price and Taxes should be quoted separately.

11.3 The rates quoted by the bidder shall be fixed for the duration of the contract and shall not be subject

to adjustment on any account, except revision of taxes and duties.

11.4 The prices should be quoted in Indian Rupees only.

11.5 The rate quoted must be both in words and figures.

12. Award of Contract:

The NITTTR, KOLKATA will award the contract to the bidder whose tender has been determined to be

substantially responsive in terms of technical specifications, terms & conditions and price quoted.

12.1 Notwithstanding the above, NITTTR, KOLKATA reserves the right to accept or reject any tenderer(s)

and to cancel the bidding process and reject all tenderer(s) at any time prior to the award of contract.

12.2 The bidder whose bid is accepted will be notified of the award of contract by the NITTTR,

KOLKATA prior to expiration of the tenderer(s) validity period.

13. Performance Security:

13.1 Performance security at the rate of 8% of the contract value in the form of account payee demand

draft, fixed deposit receipt from commercial bank or Bank guarantee from a commercial bank in

favour of Director, NITTTR, Kolkata shall be submitted within 21 days after the notification of

the award of contract. Performance security should remain valid for a period of sixty days beyond the

date of completion of all contractual obligations of the supplier, including warranty obligations. A

model format of Bank guarantee for providing performance security is enclosed at Annexure – B

13.2 Forfeiture of Performance Security: Performance security is to be forfeited and credited to the Institute

Account in the event of a breach of contract by the supplier, in terms of the relevant contract.

13.3 Refund of Performance security: Performance security should be refunded to the supplier without any

interest, whatsoever, after it duly performs and completes the contract in all respects but not later than

60 days of completion of all such obligations under the contract.

13.4 Liquidated Damages will become payable in case of delay in delivery.

13.5 In case of delay in supply on part of supplier, a penalty @ 0.5% per week of order value will be charged

for delayed period subject to a maximum of 10% of the order value.

13.6 The same rate of penalty shall be applicable for late installation of the equipment also.

14. Payment:

Payment will be made after delivery & satisfactory commissioning of the goods / services and training of

personnel.

15. Normal Commercial Warranty/ Guarantee:

Normal commercial warranty/ guarantee of three years shall be applicable to the supplied goods/ services and

this should be specified clearly by the bidder.

Warranty will start from the date of Installation cum commissioning of the system. The Vender should ensure

that start date of warranty from the manufacturer accordingly.

16. Live Demonstration:

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Live demonstration of the item(s) shall be arranged by the vendors at their cost, if asked by the Institute.

17. Catalogue and credentials:

Original catalogues with credentials for claiming originality must be submitted with Tender Document for all

equipment.

18. Manual on Policies and Procedures for Purchase of Goods:

Points which are not explicitly covered under “terms and conditions” above shall be covered by Manual

on Policies and Procedures for Purchase of Goods circulated by Ministry of MHRD, Govt. of India and

General Financial Rules 2017 by Govt. of India. A copy of the same is available in the office of the

Department of Electrical Engineering for perusal of the tenderers. Tenderers are advised to go through

the manual before submission of their tenders. A soft copy of the manual can be downloaded from

http://finmin.nic.in/.

19. Cancellation of Contract:

In case of any deviations of the terms and conditions of this contract after award of contract, the Director,

NITTTR, Kolkata shall have the right to cancel the contract at his / her discretion.

Payment will be made after delivery & satisfactory commissioning of the goods / services and training of

personnel.

You are requested to provide your offer as per schedule provided in Notice Inviting Tender in a sealed

envelope as stated under 2 & 3.

To,

Director,

National Institute of Technical Teachers’ Training and Research, Kolkata

Block – FC, Sector – III, Salt Lake City, Kolkata – 700 106

Tel. No. +91(033) 2337-0919/0400

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ANNEXURE - A

MODEL BANK GUARANTEE FORMAT FOR FURNISHING EMD

Whereas ………………………………………………………………………………………………………….

(hereinafter called the "tenderer")……………………….. has submitted their offer dated ….………………………….

for the supply of…………………………………………………………………………………………………………...

…………………………………(hereinafter called the "tender")……………………….………. against the purchaser's

tender enquiry No. ……………………………………………….……... KNOW ALL MEN by these presents that WE

……………………………………..…………. of …………..……………………………………………...having our

registered office at …………………………………………………………………are bound unto…………………….

(hereinafter called the "Purchaser) ………………………………………………………… in the sum of ……………..

…………………………………………………………..………........… for which payment will and truly to be made

to the said Purchaser, the Bank binds itself, its successors and assigns by these presents. Sealed with the

Common Seal of the said Bank this ………………………..day of ……………….20…….

THE CONDITIONS OF THIS OBLIGATION ARE:

(1) If the tenderer withdraws or amends, impairs or derogates from the tender in any respect within the period of

validity of this tender.

(2) If the tenderer having been notified of the acceptance of his tender by the Purchaser during the period of its

validity:-

a) If the tenderer fails to furnish the Performance Security for the due performance of the contract.

b) Fails or refuses to accept/execute the contract.

WE undertake to pay the Purchaser up to the above amount upon receipt of its first written demand, without the

Purchaser having to substantiate its demand, provided that in its demand the Purchaser will note that the amount

claimed by it is due to it owing to the occurrence of one or both the two conditions, specifying the occurred condition

or conditions.

This guarantee will remain in force upto and including 45 days after the period of tender validity and any demand in

respect thereof should reach the Bank not later than the above date.

(Signature of the authorized officer of the Bank)

Name and designation of the officer

Seal, name & address of the Bank and address of the Branch

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ANNEXURE - B

MODEL BANK GUARANTEE FORMAT FOR PERFORMANCE SECURITY

To

The Director,

NITTTR, Kolkata

WHEREAS ……………………………………………………………………………….………………….…..

(name and address of the supplier) (hereinafter called "the supplier") has undertaken, in pursuance of contract no

……………………………… dated …………………. to supply (description of goods and services) (herein after

called "the contract").

AND WHEREAS it has been stipulated by you in the said contract that the supplier shall furnish you with a

bank guarantee by a scheduled commercial recognized by you for the sum specified therein as security for compliance

with its obligations in accordance with the contract;

AND WHEREAS we have agreed to give the supplier such a bank guarantee;

NOW THEREFORE we hereby, affirm that we are guarantors and responsible to you, on behalf of the

supplier, up to a total of …………………………………………………………………………………. (amount of

the guarantee in words and figures), and we undertake to pay you, upon your first written demand declaring the

supplier to be in default under the contract and without cavil or argument, any sum or sums within the limits of

(amount of guarantee) as aforesaid, without your needing to prove or to show grounds or reasons for your demand or

the sum specified therein.

We hereby waive the necessity of your demanding the said debt from the supplier before presenting us with

the demand.

We further agree that no change or addition to or other modification of the terms of the contract to be

performed there under or of any of the contract documents which may be made between you and the supplier shall in

any way release us from any liability under this guarantee and we hereby waive notice of any such change, addition or

modification.

This guarantee shall be valid until the ……………….. day of ………………, 20

(Signature of the authorized officer of the Bank)

Name and designation of the officer

Seal, name & address of the Bank and address of the Branch