VLSI DESIGN 2000, Vol. 11, No. 3, pp. 259-283 Reprints available directly from the publisher Photocopying permitted by license only 2000 OPA (Overseas Publishers Association) N.V. Published by license under the Gordon and Breach Science Publishers imprint. Printed in Malaysia. Tabu Search: A Meta Heuristic for Netlist Partitioning SHAWKI AREIBI* and ANTHONY VANNELLI Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada N2L 3G1 (Received 1 March 1999," In final form 1 December 1999) The main goal of the paper is to explore the effectiveness of a new method called Tabu Search [1] on partitioning and compare it with two techniques widely used in CAD tools for circuit partitioning i.e., Sanchis Interchange method and Simulated Annealing, in terms of the running time and quality of solution. The proposed method integrates the well known iterative multi-way interchange method with Tabu Search and leads to a very powerful network partitioning heuristic. It is characterized by an ability to escape local optima which usually cause simple descent algorithms to terminate by using a short term memory of recent solutions. Moreover, Tabu Search permits backtracking to previous solutions, which explore different directions and generates better partitions. The quality of the test results on MCNC benchmark circuits are very promising in most cases. Tabu Search yields netlist partitions that contain 20%-67% fewer cut nets and are generated 2/3 to (1/2) times faster than the best netlist partitions obtained by using an interchange method. Comparable partitions to those obtained by Simulated Annealing are obtained 5 to 20 times faster. Keywords: Netlist partitioning; Tabu Search; Adaptive search; VLSI circuit layout 1. CIRCUIT PARTITIONING Circuit partitioning is the task of dividing a circuit into smaller parts. It is an important aspect of layout for several reasons. Partitioning can be used directly to divide a circuit into portions that are implemented on separate physical components, such as printed circuit boards or chips. Here, the objective is to partition the circuit into parts such that the sizes of the components are within pres- cribed ranges and the complexity of connections between the components is minimized. As can be seen in Figure 1, after swapping modules between the two blocks, we end up minimizing the number of signal nets that interconnect the components between the blocks. A natural way of formalizing the notion of wiring complexity is to attribute to each net in the circuit some connection cost, and Address for correspondence: School of Engineering, University of Guelph, Canada. e-mail: [email protected]The research is partially supported by a Natural Science and Engineering Research Council of Canada (NSERC) operating grant (OGP 0044456) and an Information Technology Research Center (ITRC) of Ontario Operating grant, e-mail: vannelli@cheetah. vlsi.uwaterloo.ca 259
26
Embed
Tabu Search: Meta Heuristic for Netlist Partitioningdownloads.hindawi.com/archive/2000/062159.pdf · introduces the Tabu Search as a combinatorial optimization technique and explains
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
VLSI DESIGN2000, Vol. 11, No. 3, pp. 259-283Reprints available directly from the publisherPhotocopying permitted by license only
2000 OPA (Overseas Publishers Association) N.V.Published by license under
the Gordon and Breach Science
Publishers imprint.Printed in Malaysia.
Tabu Search: A Meta Heuristic for Netlist PartitioningSHAWKI AREIBI* and ANTHONY VANNELLI
Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada N2L 3G1
(Received 1 March 1999," In finalform 1 December 1999)
The main goal of the paper is to explore the effectiveness of a new method called TabuSearch [1] on partitioning and compare it with two techniques widely used in CAD toolsfor circuit partitioning i.e., Sanchis Interchange method and Simulated Annealing, interms of the running time and quality of solution. The proposed method integrates thewell known iterative multi-way interchange method with Tabu Search and leads to avery powerful network partitioning heuristic. It is characterized by an ability to escapelocal optima which usually cause simple descent algorithms to terminate by using ashort term memory of recent solutions. Moreover, Tabu Search permits backtracking toprevious solutions, which explore different directions and generates better partitions.The quality of the test results on MCNC benchmark circuits are very promising in
most cases. Tabu Search yields netlist partitions that contain 20%-67% fewer cut netsand are generated 2/3 to (1/2) times faster than the best netlist partitions obtained byusing an interchange method. Comparable partitions to those obtained by SimulatedAnnealing are obtained 5 to 20 times faster.
Circuit partitioning is the task of dividing a circuitinto smaller parts. It is an important aspect oflayout for several reasons. Partitioning can be useddirectly to divide a circuit into portions that are
implemented on separate physical components,such as printed circuit boards or chips. Here, theobjective is to partition the circuit into parts such
that the sizes of the components are within pres-cribed ranges and the complexity of connectionsbetween the components is minimized. As can beseen in Figure 1, after swapping modules betweenthe two blocks, we end up minimizing the numberof signal nets that interconnect the componentsbetween the blocks. A natural way of formalizingthe notion of wiring complexity is to attributeto each net in the circuit some connection cost, and
Address for correspondence: School of Engineering, University of Guelph, Canada. e-mail: [email protected] research is partially supported by a Natural Science and Engineering Research Council of Canada (NSERC) operating grant
(OGP 0044456) and an Information Technology Research Center (ITRC) of Ontario Operating grant, e-mail: [email protected]
259
260 S. AREIBI AND A. VANNELLI
Itia[ Solution Nets Cut Net CutAterswapping
module land3
NET NET
FIGURE Illustration of circuit partitioning.
to sum the connection costs of all nets connectingdifferent components. A more important use ofcircuit partitioning, is to divide up a circuit hierar-chically into parts with divide-and-conquer algo-rithms for placement, floorplanning, and otherlayout problems. Here, cost measures to be mini-mized during partitioning may vary, but mainlythey are similar to the connection cost measuresfor general partitioning problems [2].
1.1. An Integer Programming Formulationof Netlist Partitioning
A standard mathematical model in VLSI layoutassociates a graph G (V, E) with the circuit net-list, where vertices in V represent modules, andedges in E represent signal nets. The netlist ismore generally represented by a hypergraph H=(V, EI), where hyperedges in Et are the subsetsof V contained by each net (since nets often areconnected to more than two modules). In this for-mulation, we attempt to partition a circuit with nmmodules and nn nets into nb blocks containingapproximately (nm/nb) modules each; (i.e., we at-tempt to equi-partition the V modules among the
nb blocks), such that the number of uncut netsin the nb blocks is maximized.We define:
if module is placed in block kxik-- 0 otherwise
if netj is placed in block kY- 0 otherwise
The linear integer programming (LIP) modelof the netlist partitioning problem is given bymaximizing the number of uncut nets in eachblock;
nn nb
maxEZYjk (1)j=l k=l
s.t. (i) Module placement constraints"
nb
Z xi: 1, Vi 1,2,... ,nmk=l
(ii) Block size constraints:
nmxi: <_ nm
i=1 nbVk 1,2,..., nb
(iii) Netlist constraints"
Yjk Xik,
<_j<_nnwhere < k < nb
E Net j
(iv) 0- constraints:
XikE{O, 1},yj {0, 1},
<_i<_nm; <_k<_nb<_j<_n,,; <k<_n,
The netlist constraints determine if a net (wire)jis placed entirely in block k or if it is not. Inproblem (LIP) we maximize the number of uncutnets in the nb blocks. This is equivalent to thenetlist partitioning problem where we minimize thenumber of wires connecting the nb blocks.
This paper is divided into five sections. Section 2gives an overview of the different techniques thathave been used by different researchers to solvethe circuit partitioning problem. In addition classi-fication of different heuristic and approximationalgorithms used to solve the circuit partitioning ispresented with a brief overview of the advantagesand disadvantages of each technique. Section 3,introduces the Tabu Search as a combinatorialoptimization technique and explains its usage as
Results for an MIP formulation are presented in Section 5.
TABU SEARCH 261
a meta-heuristic to guide a basic interchangemethod. Detailed implementation of Tabu Searchis introduced in Section 4. Test results on severalwell-known MCNC benchmark circuits are ex-
plained in Section 5. Results comparing previousattempts (i.e., module interchange improvementmethods, Simulated Annealing) with the TabuSearch implementation are presented. Finally, con-clusions and future work are described in Section 6.
2. OVERVIEW
It has been shown that graph and networkpartitioning problems are NP-Complete [3]. There-fore, attempts to solve these problems haveconcentrated on finding heuristics which yieldapproximate solutions in polynomial time. Heur-istic methods can produce good solutions (possiblyeven an optimal solution) quickly. Often inpractical applications, several good solutions areof more value than one optimal one. The first andforemost consideration in developing heuristics forcombinatorial problems of this type is finding a
procedure that is powerful and yet sufficiently fastto be practical (many real life problems containmore than 100K modules and nets). For thecircuit partitioning problem several classes ofalgorithms were used to generate good partitions.The techniques can be classified into three classes-Iterative Improvement algorithms, OptimizationTechniques and Simulated Annealing.
2.1. Classification of Solution Techniques
Partitioning methods can be classified as beingconstructive or iterative. Constructive algorithmsdetermine a partitioning from the graph describ-ing the circuit or system, whereas iterative meth-ods aim at improving the quality of an existingpartitioning solution. Constructive partitioningapproaches are mainly based on clustering [4, 5],spectral or eigenvector methods [6], placement-based partitioning [7], mathematical programmingor network flow computations.
2.1.1. Interchange Methods
To date, iterative improvement techniques thatmake local changes to an initial partition are stillthe most successful partitioning algorithms in
practice. The advantage of these heuristics is thatthey are quite robust.
In fact, they can deal with netlists as well as arbi-
trary vertex weights, edge costs, and balance criteria.The heuristics are frequently used in divide-and-conquer algorithms for placement and floor-plan-ning that are variants of the mincut strategy [2].
Kernighan and Lin (KL) [8] described asuccessful heuristic procedure for graph partition-ing which became the basis for most moduleinterchange-based improvement partitioning heur-istics used in general. Pseudo-code for the algo-rithm is given in Figure 2. Their approach startswith an initial bisection and then involves theexchange of pairs of vertices across the cut of thebisection to improve the cut-size as illustrated inFigure 3. The main contribution of the Kernighanand Lin algorithm is that it reduces the danger ofbeing trapped in local minima that face greedysearch strategies. The algorithm determines thevertex pair whose exchange results in the largestdecrease of the cut-size or in the smallest increase,if no decrease is possible. The exchange of verticesis made only tentatively where vertices involved inthe exchange are locked temporarily. The lockingof vertices prohibits them from taking part in anyfurther tentative exchanges. A pass in theKernighan and Lin algorithm attempts to exchangeall vertices on both sides of the bisection. At theend of a pass the vertices that yield the best cut-sizeare the only vertices to be exchanged. Computinggains in the KL heuristic is expensive; O(n2) swapsare evaluated before every move, resulting in a
complexity per pass of O(n2log n) (assuming a
sorted list of costs).Fiduccia and Mattheyses (FM) [9] modified
the Kernighan and Lin algorithm by suggestingto move one cell at a time instead of exchangingpairs of vertices, and also introduced the conceptof preserving balance in the size of blocks. The
262 S. AREIBI AND A. VANNELLI
PS8 0While(Cumulative Gain, G > O)
Pass Pass + 1Mark all nodcs as not yet movedwhile (All the nodes have not bcen sclectcd)
Select node ai from Block ASelect node bi frorr Block BWhich maximize the gain gi on exchanging the nodesMark ai and bi so that they are locked
end whileChoose k nodes ;o be exchanged which maximize GExchange nodes al to a with nodes bl to
EndWhile /* end of a run */
FIGURE 2 The Kernighan-Lin algorithm.
Bucket Gain
Module
ToBlk
Link
Module
ToBlk
Link
Cummulative Gain
2 3 4 5 6 7
Iteration
Cummulative
Gain
Gain array
BestGainPtr/
Move array
Module 2 3. 4 5,,, 6,,,0 0 0From Blk
To Blk 0 0 0
Module
ToBlk
Link
FIGURE 3 Basic techniques for interchange methods.
TABU SEARCH 263
FM method reduces the time per pass to linear inthe size of the netlist (i.e., O(p), where p is thetotal number of pins) by adopting a single-cellmove structure, and a gain bucket data structurethat allows constant-time selection of the highest-gain cell and fast gain updates after each move.
Krishnamurthy [10] introduced a refinement ofthe Fiduccia and Mattheyses method for choosingthe best cell to be moved. In Krishnamurthy’salgorithm the concept of look-ahead is introduced.This allows one to distinguish between such ver-
tices with respect to gains they make possible inlater moves. Sanchis [11] uses the above tech-nique for multiple way network partitioning.Under such a scheme, we should consider allpossible moves of each free cell from its homeblock to any of the other blocks, at each iterationduring a pass the best move should be chosen. Asusual, passes should be performed until no im-provement in cutset size is obtained. This strat-egy seems to offer some hope of improving thepartition in a homogeneous way, by adapting thelevel gain concept to multiple blocks.
In general, node interchange methods are greedyor local in nature and get easily trapped in localminima. More important, it has been shown thatinterchange methods fail to converge to "optimal"or "near optimal" partitions unless they initiallybegin from "good" partitions [12]. Sechen [13]shows that over 100 trials or different runs (eachrun beginning with a randomly generated initialpartition) are required to guarantee that the bestsolution would be within twenty percent of theoptimum solution. Hadley et al. [14] also showthat starting from good partitions that are ge-nerated by an eigenvector approach, using thisinterchange method on the one partition (gener-ated by the eigenvector approach) yields betterresults than starting from 30 random partitions.
2.I.2. Optimization Methods
The numerical optimization technique by Barnes[15] approximates the graph partitioning problemby a linear programming transportation problem
using an eigenvector approach. This techniqueproduces one solution and does not requiremultiple runs. The advantage of developing an
eigenvector approach to solve the partitioningproblem is that the generated partitions tend tohave many nodes placed in the "right blocks".This is due to observation that eigenvector meth-ods are global approaches for solving large-scale optimization problems. Another importantadvantage of using the eigenvector approach isthat it enables us to estimate a lower bound on theweight of any cut of the graph G [14].
2.1.3. Simulated Annealing
Simulated Annealing [16] is widely recognized asa method for determining the global minima ofcombinatorial optimization problems; that is, itfinds the global minimum with probability 1. Itsbasic feature is that it allows hill climbing moves
(i.e., the acceptance of moves which increase thecost), thus eliminating chances of getting trappedin local minima. A problem formulated to besolved by Simulated Annealing defines an objec-tive function for assessing the quality of a solutionand a set of moves that transform one valid so-
lution into another. Accepting moves (with a de-creasing probability) that increase the solution’scost allows Simulated Annealing to explore thedesign space more thoroughly and move toward a
global solution from a local optimum. The majordisadvantage of Simulated Annealing is the longcomputation time, on the order of hours or daysfor certain realistic problems such as VLSIplacement and routing. The integration of Simu-lated Annealing with a more systematic approachsuch as Tabu Search [17] has proven to reduce thecomputation time drastically.
2.2. General Approaches for ImprovingCircuit Partitions
Figure 4 illustrates the current approaches that areused to improve the performance of algorithms forcircuit partitioning based on module interchange.
Proble,nReduction/EfficientDataStructuresPreprcessing Gain Bucket Data StructureClustering LIFO vs FIFO
FIGURE 4 General approaches for improving circuit partitioning.
The methods can be classified according to thefollowing criteria:
Gain Based Techniques such as CLIP [5] thatselects cells to move with a view to movingclusters that straddle the two subsets of apartition into one of the subsets. Lookaheadtechniques [10] for tie breaking and PROP [18]that is capable of capturing the global andfuture implications of moving a node at acertain time.Constraint Relaxation Techniques where exactbisection constraints [19,20] are relaxed toimprove the resulting cut-sizes. In addition [21]relax the locking mechanism which enforceseach cell to move exactly once per pass byallowing each cell to move more than once.
Techniques based on Efficient Data Structures a
good example is the FM technique (explainedearlier) that reduces the time per pass to linearin the size of the netlist by utilizing an efficientgain bucket data structure that allows fast gainupdates after each move. Sanchis’s extension ofthis algorithm to multi-way partitioning alsorelies on efficient data structures to select themodules to be moved from one partition to the
other. Further investigation of LIFO bucketswith FIFO based buckets is explored in [22] toimprove the solution quality.Problem Reduction Techniques which are mainlybased on preprocessing and clustering [23, 24, 4]have received much recent attention since theyare viewed as the most promising method fortackling the increasing problem sizes in VLSICAD. Clustering involves identifying and merg-ing strongly connected cells into clusters there-by densing the circuit. The result is a two phaseheuristic [25]. Recent work [25,26] has illu-strated the promise of multilevel approaches forpartitioning large circuits. Multilevel partition-ing recursively clusters the instance until itssize is smaller than a given threshold, thenun-clusters the instance while applying a parti-tioning refinement algorithm.Advanced Search Techniques [27, 28] are searchheuristics that are capable of escaping localminima. Some of the problems that are facedby traditional heuristic methods are either thevast amount of computation time required tosolve a combinatorial optimization problem, or
the inferior quality of solutions due to gettingtrapped in local optimum. Recently, four
TABU SEARCH 265
approaches have emerged for handling such incorporate adaptive memory and responsivecomplex combinatorial optimization problems: exploration. The use of adaptive memory contrastsSimulated Annealing, Genetic Algorithms, and with "memoryless" designs, such as those inspiredTabu Search. by metaphors of physics and biology (SimulatedMulti-Start Techniques attempt to improve the Annealing), and with "rigid memory" designs, suchperformance of iterative methods by carefully as those exemplified by branch and bound andchoosing good initial configurations for each its AI-related algorithms.execution of the optimization algorithm [29, We first present Tabu Search in a simple form30,31]. The main disadvantage of iterative that discloses two of its key components. First,improvement techniques is that they mainly Tabu Search restricts the search by classifyingfocus on the immediate area around the current certain moves as forbidden (i.e., Tabu). Theinitial solution, thus no attempt is made to second feature of this method is that it frees theexplore all regions of the parameter space. Over search by a short term memory function that100 trials or different runs are required to provides "strategic forgetting".guarantee that the best solution would be withintwenty percent of the optimum solution.
3.1. Short Term MemoryThe main goal of the paper is to explore the
effectiveness of a new method called Tabu Search It is the feature of allowability whereby some
[1] on partitioning and compare it with two moves are not allowed "they are forbidden or
techniques widely used in CAD tools for circuit made Tabu" which distinguishes Tabu Search
partitioning i.e., Sanchis Interchange method and from other descent methods. Allowability is ma-
Simulated Annealing, in terms of the running time naged by a mechanism that involves historical
and quality of solution. While it is not the purpose information about moves made as the routine
of this paper to compare the Tabu Search ira- progresses; moves accepted for an arbitrarily de-
plementation with more advanced partitioning fined number of previous iterations are deemed
techniques such as HMETIS that is based on not allowable or Tabu, because to allow one of
multilevel clustering and others that utilize the them may trap the routine into cycling throughgeneral approaches mentioned in Section 2.2, we moves already taken.
present some results in Section 5 evaluating TabuSearch with respect to HMETIS [25] state of theart partitioner. 3.1.1. Tabu Move
There are different attributes that can be used increating the short term memory of Tabu lists for
3. TABU SEARCH the circuit partitioning problem. One possibilityis to identify attributes of a move based on the
Tabu Search is a general heuristic procedure for module value to be swapped from one block to
global optimization. Based on simple concepts another. Another way of identifying attributes ofit has been extremely efficient in finding almost a move is to introduce additional information,optimal solutions for many types of difficult corn- referring not only to the modules to be moved butbinatorial optimization problems ranging from to positions (blocks) occupied by these modules.graph partitioning [32, 17,33], graph coloring The recorded move attributes are used in Tabu
[34], to quadratic assignment problems [35]. Tabu Search to impose the constraints, called TabuSearch is based on the premise that problem restrictions, that prevent moves from being cho-solving, in order to qualify as intelligent, must sen. Examples of Tabu restrictions employed are
266 S. AREIBI AND A. VANNELLI
as follows: (i) Restrictions based on modulemovements (TC1). This is considered to be themost rigid restriction since once a module movesfrom one block to another it is not moved until itis released from the Tabu list. (ii) Restrictionsbased on module and source block (position ofmodule) (TC2). Here, the restriction applies tomovement of the module and its source block X,but is free to move to other blocks. For example ina 4-way partitioning scheme, if an iterationinvolved the movement of Module M from Block
Bw (source block) to Block Bx (destination block)then the tabu restriction imposed by the system ison M1 back to Bw but not to other blocks sayBx, Br-, Bz. (iii) Restrictions based on module anddestination block (TC3), i.e., in the previousexample the restriction imposed on the systemwould be on M1 to move for a certain number ofiteration (depending on the Tabu length) back to
Bx. (iv) A combination of the above restrictions isimplemented using (TC4). The fourth restriction isconsidered to be the most lenient.
3.1.2. Tabu List
Tabu list management concerns updating the Tabulist; i.e., deciding on how many and which moveshave to be made Tabu within any iteration of thesearch. Figure 5a shows the quality of solutionsobtained as the size of the Tabu list is increased.The size of the Tabu list can noticeably affect thefinal results; a long list may give a lower overallminimum cost, but is usually obtained in a longtime. Further, a shorter list may trap the routine ina cyclic search pattern. Our empirical results showthat Tabu list sizes that provide good results, oftengrow with the size of the problem. Figure 5b showsthe Tabu search convergence rate as a function ofthe Tabu list length. The longer lists (16, 24) give alower overall minimum partition but is obtained ina longer time. The Tabu list of length (4) on theother hand got trapped in a cyclic search pattern.An appropriate list size depends on the strength ofthe Tabu restrictions employed. The sizes of theTabu lists will be discussed in Section 4.
3.1.3. Aspiration
To increase the flexibility of the algorithm, whilepreserving the basic features that allow thealgorithm to escape local optimum, and avoidcyclic behavior, aspiration is used to temporarilyrelease a solution from its Tabu status. Theaspiration criterion plays an important role toachieve good performance. The appropriate use ofit can be crucial to the success of the Tabu Searchalgorithm. Different applications employ onlysimple types of aspiration criterion. In the currentimplementation, two different methods are used.The first actual aspiration rule (ASPI) is that, ifthe cost associated with a Tabu solution is lessthan the aspiration value associated with the costof the current solution, then the Tabu status of theTabu solution is temporarily ignored. That is,although the Tabu solution is not removed fromthe Tabu list, its Tabu status is overridden, and amove to the Tabu solution may be made. InSection 3.1.4 the aspiration rule ASP1 is clearlyillustrated through an example. The secondaspiration rule (ASP2) that is used consists ofremoving a move classified as Tabu when the moveyields a solution better than the best obtained so
far. Figure 5c shows the effect of the aspirationon the overall solution (cut-net) using the Chipcircuit. As the number of blocks increase, theeffect of the aspiration level has more impact. TheTabu restrictions and aspiration level criterion ofTabu Search play a dual role in constraining andguiding the search process.
3.1.4. Tabu Search Example
Figure 6 provides an example of the Tabu Searchmechanism.. Figure 6a shows a circuit that is to bepartitioned into two blocks with an initial randompartition. Figure 6b presents the gains associatedwith modules in each iteration (always pick themodule associated with best gain "steepest des-cent") Figures 6c, d give the status of the list ofTabu solutions as the routine progresses. Notethat moves do not necessarily result in a decrease
TABU SEARCH 267
210
200
190
180
o160
150
140
130
120
(a) CutSize vs TabuLength for Priml-4.dat
Tc2,ni=5000min=123
20 40 60 80 100 120 140 160 180 200 220TabuLength
(b) Tabu List Length180
"". Size 4160 Size 8
"’-- Size 16140 "’, Size 24
100 ’’ %\60
10 100 1000 10000 100000Iterations
120
100
8O
6O
4O
(c) Aspiration Criteria"
2 Blocks No AspiBlocks with Aspi4 Blocks No AspiBlocks With Aspi6 Blocks No AspiBlocks With Aspi
10000
1000
100
50 100 150 200 250 300TabuLength
(d) Module Movement (Attributive Memory)
0 50 100 150 200 250 300MODULES
FIGURE 5 Parameters affecting Tabu Search.
in the associated cost; costs may increase simply asa result of the current solution being Tabu.
Figure 6c shows that only four consecutivesolutions are considered as Tabu at any one time.Starting from an initial solution So in So a move ismade to solution sl in SI on the basis of cost. Atthe same time, the initial solution s0
2 is placed ina list of Tabu solutions, which is, in effect, a first-in-first-out queue of length 4. On the basis ofaccepting the allowable (i.e., non-Tabu) solutionwith the minimum cost, this process is repeated insubsequent moves.Note that, in making the move from s4 to ss, the
Tabu status of the initial feasible solution So is
dropped; whenever a fifth solution enters the Tabulist, the oldest solution therein is removed andagain becomes allowable. The procedure describedso far lacks one important feature suggested byGlover [1]. Aspiration effectively provides a
method of overriding the Tabu status of moveswhile preserving to a high degree the ability toavoid becoming trapped within a subset of thesolution space. An example is given in Figure 6e,together with the table shown in Figure 6fillustrate the advantageous effects of aspiration.The table in Figure 6f provides complementary
information to that given in Figure 6e. Its contentsare the aspiration values associated with each cost
In this case the movement of module 5 from block 0 to block is So.
268 S. AREIBI AND A. VANNELLI
BLK 0 BLK
(a) Initial partition for circuit X.
Iteration
(1)
(3)
Best G’ai’n Module involved+2 Module-1 Module 4
+2 Module 3
(b) Gains associated with modules in the circuit
o Slcuts cuts cuts cuts
s2cuts cuts cuts cuts
cuts-- cuts ----> cuts ----> cut
cuts cuts cuts
(e) The solution space in terms of cuts
cuts
MAX VALS
MODULE
FROM BLK
TO BLK
(c) Tabu List after iterations
4MAXVALS "2MODULE 6,
FROMBLK 11TOBLK
(d) Tabu List after the fifth iteration
Aspiration Values Associated with
Different Cuts in the Circuit
Iteration Cuts
!1i 23 4,, 516 7 8
0 hi hi hi hi hi hi hi hi
hi hi hi hi hi hi hi
2 hi hi hi hi hi hi
3 hi hi hi hi hi
4 hi hi hi hi
5 hi hi hi hi :5"76 [hi hi hi hi 5__7_ 5,67 hi hi hi hi 5’t 51
(f) The Aspiration Table
FIGURE 6 Tabu moves and aspiration.
value (given in the top row) at each step of the associated with the cost value of 8 is updated insearch routine. A Tabu list of length 4 is again the aspiration table to 6. This implies that, forassumed. Initially, at So, all aspiration values are aspiration to release a Tabu solution so that itset at a level higher than any possible cost may become a candidate for a move from anyindicated in the aspiration table as ec (hi). As solution with cost 8, the Tabu solutions mustmoves are made, the appropriate aspiration have a cost less than 6. Similarly, the secondvalues are updated, if necessary. For instance, move forces an update of the aspiration value as-when the first move is made from a solution of cost sociated with a cost value of 6; the aspiration8 to a solution of cost 6, the aspiration value value is now set at 7. In the example of Figure 6e,
TABU SEARCH 269
the use of aspiration allows the important sev-enth move back to a previously accepted solution.As has been demonstrated by the example, aspi-ration and the short term memory are com-
plementary features, that provide a flexiblesearch procedure. Although the contrived problemmay seem simplistic, it nevertheless provides aclear understanding of the power and applica-bility of aspiration in the basic Tabu Searchprocedure.
3.2. Intermediate and Long Term Memory
Intermediate and long term memory functions are
employed within Tabu Search to achieve regionalintensification and global diversification of thesearch [1,36]. Combined with the short termmemory functions, intermediate and long termmemory functions provide an interplay between"exploitation" and "exploration" of the solutionspace [1] (fine tuned search versus exploration ofthe solution space). Intermediate term memoryoperates by recording and comparing features of aselected number of best trial solutions generatedduring a particular period of search. The methodthen seeks new solutions that exhibit thesefeatures. The long term memory functions, whosegoal is to diversify the search, employs principlesthat are roughly the reverse of those for inter-mediate term memory. Our implementation of thelong term memory (search diversification) is basedon two different techniques:
in the first technique, the frequency of movinga module is used as a means of exploring newsolutions that have not been visited before.Modules having high frequency are discour-aged for further movement. This allows less fre-quented moves to be explored. This is doneeither:
by making the Tabu status of moduleproportional to its frequency.or by locking the module (preventing it frommoving any further for a certain number ofmoves) that has very high frequency.
the second form of diversification that allowsthe meta-heuristic to come out of local optimais to focus more specifically on producing in-itial solutions as different as possible from thesolutions generated throughout the previoushistory of the search process. These solutionsare then used as a restart to get out of a localminimum.
Diversification of the search is usually in-voked in the following situations:For a sequence of 0 consecutive moves there hasbeen no improvement of the best solutionfound.All the solutions in the current neighborhoodare tabu and none of them satisfies an aspirationcriterion.
The intermediate term memory for searchintensification uses a simple approach that allowsthe metaheuristic to come out of local optima. Itbasically records solutions in a Queue with acertain length. As the search is proceeding thesystem identifies a few best solutions and usesthem in a restart phase to intensify the search intopromising regions not fully explored. Figure 5dshows a recording of the module movement duringthe search procedure.
4. TABU SEARCH IMPLEMENTATIONFOR PARTITIONING
The Tabu Search routine described so far can beformulated as shown in Figure 7. The algorithmrequires an initial feasible solution (partition) forwhich an associated cost yielding cut nets may becalculated. A size for the list of Tabu solutions is
also required, (tabu_list_size) and a maximumnumber of moves, (max_num_iter) after which theroutine terminates.
4.1. Tabu List Size
Our Tabu list management techniques are basedon static and dynamic approaches. In the static
270 S. AREIBI AND A. VANNELLI
Input:The net list or the Graph G= (V,E)K number of partitions; T size of Tabu listmax_numiter maximum number of iterations allowed.
Initialization:Initial Partition Generate a random solutions (V, V,...,V); numiter=0; bestpart=s; bestcut=f(s);
Main Loop:While (numiter < max_numiter)
Pick best module associated with best gainIf (move not in Tabulist) then
Accept move, Update Tabuhst;Update the Aspiration Level;
If (move in Tabulist) thenIf (Cost(tabu_sol) < Aspiration(curr_.sol))then
Override Che Tabulist Status and Accept the moveUpdate Tabulist; Update the Aspiration Level;
ElseMove not accepted;
numiter num_iter + 1;End While
Output:Best Partition bestpart; Best Cut bestcut
FIGURE 7 A simple Tabu Search implementation.
approach, the size of the Tabu lists remains fixedfor the entire search period. Single or multipleattributes are set Tabu as soon as their comple-ments have been part of a selected move. Theattributes stay Tabu for a distinct number ofiterations. The efficiency of the algorithm dependson the choice of the Tabu status duration (the sizeof the underlying Tabu list). The size of the Tabulist is chosen to be a function of the number ofnodes within the circuit to be partitioned. Ourexperimentation with the Tabu Search algorithmindicates that choosing a tabu_list_size- nodes(where c ranges from 0.1 to 0.2) yields good re-sults in most cases. The static approach, thoughsuccessful for some circuits, seems to be a ratherlimited-one. The dynamic implementation allowsthe size of the Tabu list to oscillate between tworanges. The first range is determined when cyclingoccurs (Tabu lists are too short). The second rangeis determined when deterioration in solutionquality occurs, which is caused by forbiddingtoo many moves (Tabu lists are too large). Best
sizes lie in an intermediate range between theseextremes.
4.2. Stopping Criteria
The stopping conditions used in this implementa-tion are based on the following: (i) The search willterminate when "num_iter" is greater than themaximum number of iterations allowed "maxnum_iter". (ii) The search will terminate, if no
improvement on the best solution found so far canbe made, for a given number "max_num_iter" ofconsecutive iterations. The maximum number ofiterations after which the routine terminates,depends on whether the routine starts from arandom starting point or a good initial startingpoint (as will be explained in part II).
Experiments performed show the following: Forrandom starting points, the algorithm requiresmore iterations to converge to good final solu-tions, so the maximum number of allowable itera-tions is set to "max_num_iter 100 nodes",
TABU SEARCH 271
whereas for good starting points "max_num_iter- 20 x nodes". The final solution gives the over-all best partition and best cut after the specifiedmaximum number of moves.
5. TESTS AND RESULTS
delay activation (DA). To achieve that withoutcycling to previous solutions, the interchangemethod employing a certain number of passes isused. Once a local minimum is reached, the Tabulists are activated and the Tabu Search algorithmresumes exploration for better solutions throughthe short term memory.
Table I presents the benchmarks [37] that are usedto compare the performance of Tabu Search withthose obtained by Simulated Annealing andSanchis multi-way partitioning interchange meth-od. In all cases, the netlists were partitioned intotwo, four and six blocks of modules. Each blockhad the same number of modules, i.e., they are
equi-partitioned. 3 All testing was conducted on
Sun SPARC II computers running Solaris Operat-ing System. The programs were written in C andcompiled with the Sun C compiler.
5.1. Different Tabu Search Implementations
In this section, the results obtained from the TabuSearch heuristic using different parameter settingsare discussed.
5.1.1. Delayed Tabu List Activation (TS-DA)
The Tabu lists in this setting are not activated"no moves are considered to be Tabu" until thealgorithm hits the first local minima. This is the
5.1.2. Long and Intermediate TermMemories (TS-DS-IS)
In this setting, the Tabu Search algorithm uses thebest Tabu criterion and the most suitable aspira-tion rule. At the same time, intermediate and longterm memories as explained in Section 3.2 are
employed to intensify and diversify the search.
5.1.3. Comparison Between Different Settings
Table II presents results obtained using the TabuSearch under the different settings described. TS-DA represents Tabu Search with delay activation.The second column of each table represents TabuSearch using the first Tabu restriction. TS-ASP2shows results obtained using the second aspirationrule (described in Section 3.1.3). It should be notedthat the best results among the implementationsusing the short term memory are based on TS-DAusing TC1 and ASP1. Results obtained usingsearch diversification and intensification are
considered best among the others but at theexpense of extended CPU time.
5.2. An Adaptive Version of TabuSearch Heuristic
Advances in the development and refinement ofgeneral and advanced search strategies depend inpart on identifying the type of adaptation to a
specific problem domain that will prove mosteffective. The most important parameters thatcontrol the performance of Tabu Search are, theaspiration criterion for back-tracking, the lengthsof the Tabu lists and the attributes to be used forthe Tabu restrictions. Sections 3.1.1 and 4.1
presented some schemes for determining the moveattributes and size of the Tabu list respectively. Amethod proposed here (and still under develop-ment), called Adaptive Tabu Search (ATS), isconsidered more robust in the sense that manyparameters adapt according to the properties ofthe solution space being searched.
5.2.1. An A TS Implementation
In Section 4.1, the choice of a preferred value forthe Tabu list was based either on empirical testingor on variation to the Tabu list size to eliminatecycling. These schemes (static or dynamic) basedon a fixed list size (FIX-TABU) are not strict and,
TABU SEARCH 273
therefore, the possibility of cycling remains. OtherTabu Search implementations are based on thefact that cycles are avoided if the repetition ofpreviously visited configuration is prohibited [36].For example, in the Reverse Elimination Method[1, 36], the only movements that are excluded fromconsideration are those that would lead topreviously visited solutions. This method may berealized as a strict Tabu implementation. Figure 8shows the adaptive Tabu Search implementation.The main feature of this method is the capabilityof adapting different parameters according to thenature of the landscape of the solution space beingsearched. Initially, Tabu Search sets a searchperiod through which it updates statistics regard-ing the following: (i) Total module moves, averagemodule moves, (ii) Tabu and non-Tabu moves,(iii) Valid and non-valid moves, (iv) Flat and
active regions, (v) Rate of change of the objectivefunction, (vi) Inactive modules, (vii) Differentnumber of solutions between search periods. Thesearch controller would decide according to thesevalues on whether to constraint the search or not.If the objective function has not changed for acertain number of phases (in this Case 3) then thecontroller decides to reset the Tabu list (removesall items) and activate all modules that have lowaverage movement. The controller attempts to doso either because the landscape of the solutionspace is flat or no more modules can be moved dueto invalid moves or Tabu moves. If this is not thecase, then the search controller would decide uponthe following:
The search is proceeding well,The search is constrained,The search is unproductive.
Set Search Frequency
SEARCH USING NOR1VIAL TS
NO
NO
Reset TabuList
Activate StuckModules
YES
Update Mo!e Statistics
YES
t3ehYES Constraint
Decrease IS LengthIncrease T-Crlterla
YES
Increase Aspi Level
FIGURE 8 An adaptive Tabu Search scheme.
274 S. AREIBI AND A. VANNELLI
In the first case the search controller wouldproceed to check the effect of the aspirationcriterion used, and would tune it according tothe value of the aspiration effect during the pre-vious search period. If the search is constrainedor unproductive, the search controller wouldutilize the length of the Tabu List and the TabuCriteria used to solve the above mentionedproblem. The search controller was implementedand tested on some problems, and was effective inimproving the search quality within Tabu Searchheuristic. Tables III-V show the results obtainedwith and without the search controller. The resultsindicate clearly that when the search controller istuning the parameters, the quality of solutions
obtained improves steadily for different blockpartitions and as the problem size increases.
5.3. Tabu Search Versus Interchange Methods
Tables VI-VIII present a comparison of thesolution quality and computation time of parti-tions obtained for 2, 4 and 6 blocks of SimulatedAnnealing, Sanchis interchange method [11] andTabu Search4 starting from random initial
points. 5
As has been discussed in Section 2.1.3, theSimulated Annealing algorithm’s performancedepends on the Annealing schedule used. Thechoice of Annealing schedule plays an important
TABLE III 2 way partitioning results using adaptive Tabu Search
role in controlling the effectiveness and efficiencyof the algorithm. Our previous circuit partitioningresults using Simulated Annealing [32, 17] werebased on an Annealing schedule similar to thatproposed by Kirkpatrick [16]. In this section,solutions obtained by Simulated Annealing are
based on results that use an Annealing scheduleproposed by White [38]. Even with this coolingschedule execution times are still high as seen inTables VI- VIII.The second and third columns in each table
presents the results obtained from Simulated
276 S. AREIBI AND A. VANNELLI
TABLE VIII 6-way partitioning using TS, SA and interchange
Annealing with a simple cooling schedule similar tothat proposed by Kirkpatrick [16]. Due to thisapproximation the algorithm is no longer guaran-teed to find a global minimum with probabilityone. The fourth and fifth columns give the resultsobtained from using node interchange on 30random starting partitions. The results obtainedwith the new Tabu Search based approach are
shown in columns 6 and 7. Columns 8 and 9 showthe percentage improvement in both quality of cutnets and time using Tabu Search (TS) versus
Simulated Annealing (SA). Columns 10 and 11show the similar results when Tabu Search (TS) iscompared to the Sanchis Interchange approach0c).Some general observations can be made from
the results presented in Tables III-V. The totalexecution times to obtain a final partition for thedifferent methods indicate that the new TabuSearch based approach takes the least amount ofCPU time whereas the Simulated Annealingapproach requires large CPU times. Tabu Searchexecution time is faster than Simulated Annealingby a factor of 5-20. The quality of the test resultson MCNC benchmark circuits are very promisingin most cases. Tabu Search yields netlist partitionsthat contain 20%-67% fewer cut nets and are
generated 2/3 to 1/3 times faster than the bestnetlist partitions obtained by using an interchangemethod. Comparable partitions to those obtainedby Simulated Annealing are obtained 5 to 20 timesfaster.
5.4. Tabu Search Versus HMETIS
As has been mentioned in Section 2, the main goalof this paper is to:
explore the effectiveness of Tabu Search on
partitioning,explain the different parameter settings involvedin designing the Tabu Search heuristic,compare the Tabu Search Meta Heuristic to twowidely used techniques in CAD tools i.e.,Sanchis Interchange and Simulated Annealing.
Nevertheless, we present some results compar-ing HMETIS [25,23] the state of the art parti-tioner based on multilevel clustering with anefficient Tabu Search implementation (C-TS)which uses GRASP [29] (for obtaining good initial
solutions) and a single level clustering [4] techni-que. As is evident from the Tables IX-XI theresults obtained via C-TS approach are compar-able to the results obtained by HMETIS (worst by1% on average). As the number of partitionsincrease from 2 to 6 the performance of the TabuSearch implementation improves and gives on
average better results by 0.5%. The CPU time usedby the C-TS approach is about 40% more thanthat used by HMETIS. This is basically due to thefact that Hmetis uses multilevel clustering which is
quite effective in reducing the solution space of thebenchmarks (especially ind2 and ind3). A newversion of C-TS is currently being developed basedon multilevel clustering.
Here, we undertake to study the ability of thedeveloped clustering-partitioning heuristics infinding optimal solutions to the benchmarks pres-ented in Section 5. The CGA-TS approach is a
Tabu Search implementation that is similar to C-Ts (i.e., uses GRASP and a single level of clus-tering) but in addition utilizes a Genetic Algorithmto replace the diversification and intensificationmodules used in the traditional Tabu Searchimplementations. Each problem is formulated asa linear integer program (MIP) as presented inSection 1.1 (Eq. (1)). Benchmark problems are
optimally solved using CPLEX Version 3.0 [39],and the results are shown in Tables XII, XIII. It isclear from Tables XII, XIII that the strategy ofcombining clustering with hybrid search techni-ques achieves near optimal solutions and arewithin 4% of optimality in the worst case.
Tables XII, XIII also present a lower boundobtained by solving the LP relaxation of theproblem. The column in these tables denoted byLP-BOUND reads the solution of the LP relaxa-tion as compared to the total nets of the circuit.
The difference indicates the lower bound of thepartitioning problem.
5.5.1. Improving CPLEX MIP Performance
One frustrating aspect of the branch-and-boundtechnique for solving MIP problems is that thesolution process can continue long after the bestsolution has been found. In these situations, thebranch-and-bound tree is being exhaustivelysearched in an effort to guarantee that the currentinteger feasible solution is indeed optimal.The branch-and-bound tree may be as large
as 2 nodes, where n is the number of binaryvariables. A problem containing only 30 binaryvariables could produce a tree having over one
billion nodes. If no other stopping criteria havebeen set, the process might continue for a longtime, until the search is complete or the computermemory is exhausted. Therefore, many issues are
to be investigated to improve the performance ofthe MIP solver.The first issue is related to different parameter
settings of the MIP solver. It is important to
TABLE XII Optimal solutions for 2-way partitioning
enable any mixed integer programming solver likeCPLEX to attempt to reduce the size of the integerprogram by using a preprocessing phase. Thisstrengthens the initial linear programming relaxa-tion and reduces the overall size of the mixedinteger program. The path CPLEX takes throughthe branch-and-bound tree is determined by anumber of user inputs. For example, at each node,CPLEX can either delve deeper into the tree or
"backtrack", the setting of the BACKTRACKparameter impacts this decision. Once CPLEXdecides to backtrack, there are typically a largenumber of available, unexplored nodes from whichto choose; the NODE-SELECT and VAR-SE-LECT parameter setting influences this selection.By looking at the solution to the LP relaxation,most variables take on the same value. This com-bined with the similarity of the variables makes itdifficult for CPLEX to differentiate one variablefrom another in the branching process. The maindifference between variables in the formulatedproblems is that different binaries enable differentnumbers of continuous variables to take on values.By setting the node select parameter to bestestimate strategy instead of the depth-first search,the resulting computations implicitly take thisdifference into account. The variable select para-meter is used to set the rule for selecting thebranching variable at the node which has beenselected for branching. Setting the variable selectparameter to pseudo-reduced costs causes thevariable selection to be based on pseudo-costswhich are derived from pseudo-shadow prices.
Figure 9 summarizes the methodology used toimprove the performance of the CPLEX MIPsolver for the circuit partitioning problem. We callthis method Stat-Heur for the CPLEX MIP solver.As seen in the figure, we make use of our heuristicbased techniques in providing a lower bound thatis used to cut off any nodes that have an objectivevalue below the value supplied by the heuristic. Wealso utilize the solutions obtained by our heuristicsto fix a few modules in the original formulation.Given that we are maximizing the sum of con-tinuous variables, it seems that setting a binary
variable to will have the most favorable impactif that variable can enable a larger number ofcontinuous variables to take on a value of 1.Another important issue worth investigating is thesymmetry of the MIP problem. With the current
formulation, the problem is extremely symmetric.There is very little to distinguish one variable fromanother, both in terms of the objective functionand the constraints. This feature can slow the MIPperformance, because when we branch down on a
variable, we can easily shift it’s activity level toanother variable. Reducing the symmetry of theMIP, reduces the number of equivalent solutions,which will reduce the amount of work needed inthe branch and bound process. One way to reducethe symmetry is to formulate with patterns insteadof assignments. Another means of accomplishingthis is through priority orders. Priority ordersprovide a very powerful mechanism for addinguser-supplied, problem-specific direction to thebranching process. The additional information inthe form of a priority order file can be used toalleviate the effect of the symmetry if reformula-tion is not possible. Statistical information of thecircuits have been used extensively to provide suchinformation. A factor A that determines the re-
lation between modules and nets is used to givepriority to the modules (x variables) that have a
high percentage of nets incident on them overvariables that have less incident nets.
Since priority orders can supply information on
integer variables only, and since the y variables are
continuous (see Section 1.1), the priority orderswere restricted on the x variables. However,because of the nature of our circuit partitioningproblems, we managed to declare the y variables tobe integer without changing the meaning of our
model. Although one’s intuition would say it’s amistake to declare more integer variables, this isnot always the case, especially if we could providesome priority order information regarding the yvariables. For the y variables, A, the number ofmodules incident on the nets is used to providesuch information. The higher the A factor thehigher the priority given to the y variable.
280 S. AREIBI AND A. VANNELLI
Read Circuit
Netlist
Reformulate MIP
Set More Integer Vars
Create Priority File
For New Integer Vars
GenerateStatistical Information
Reduce SymmetryFix Modules
Generate MIP
Obtain Initial Solution
Using Heuristic
Find Estimate of
Lower Cutoff
Solve Problem
FIGURE 9 Stat-Heur heuristic and CPLEX MIP.
Finally, a highly effective method to improveperformance is to take advantage of the presenceof Special Ordered Sets (SOSs). Special branchingstrategies are available to take advantage of SOSs.These strategies depend upon the SOS problemdefinition to include ordering (or weighting)information. If there is no order or weight assigned
to individual SOS members, using SOS branchingstrategies may not improve-and can even de-grade-performance. It is important to note inFigure 9 that when SOSs are used after specifyinga priority order file on individual variables,CPLEX ignores the order on individual variablesbecause SOS sets involve a branching procedure
where the SOS sets are branched on, not individualvariables. Therefore, SOSs are not specified whenusing priority orders.
Figure 10 indicates clearly the impact of usingour heuristic based approaches in improving theperformance of the MIP solver. The figure showsthat for the PCB2 circuit (a circuit with 24 modulesand 32 nets) up to 96% reduction in computationtime was achieved using the Stat-Heur technique.Table XIV presents the amount of reduction incomputation time for different circuits based on 2and 4 partitions.
6. CONCLUSION
The new research presented in this paper involved
exploring the effectiveness of Tabu Search as anew search methodology to the problem of cir-cuit partitioning in circuit layout VLSI design.The exploration was an attempt to implementand compare Tabu Search technique with otherheuristic methods that can produce good solutionsfor this problem. We have also demonstrated theimportance of intelligently controlling the perfor-mance of a search based heuristic. As madeexplicit in Tabu Search, one may choose anyalgorithmic framework and superimpose a searchcontroller within this technique as an intelligentadapter.The promising results reveal that the Tabu
Search method gives a good compromise betweenthe quality of final partitions and time required toprovide the solution. The Tabu Search methodyields the best final partitions with respect to
interchange methods and Simulated Annealing.The quality of the test results on MCNC bench-mark circuits are very promising in most cases.Tabu Search yields netlist partitions that contain20%-67% fewer cut nets and are generated 2/3 to
1(1/2) times faster than the best netlist partitionsobtained by using an interchange method. Com-parable partitions to those obtained by Simu-lated Annealing are obtained 5 to 20 times faster.A hybrid clustered Tabu Search implementationC-TS was also presented and compared toHMETIS (state of the art partitioner). Resultspresented show that C-TS is capable of producingvery similar results for 2,4 blocks and couldproduce better cutset as the number of blocksincreased to 6. The final goal of this paper wasto asses the quality of solutions obtained by thedeveloped combined Tabu Search and clusteringtechniques. Results indicate clearly that mostreal world problems are too complex for anysingle processing technique to solve in iso-lation and that the modern philosophy is to use
hybrids.
References
[1] Glover, F. (1990). Tabu Search Part I. ORSA Journal onComputing, 1(3), 190-206.
[2] Lengauer, T., Combinatorial Algorithms for IntegratedCircuit Layout, John Wiley & Sons, New York, 1990.
[3] Garey, M. R. and Johnson, D. S., Computers andIntractability, Freeman, San Francisco CA, 1979.
[4] Areibi, S. and Vannelli, A., An Efficient ClusteringTechnique for Circuit Partitioning. In: IEEE InternationalSymposium on Circuits and Systems, pp. 671-674, SanDiego, California, 1996.
[5] Dutt, S. and Deng, W., VLSI Circuit Partitioningby Cluster-Removal Using Iterative Improvement
282 S. AREIBI AND A. VANNELLI
Techniques. In: IEEE International Conference onCAD, pp. 194-200. ACM/IEEE, (1996).
[6] Chan, P. K., Schlag, D. F. and Zien, J. Y. (1994). SpectralK-way Ratio-Cut Partitioning and Clustering. IEEE Trans-actions on Computer Aided Design, 13(9), 1088-1096.
[7] Riess, B. M., Doll, K. and Johannes, F. M., Partitioningvery large circuits using analytical placement techniques.In: Proceedings of 31st DAC, pp. 646-651, Las Vegas,Nevada, 1994, ACM/IEEE.
[8] Kernighan, B. W. and Lin, S., An Efficient HeuristicProcedure for Partitioning Graphs. The Bell SystemTechnical Journal, 49(2), 291 307, February, 1970.
[9] Fiduccia, C. M. and Mattheyses, R. M., A Linear-TimeHeuristic for Improving Network Partitions. In: Proceed-ings ofl9th DAC, pp. 175-181, Las Vegas, Nevada, June,1982, AM/IEEE.
[10] Krishnamurthy, B., An Improved Min-Cut Algorithm forPartitioning VLS| Networks. IEEE Transactions onComputers, 33(5), 438-446, May, 1984.
[11] Sanchis, L. A., Multiple-Way Network Partitioning. IEEETransactions on Computers, 38(1), 62-81, January, 1989.
[12] Pothen, A., Simon, H. D. and Liou, K. P. (1990).Partitioning Sparse Matrices with Eigenvectors of Graphs.SIAM Journal on Matrix Analysis, 11,430-452.
[13] Sechen, C. and Chen, D. (1988). An improved ObjectiveFunction for Min-Cut Circuit Partitioning. IEEE Trans-action on CAD, pp. 502-505.
[14] Hadley, S. W., Mark, B. L. and Vannelli, A., An EfficientEigenvector and Node Interchange Approach for FindingNetlist Partitions. IEEE Transactions on CAD/ICAS,11(7), 885-892, July, 1992.
[15] Barnes, E. R., An Algorithm for Partitioning the Nodes ofa Graph. SIAM Journal of Algebraic and DiscreteMethods, 3(4), 541 550, December, 1982.
[16] Kirkpatrick, S., Gelatt, C. D. and Vecchi, M. P., Opti-mization by Simulated Annealing. Science, 22t1(4598),671-680, May, 1983.
[17] Areibi, S. and Vannelli, A., Circuit Partitioning Using aTabu Search Approach. In: IEEE International Sympo-sium on Circuits and Systems, pp. 1643-1646, Chicago,Illinois, 1993.
[18] Dutt, S. and Deng, W., A Probability-Based Approach toVLSI Circuit Partitioning. In: Proceedings of 33rd DAC,Las Vegas, Nevada, June, 1996, ACM/IEEE.
[19] Caldwell, A., Kahng, A. and Markov, I., Relaxed Par-titioning Balance Constraints in Top-Down Placement.In: Proceedings IEEE International Conference on ASIC,pp. 229- 232, June, 1998.
[20] Cherng, J. and Chen, S., A Stable Partitioning Algorithmfor VLSI Circuits. In: IEEE Custom Integrated CircuitsConference, pp. 9.1.1 9.1.4, San Diego, California, 1996,IEEE.
[21] Dasdan, A. and Aykanat, C., Two Novel MultiwayCircuit Partitioning Algorithms Using Relaxed Locking.IEEE Transaction on Computer Aided Design ofIntegratedCircuits and Systems, 16, 169-178, February, 1997.
[22] Hagen, L., Huang, D. and Kahng, A., On ImplementationChoices for Iterative Improvement Partitioning Algo-rithms. IEEE Transaction on Computer Aided Design ofIntegrated Circuits and Systems, 16, 1199-1205, October,1997.
[23] Karypis, G., Aggarwal, R., Kumar, V. and Shekhar, S.,Multilevel Hypergraph Partitioning: Application in VLSIDesign. In: Proceedings of 35th DAC, pp. 526-529, LasVegas, Nevada, June, 1997, ACM/IEEE.
[24] Hagen, L. and Kahng, A., Fast Spectral Methods forRatio Cut Partitioning and Clustering. In: IEEE Interna-tional Conference on CAD, pp. 10-13, Santa Clara,California, November, 1991, IEEE.
[25] Alpert, C. J., Huang, J. and Kahng, A., Multilevel CircuitPartitioning. In: Proceedings of34th DAC, pp. 530-533,Anaheim, CA, June, 1997, ACM/IEEE.
[26] Karypis, G. and Kumar, V., Multilevel Graph Partition-ing Schemes. In: Proceedings of the 1995 Intl. Conf. onParallel Processing, pp. 113-122. ACM/IEEE, 1995.
[28] Areibi, S. and Vannelli, A., Advanced Search Techniquesfor Circuit Partitioning. In: DIMACS Series in DiscreteMathematics and Theoretical Computer Science, pp. 77-98, Rutgers State University, New Jersey, 1994.
[29] Areibi, S., GRASP: An Effective Constructive TechniqueFor VLS! Circuit Partitioning. In: 1999 Canadian Con-ference on Electrical and Computer Engineering, Edmon-ton, Alberta, May, 1999, IEEE.
[30] Hadley, S. W., Mark, B. L. and Vannelli, A., An EfficientEigenvector-Node Interchange Approach for FindingNetlist Partitions. In: Proceedings of Custom IntegratedCircuits Conference, pp. 28.2.1-28.2.4, San Diego, July,1991.
[31] Areibi, S. and Vannelli, A., An Efficient Solution toCircuit Partitioning Using Tabu Search and GeneticAlgorithms. In: 6th International Conference of MicroElectronics, pp. 70-74, Istanbul, Turkey, 1994.
[32] Areibi, S. and Vannelli, A., A Combined EigenvectorTabu Search Approach for Circuit Partitioning. In:Proceedings of the 1993 Custom Integrated CircuitsConference, pp. 9.7.1-9.7.4, San Diego, 1993.
[33] Tao, L., Zhao, Y. C., Thulasiraman, K. and Swamy,M. N. S., An Efficient Tabu Search Algorithm for GraphBi-sectioning. In: Proceedings/Great Lakes Symposium onVLSI, pp. 92- 95, IEEE, 1991.
[34] Hertz, A. and Werra, D. (1987). Using Tabu SearchTechnique for Graph Coloring. Computing, pp. 345-351.
[35] Skorun-Kapov, J. (1990). Tabu Search Applied to theQuadratic Assignment Problem. ORSA Journal on Com-puting, 2, 195- 202.
[36] Glover, F. (1990). Tabu Search Part II. ORSA Journal onComputing, 2(1), 4- 32.
[37] Roberts, K. and Preas, B., Physical Design Workshop.Technical report, MCNC, Marriott’s Hilton Head Resort,South Carolina, April, 1987.
[38] White, S. R., Concepts of Scale in Simulated Annealing.In: IEEE Int. Conf on Computer Design, pp. 646-651,IEEE, November, 1984.
Shawki M. Areibi has worked as a researchmathematician at Shell International Oil Productsin the Hague, The Netherlands. He also served onthe faculty of electrical engineering at RyersonPolytechnic University, Toronto, Canada.
TABU SEARCH 283
Currently, he is an assistant professor in theSchool of Engineering at the University of Guelph,Canada. His research interests include distributedprocessing, VLSI design, Circuit Layout and com-binatorial optimization. He is a member of theIEEE, ACM and ISCA.
Tony Vannelli is a professor at the University ofWaterloo, Canada. Currently, he is the head ofelectrical and computer engineering department.His research interests include mathematical pro-gramming, Physical Design and graph theoryapplications. He is a member of IEEE.