Dingqing Lu Sr. Application Specialist Agilent EEsof EDA Copyright © 2012 Agilent Technologies June 7, 2012 Webcast: “System-Level Satellite Design & Verification” Welcome Daren McClearnon ESL Product Planning Mgr. Agilent EEsof EDA
Dingqing Lu Sr. Application Specialist Agilent EEsof EDA
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Welcome
Daren McClearnon ESL Product Planning Mgr. Agilent EEsof EDA
Agenda
• Overview • Modeling and Simulation • Verification and Testing • Algorithm design • Advanced Systems • Summary
2
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite Comms PHY Design Challenges 1. I need to develop new SatComm components. How do I get started?
2. How do I verify my SatComm design consistently at all stages of development?
3. How do I measure early SatComm system performance more accurately?
4. How can I reduce the test costs of my System test?
5. How can I get measured waveforms integrated into my simulations?
SYSTEM DESIGN BB Hardware
Design
RF/MW Design
Algorithms, Standards
Test & Measurement
Requirements
Test Plans
3
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Simulation • Integration capability • Connection to leading RF EDA flows • Performance Evaluation for RF & BB • Advanced Measurement o BER, FER, PER o Sensitivity, Selectivity o Throughput
HW Implementation • Existing Modeling Templates • DSP Algorithm Creation • Fixed Point Simulation • HDL Code Generation • FPGA Synthesis
Open Modeling • Existing Models/Templates • Custom Models : C++,SystemC,.m, HDL • Model Import: MATLAB, ADS, SignalStudio, VSA, STK • Recorded Data
HW Test • Link to VSG/VSA/Scope/LA • Integration/Controlling/Automation • Custom Waveform Generation • Advanced RF & BB Measurements • Parameter Estimation • Troubleshooting
A unifying, system-level approach
4
SystemVue • Advanced Dataflow engine • Co-Simulation • Model Libraries • Integration of SW, HW • HDL Simulation • FPGA Implementation
Model more accurately across domains, verify earlier, and continue naturally into test
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Agenda
• Overview • Modeling and Simulation • Verification and Testing • Algorithm design • Advanced Systems • Summary
5
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite Communication Systems
Info Source
Signal Format Modulation
Transmit
Filter
High-Power Amplifier
Transponder Filter
Channel Encode
Info Sink
Signal Format DSP
Demodulation
Receiver Filter TWTA AGC Channel
Decode
BER Measurements
Transmitter
Receiver
Satellite Transponder
Waveform, Spectrum Constellation, EVM
Measurements
Channel
Interferences
Channel Interferences
• Typical satellite communication system
• A Simulation Platform is created including Transmitter, Transponder and Receiver are considered
• System performance is measured
Earth
Earth Transmitting Station
Earth Receiving Station
Satellite
Uplink
Downlink
6
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite Link Simulation in SystemVue • Framed data with R-S encoded transmitted through the link
• Uplink Frequency: 5.925 to 6.425GHz and Down Link Frequency: 3.7 to 4.2 GHz
• TWTA in Transponder is included
• Received matched with the transmitted data
• Tx and Rx measurements are provided
Modeling a Point to Point Satellite Communication System Satellite Antenna
Earth Station 1
Earth Station 2
7
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Key Models for SatComm Modulation models
• BPSK, SBPSK, QPSK, OQPSK, 8PSK, pi/4 DQPSK, SOQPSK, Pi/4 CQPSK, MSK, GMFSK, CPM, CPFSK
• FHSS, DSSS FEC – forward error correction
• Convolutional Coding • Turbo Coding • LDPC
Multiple Access Scheme • FDMA • TDMA • CDMA
Satellite Channel Model
Transponder
8
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
9
Key Modulation Types in Satellite Navigation: DSSS and BOC DSSS: • Data signal is multiplied
by a PRN code (XOR operation for binary signals).
• The result signal has PRN like properties.
BOC: (binary offset carrier) • It is derived by mixing of
the data/code signal and a sub-carrier (a square wave for BOC).
• The “traditional” BPSK spectrum is divided into two parts.
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Advanced Applications for Satellite Systems Multiple Access and Broadcasting • Many earth station can access the satellite from different locations using CDMA, SDMA, TDMA, FDMA and OFDMA
Broadcasting • Direct Broadcast Satellite
• DVB-S/DVS-S2
Custom Satellite DSSS (direct-sequence spread spectrum) System • Support Flexible Spreading Code • Support BPSK, QPSK, easy to extend to
other modulation
Satellite Navigation • Galileo: E1/E5
• GPS : L1/L2/L5/L1C/L2C • BeiDou: B1
Satellite Antenna
Multiple Receivers
Multiple Receivers Transmitter
Broadcast
10
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
SystemVue model set – Modulation
• Generic models fit for – Oscillator with phase noise – Transmitter – Tx Filtering
11
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
SystemVue model set – High Power Amplifier • High-Power Amplifier (HPA) • Nonlinearity • Noise Figure
12
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
SystemVue model set – Satellite Channel Model • Channel Model • User Channel Profile
to simulate channel condition • Path loss • Channel Noise • Additional Interferers
13
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Modeling Satellite RF Components Agilent provides a rich variety of RF modeling choices
Custom RF modeling interfaces – Custom math language .m code (example: Saleh TWTA) – Custom Visual C++ (example: Amplifier DLL with thermal droop, part of a DPD example) – Custom GUI-based (example: Volterra algorithm, such as “DPD_PAModel” in DPD models)
RF Design Flow modeling interfaces (system prediction or system verification)
– Native RF System engine, using RF_LINK (for block level modeling; very fast) – X-parameter devices exported from ADS (for bottom-up verification, IP exchange) – Golden Gate “Fast Circuit Envelope” models (for CMOS transceivers, with memory effects) – Direct co-simulations with ADS,GoldenGate (for highest-accuracy diagnosis & verification)
Measurement-based RF modeling
– Behavioral compressing amp/mixer/osc model from datasheet parameters (P2D, S2P, phase noise, etc) – Measured compressing amp/mixer model (from P2D curve from a PNA-X network analyzer) – X-parameter measurements from a Nonlinear VNA – Digital Pre-Distortion (DPD) – creates a DPD correction network, AND a memory polynomial PA model
that can be used in system simulations.
14
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
SystemVue Satellite Transponder (math language)
• Transponder • Transponder Filter • Template TWTA based
on Saleh’s model • AGC
Inline math model, or direct MATLAB
15
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Modeling Satellite components using RF_LINK
SystemVue Dataflow
SystemVue Spectrasys
16
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Modeling Satellite components using Co-simulation
ADS Dataflow/Ckt
SystemVue Dataflow
17
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Advanced Application: Digital Pre-Distortion for digital satellite TWTA or HPA • TWTAs in satellite systems add severe nonlinear signal distortions. • Higher-order modulation types are more sensitive to nonlinear distortions (tighter constellations) • Therefore there is a tradeoff between power efficiency (i.e. transmitted signal power) and spectral efficiency (e.g. use of M-QAM modulations. M>4) • Several authors have proposed equalization and pre-distortion techniques to overcome nonlinear distortions and intersymbol interference in nonlinear transmission channels • The following scheme is proposed:
Filter DPD Filter Equalization TWTA HPA
18
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Steps to Achieving Digital Pre-distortion (DPD)
1. Characterize DUT PA using DUT input and output waveforms
2. Calculate complex memory coefficients using QR and SVD algorithms
3. Apply memory polynomial coefficients to construct memory polynomial pre-distorter
4. Pre-distorted signal cancels nonlinear distortion in PA (including major memory effects)
19
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Theory of Operation – Desired Pout
•Uncorrected PA: Pout vs. Pin curve saturates at Psat (in dBm)
•DPD+PA: Pout-pd vs. Pin curve is linear, up to a higher limit, where Max(Pin) is the maximum correctible input power
Linear Output
Input Power Pin Pin-pd
Output Power
Pout Pout-pd
Desired Output Saturation
Psat
Max Correctable Pin
20
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
5-Step Measurement-Based DPD Modeling Flow
1. Create DPD Stimulus
2. Capture PA Response
3. Extract DPD Model
4. Capture DPD+PA Response
5. Verify DPD+PA Response
21
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
DPD of 1000W TWTA PA w/o RF Feed Forward AM-AM response
22
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
DPD of 1000W TWTA PA w/o RF Feed Forward AM-PM response
23
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
DPD of 1000W TWTA PA w/o RF Feed Forward
ACLR -2BW Lower
-1BW Lower
+1BW Upper
+2BW Upper
PA input 64.05 63.63 63.82 64.26
Raw PA output
46.62 32.52 27.01 44.26
DPD+PA output
49.87 46.61 46.69 50.99
OFDM 10MHz System with QPSK Source:MXG Vector Analyzer:PXA PA output Spectrum(Blue), PA+DPD Spectrum(Red) after one iteration to extract DPD coefficients
24
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Predictive DPD using Simulation vs. Measurements
External Trigger
Attenuator N5182 MXG
or E8257D PSG as external modulator M9330A AWG if > 100 MHz
89600 VSA
M9392A PXI VSA (>140MHz) or N9030A PXA (<140 MHz)
I,Q RF
RF DUT
SIMULATION-BASED DPD (predictive)
• ADS & GoldenGate Circuits as simulated RF DUTs - Complex loading, memory FX, dynamic behaviors • NVNA X-parameter measurement model, - Great for smaller solid-state devices
X-parameters
RF DUT N5241,2 PNA-X
MEASUREMENT-BASED DPD
CO-SIM, MODELS
CO-SIM, MODELS
MODEL
ADS
GG
25
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Agenda
• Overview • Modeling and Simulation • Verification and Testing • Algorithm design • Advanced Systems • Summary
26
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite Communication System Simulation • Test platform is needed for SatComm systems to generate test signals and
measurements • Simulation Emulation Pre-qualification testing • Replace system simulation models with RF hardware component, via the
instrument link “connector”
“Connector” Structure
MXG Sink
VSA Source
VSA MXG
Info Source
Signal Format Modulation
Transmit
Filter
High-Power Amplifier
Transponder Filter
Channel Encode
Info Sink
Signal Format DSP
Demodulation
RF Receiver TWTA AGC Channel
Decode
BER Measurement
Transmitter
Receiver
Satellite Transponder
Channel
+
+
HW Receiver
Interferences
27
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Interface to Agilent Instruments – Wideband AWG
28
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Interface to Agilent Instruments
Capture from Signal Analyzer
– VSA_89600_Source can capture data from MXA, PSA, PXA, Modular M9392, and Infiniuum
– Parameter settings listed in the following table, assuming you know:
• SamplingRate • SignalRange
– Most SV examples provide a VSA
setup file (.setx), to pre-configure the software parameters
29
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Signal Generation and Measurement
1. SV generates wideband I/Q data, then downloads to M8190A, 81180A, M9330/N6030 AWG
2. Wideband analog test signal formed in M8190A and sent to analog I,Q inputs of PSG signal generator
3. Wideband microwave signals actually test the Analog/RF components 4. The DUT output is captured by a VSA (PXA or Infiniium scope) and
brought back to the PC for analysis using 89600 VSA, or further signal processing using SystemVue.
SystemVue/VSA Wideband PSG DUT Infiniuum 90000 Scope / M9392A VSA M9330/
M8190A
30
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite Communication System Simulation with HPA working in leaner region
Spectrum, Waveform, Constellations, Phase Error, Mag Error, EVM
31
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite Communication System Simulation with nonlinear HPA (Output P1dB=10 dBm, TOI=20 dBm)
Spectrum, Waveform, Constellations, Phase Error, Mag Error, EVM
32
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite Communication System Simulation with nonlinear HPA (Output P1dB=10 dBm, TOI=20 dBm, and phase noise )
Spectrum, Waveform, Constellations, Phase Error, Mag Error, EVM
33
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Agenda
• Overview • Modeling and Simulation • Verification and Testing • Algorithm design • Advanced Systems • Summary
34
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Algorithm design example: Phase error correction Algorithm implementation and Trade-off analysis
– Replace system models with custom model and run simulation – Compare the performances – Example for phase correction algorithms
Info Source
Signal Format Modulation
Transmit
Filter
High-Power Amplifier
Transponder Filter
Channel Encode
Info Sink
Signal Format DSP
Demodulation
Receiver Filter TWTA AGC Channel
Decode
BER Measurement
Transmitter
Receiver
Satellite Transponder
Channel Interferences
+
+
Custom .m Algorithm
C++ Model
35
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Satellite System with Phase Noise • Performance of communication systems with phase noise needs to be
discussed.
• Performance case study shows that system performance degradation is directly related to phase noise random properties.
• To reduce the performance degradation, a phase error correction algorithm is proposed.
• Simulation results show that the algorithm works properly and the system bit error rate (BER) performance can be improved significantly.
36
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Source Models • To observe how phase noise affects system performances in simulation a
typical communication system model is structured in Figure 1.
• At the receiver input the equivalent baseband received signal can be described as
Baseband Signal
RF Modulator
RF + DSP Receiver Channel
37
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Phase Noise • Assume that the phase noise is caused by the Oscillator in the RF
modulator.
• As a typical example, the phase noise in (1) is modeled as a color Gaussian noise with a mean value and a power density spectrum
38
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Ideal Signal without phase noise • Receiver constellation for the system without phase noise
39
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Ideal Signal with phase noise • Receiver constellation for the system with phase noise
40
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Ideal Signal with phase and amplitude noise • Receiver constellation for the system with phase and amplitude noise
41
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Phase Error correction • An algorithm to correct the phase error is proposed for improving the
system performances.
Receiver Filtering
Phase Error Estimation
DSP Receiver
Phase Error Compensation
42
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Phase Error correction • The phase error correction algorithm de-rotates the constellation.
Phase Error Correction Algorithm
43
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Phase Error correction • The Constellation is improved as seen in the following figures, in (a) the
averaging signal states are biased from the ideal QPSK constellation in (b) the averaging signal states are aligned with the ideal QPSK constellation.
(a) Before Phase correction (b) After Phase correction
44
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Phase Error correction • The phase error correction also works for the system with both amplitude
and phase noise. • Below, the Constellation for the system with phase error correction is given
and the phase rotation caused by the phase noise is corrected..
(a) Before Phase correction (b) After Phase correction
45
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Phase Error correction • BER for the system with both amplitude and phase noise, • With the phase correction, the BER changes from very high to reasonable
BER With Phase Noise
BER With Amplitude and Phase Noise
No Phase Correction
4.8E-1 5.03E-1
With Phase Correction
1.1E-12 2.1e-10
Table 1. BER for the S Band Satellite system with 10 dB of Eb/No for Additive Noise (plus -40 dBm for phase noise)
46
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Agenda
• Overview • Modeling and Simulation • Verification and Testing • Algorithm design • Advanced Systems • Summary
47
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – DVS-S2 Transmitter
48
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – DVB-S2 Receiver
49
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – DVB-S2 BER test, with ADS Co-sim
ADS
SystemVue
DVB-S PA
DVB-S Source
DVB-S Receiver
LDPC Coder
LDPC Decoder
50
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – DVB-S2 System Results
DUT – DVB PA
51
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – DSSS Satellite Communication
52
DSSS QPSK Transmitter: Flexible Spreading Code, Spreading Factor, Chip Rate, Number of samples per Chip
DSSS QPSK Receiver: Timing and Frequency synchronization, Channel estimator and Rake combiner.
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – DSSS Satellite Communication
53
It will be extended to other DSSS system (such as OQPSK, 8-PSK, 16-QAM and etc).
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – BeiDou B1 Satellite Navigation
54
Satellite Navigation is not like Satellite Communication. It’s a message broadcasting system and it adopts DSSS modulation and BOC (Binary Offset Carrier) modulation.
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
BeiDou B1 Satellite Navigation measurements
55
Carrier Freq Tracking
Spreading Code Phase Tracking
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – Custom OFDM Basic Frame Structure
56
:Idle can be turned ON/OFF :Preamble1 can be turned ON/OFF
:Data 1 is mandatory :Data 2 can be turned ON/OFF
:Preamble2 can be turned ON/OFF Preamble (1 and 2) sequence can be set as time-domain sequence or frequency-domain sequence
• There are two kinds of pilots (Pilot1 and Pilot2) supported in Data 1 and Data 2. • Both Pilot1 and Pilot2 can be turned ON/OFF.
Idle Preamble 1 Preamble 2 Data 1 Data 2
OFDM symbol
OFDM symbol
OFDM symbol
OFDM symbol
Block … Block
Block Block …
…
…
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – Wideband Military Satellite
57
The above figure is from Ludong Wang and Jezek B’s paper, “OFDM modulation schemes for military satellite communications”, IEEE MILCOM 2008.
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Example – Wideband Military Satellite
58
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Agenda
• Overview • Modeling and Simulation • Verification and Testing • Algorithm design • Advanced Systems • Summary
59
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
Summary SystemVue provides a platform solution for designing and verification of satellite communication systems
o Modeling integration: SV integrates all SW models in C++, MATLAB code, math language, HDL code, together as a system. Without the integration, each different modeling format makes system-level PHY verification very difficult.
o Test integration: SV integrates test instruments together as a system test tool. Without integration, each HW instrument only provides individual functionality. SystemVue integrates powerful system-level verification suites in software and hardware.
o Unique Value: From functionality point of view Agilent Design-Verification-Test provides unique value in the following areas
Embedded reference transmitters and receivers, to validate your systems earlier Custom waveform generation and integration of user IP, to customize test systems More sophisticated system-level measurements, including closed-loop tests, and tests
of partial systems
Contact Agilent about SystemVue’s “Early Access Program”
to evaluate new SatComm and SatNav capabilities
http://www.agilent.com/find/eesof-systemvue-earlyaccess
60
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
For Additional Information:
SystemVue: www.agilent.com/find/eesof-systemvue
Design Validation: www.agilent.com/find/eesof-systemvue-dvt
Agilent SatComm Resource DVD: www.agilent.com/find/satcomm
At the websites above, • Select Contact an Expert to get further information, or • Contact your local Agilent EEsof EDA sales representative.
61
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”
References
1. S. Benedetto, E. Biglieri, and V. Castellani, " Digital trunsmission theory”, Prentice Hall International, Englewood Cliffs. New Jersey, 1987.
2. D. Lu and K. Yao, "Estimation Variance Bounds of Importance Sampling Simulations in Digital Communication Systems," IEEE Trans. On Communications vol. 39, Oct., 1991, pp 1413-1417.
3. Dingqing Lu, “Quasi-Analytical Method For Estimating low False Alarm Rate,” EuRAD2010, 2010.
4. Dingqing Lu and Zhengrong Zhou, "Integrated Solutions for testing Wireless Communication Systems," IEEE Com Mag, June, 2011
Author’s contact information: [email protected]
62
Copyright © 2012 Agilent Technologies June 7, 2012 Webcast:
“System-Level Satellite Design & Verification”