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International Microelectronics and Packaging SocietyNew England Section 42nd Annual Symposium Technical Sessions - May 5, 2015

Symposium’s Technical Chairs Welcome Letter

We’d like to welcome everyone to the 42nd Annual New England IMAPS Symposium. Thanks to all the Session Chairs we’ve pulled together a stellar program of technical talks on a variety of topics that will peak the interest of every Attendee. Now it’s your job to engage the speakers and each other in a learning environment that’s only available at this unique one day symposium. Take the time to learn something new and network with your peers. Below is a brief summary of each session to help you on your way and don’t forget to spend time in the exhibit hall, because after all without the support of the exhibitors this day wouldn’t be possible. Enjoy!

RF and Microwave - Innovations and Emerging Technologies: This session is all about the innovations and emerging technologies that are driving the RF and Microwave packaging industry. This two-part (morning/afternoon) session is returning by popular demand and includes talks from industry leaders such as NATEL Engineering, Vishay and OMMIC. The topics range from multilayer ceramic capacitors for RF, Low Temperature Co-Fired (LTCC) design to next generation high powered Gallium Nitride (GaN) devices for millimeter wave bands.

Advanced Technologies 2.5/3D Packaging: This session covers the latest advancements in 2.5/3D technology. Through Silicon Vias (TSVs) are changing the landscape for high density 3D packages. The impact of this technology and other aspects of 2.5/3D integration technology and applications are presented in this session with plenty of time for Q &A. Copper pillars and the challenges of underfill is another important topic for the packaging community.

MEMS and Nano Technology for UAV, Energy, security and Biomedical: MEMS applications are blossoming –from multiple airbag sensors, flow control and stability control in automobiles to gyroscopes, microphones and tuners in handheld devices. New sensor systems – optical, bio and other – are now gaining traction. Nanomaterial applications are starting to blossom in the electronics industry, from stencil coatings to fillers in underfills, surface finishes, and tin whisker mitigation coatings – the list is growing fast. This session represents the best of both worlds!

SMT and Electronics Packaging: Surface mount technology is alive and well in the New England area. This session looks at some of the important IPC plating specifications along with critical reliability issues such as Solder Fatigue in Tin-Lead and Silver-Tin-Copper Solders. Also included is special presentation about Electromagnetic CompatibilityTesting in All-Electric Vehicles.

Printed Electronics is a set of printing methods used to create electrical devices on various substrates and this disruptive technology is being adopted by many different industries, with strong leaders right in our region. A presentation from the Army, which is pioneering the use of this technology within the DOD focuses on additive manufacturing and integration of electronics. Optomec will report on latest technology to enable Internet of Things IoT.

Cu Wire and Advanced Interconnect Technology session offers unique opportunities to discuss barriers for using non-conventional wirebond interconnect methods and recent promising study results. You have opportunity to hear about latest advancements in wirebond aging studies and 3D modeling of common RF topologies for Wide Band Gap Power Module applications

Poster Session: This year the competition in the poster session is really heating up. $500 dollars in cold cash to the first place winner! The posters represent a divergent set of technical topics that all fit under the umbrella of our symposium. The students are our future so please set aside some time to go and talk with each of them to learn what’s new on the horizon.

We welcome your feedback and have a wonderful day!!!

Thomas J. Green Dmitry Marchenko

2015 iMAPS New England Symposium Technical Chairs

Tom Green Dmitry Marchenko

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42nd Symposium & Expo – May 5th, 2015

List: 4-Apr-2015

Game of Drones

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Keynote Lunch Address

“3D Technology Trends & Key Manufacturing Challenges”Presented by Amandine Pizzagalli – Yole Développement

12:15 – 12:45 - Exhibits Hall

Keynote Abstract

Three-dimensional (3D) technology utilizing Through-Silicon-Via (TSV) interconnects is considered today to be one of the most advanced technologies enabling multifunctional integration. It also brings added value with package form factor reduction and enhancement of electrical performance. 3D technology is not limited to CMOS scaling, it is rather based on enabling various heterogeneous integration by stacking multiple and different type of devices such as Memory, Logic, Analog, MEMS and passive components. It brings more complexity with respect to process technologies but also opens a new path for the evolution of semiconductor packaging technology.

Indeed, emerging platforms using vertical integration with TSV technology, such as 3D/2.5D platforms, have gained significant interest from several companies across the supply chain. Moreover, it has generated the start of the “Middle-End” area, which is supported by several organizations from IDMs to fabless, OSATs, foundries and packaging houses, as well as equipment and material suppliers. The entire supply chain in the packaging industry is evolving, leading to more opportunities for collaboration in order to overcome the remaining technical issues that the industry is currently facing. Lithography, temporary bonding & de-bonding processes, inspection and metrology tools, wafer testing, as well as thermal management are the remaining challenges of this technology.

This work addresses the key technical trends and challenges in lithography for Advanced Packaging. Steppers will become mandatory for TSV packaging due to very tight pitch between bumps. Future needs of 20 µm micro-bumping capabilities and achieving better resolution for Via middle below 2 µm and for very high-level wiring density at the RDL level are being set. Wafer warpage, as one of the key constraints for FO WLP applications is also addressed. Furthermore, temporary bonding and debonding, a key technology for handling extremely thin TSV wafers is analyzed.

In order to address 3D technology requirements and solve the remaining challenges, optimized processes are needed and strong investment has to be made in new design tools and high performing materials. To fulfil 3D needs, the motivation to introduce new manufacturing tools has driven the introduction of equipment coming from the Front-End and Back-End areas to the Middle-End area. This has created competition between Front-End and Back-End equipment vendors, both of which desire market share in the “Middle-End”. A trade-off between performance and cost will be needed for the processes that have applications in both front and back-end.

To support the miniaturization trend, front-end tools are preferred for achieving more aggressive features. However, they are typically more expensive. On the other side, back-end equipment generally exhibits lower cost, but can face scaling issues when semiconductor ICs continue to reduce in chip and feature size. In conclusion, the supply chain interaction and key players in the packaging area will be addressed.

Biography

Amandine Pizzagalli is a Technology & Market Analyst at Yole Développement in Lyon France. She is responsible for the Equipment & Material fields for the Advanced Packaging & Manufacturing team at Yole. Amandine graduated as an Engineer in Electronics, with a specialization in Semiconductors and Nano Electronics Technologies. Previously, she worked at Air Liquide with an emphasis on CVD and ALD processes for semiconductor applications.

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List: 14-Apr-2015

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42nd Annual Symposium - Tuesday May 5th, 2015

Technical Program - Quick Guide

Session Room Chairs # Papers

Sessions 8:30 – 11:30 AM

Morning

A:RF and Microwave -

Innovations & Emerging Technologies - Part I

Seminar Tom TerlizziDr. Chandra Gupta 5

B:Advanced

Technologies for 2.5/3D Packaging

Colonial Maria DurhamKen Araujo 6

C:MEMS & Nano

Technology for UAV, Energy, Security &

Biomedical

Cotillion Dr. Parshant KumarDr. Latika Menon 6

D: SMT and Electronics Packaging Directors Michael Jansen

Tina Barcley 5

H: Posters(all day)

Exhibit HallPresenters:2:00 – 3:30 PM

Dr. Zhiyong GuDr. Rita Mohanty 8

Lunch Break – Exhibit Hall – 11:45AM – 1:30PM

Sessions 1:00 – 3:30 PM

Afternoon

E: Printed Electronics Colonial Craig ArmientoJames Zunino III 5

F:RF and Microwave -

Innovations & Emerging Technologies - Part II

Seminar Tom TerlizziDr. Chandra Gupta 4

G:Cu Wire and Advanced

Interconnect Technologies

Cotillion Mike McKeownBill Boyce 4

Exhibit Hall Open 9:00AM – 4:30PM 6


degradation by the silica/cobalt core/shell NPs appeared to be first-order with respect to the dyeconcentration. Initial pH of the dye solution is an important parameter, and acidic environment facilitated the degradation process. The degradation rate and efficiency increased with a decrease in initial pH of methyl orangesolution. At initial PH below 3.5, up to 99% of methyl orange can be degradated within 1 min. Adequatenanoparticle dosage is required to complete the dye treatment. Reductive degradation by the SiO2-Co core-shellnanoparticle catalyst is a very promising approach to the remediation of azo dye containing waste water due tothe fast degradation rate and high degradation efficiency.

“Development of Pb-free and Halogen-free Nanosolder-Enabled Solder Pastes”, Evan Wernicki1, F. Gao1,G. Morose 2, Z. Gu1 – 1 Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA; 2 Toxics Use Reduction Institute (TURI), Lowell, MA

When compared to their Pb-based counterparts, Pb-free solders and their associated higher melting temperaturesrequire higher processing temperatures and additional energy consumption during reflow operations. This can createreliability issues for electronic devices because of the increased thermal stresses. Due to the melting temperaturedepression that occurs in particles smaller than 25 nm, Pb-free nanosolder particles are strong replacementcandidates. Circuit board size constraints also points to nanosolders as promising materials with decreasing featuresizes in electronics assembly and packaging processes. This poster will provide research results for Pb-free andhalogen-free nanosolder enabled pastes for use in electronics assembly and packaging applications. Tin/silver (Sn/Ag) nanoparticles (Ag 3.5 – 5 wt. %) were synthesized using a surfactant-assisted chemical reduction method in an aqueous environment. The nanosolder particles were then characterized by SEM, TEM, XRD and DSC. Nanosolderpastes were prepared by mixing Sn/Ag nanoparticles with halogen-free flux of varying mass ratios.

Nanosolder pastes with as high as 85 wt. % have been printed and reflowed on Cu substrates with processes imitatingthose currently used in the electronics industry. In addition, composite pastes were prepared with commerciallyavailable micron-sized solders and as-prepared nanoparticles. As much as 5 wt. % Sn/Ag nanoparticles were addedto microsolders to form the halogen-free composite paste. Wettability and intermetallic compounds formed with thesubstrate have been studied as well.

“Deposition Characteristics and Electrical Properties of Silver and CNT Inks Deposited by Aerosol Jet”, Peter Lewis1,2, P. Kumar2, R.D. White2, B.R. Smith2 - Tufts University1,2, Medford, MA; Draper Laboratory2, Cambridge, MA

3D printing on the microscale has the ability to significantly reduce fabrication time of MEMS devices allowing for more innovation between design cycles. Another advantage provided is the conservation of material during printing. For example, instead of sputtering metal onto a surface and then removing the majority of it, direct and targeted deposition allows only the necessary metal to be printed onto the substrate. Specifically, aerosol jet printing allows the deposition of features and lines down to 10 um. This poster will focus on the physical and electrical properties of a silver ink and a carbon-nanotube (CNT) ink printed using aerosol jet deposition. The resistivity of the inks is analyzed for deposition of lines constructed from a varying number of passes of the printer. This method has been shown to achieve around 35x the bulk resistivity of silver itself. Interestingly, the resistivity appears to vary with the number of passes in which the line is deposited. The main plots shown on the poster will include resistivity vs. Ag/CNT inks for a defined structure and the effects of aging through baking at elevated temperatures. Aging in some cases has improved the electrical conductivity of the structure, potentially by baking out extra solvent and improving the sinter of the material.

Exhibits *** Exhibits *** Exhibits

Refreshments, Hors d’oeuvres,Raffles, & Fun

in the Exhibit Hall Until 4:30 PM31



Morning Technical Program – Session Chairs

Session Chair Chair

A:

RF and Microwave:

Innovations &Emerging

Technologies -Part I

Tom TerlizziVice President

GM Systems LLC

[email protected]

Dr. Chandra GuptaDir. Product

Development

Analog Devices

978 250-3343 [email protected]

B:Advanced

Technologies for 2.5/3D Packaging

Maria DurhamTechnical Spt. Engr.

Indium Corp.

315-853-4900 [email protected]

Ken AraujoArea Manager

NAMICS Technologies, Inc.

[email protected]

C:

MEMS & Nano Technology

for UAV, Energy,

Security & Biomedical

Dr. Parshant KumarTechnical Staff

Draper Laboratory

[email protected]

Dr. Latika MenonAssoc. Professor

Northeastern Univ.

[email protected]

D:SMT and

Electronics Packaging

Michael JansenPrincipal Mfg. Engr.

Textron Systems

[email protected]

om

Tina BarcleyCTO

TAS Consulting

[email protected]

H: Posters (all day)

Dr. Zhiyong Gu

Associate ProfessorDept. Chemical Eng.

Univ. Mass. Lowell

[email protected]

Dr. Rita MohantyDirector R&D

Enthone, Inc.

[email protected]

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concentration on percolation threshold were studied both experimentally and theoretically. It was found that the NW based paraffin nanocomposite has much lower percolation threshold compared to that of particle based paraffin composite. Furthermore, the alignment of particles and NWs under magnetic field significantly reduces the threshold of percolation. This work provides solid foundation for the development of a manufacturing technology for high thermal conductivity PCMs for thermal energy storage applications.

“Synthesis and Characterization of Novel Magnetic Core and Solder Shell Nanoparticles”, Edward Fratto, Y. Shu, F. Gao, Z. Gu – Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA

We present the results of a novel core/shell magnetic nanoparticle synthesis mechanism and subsequent application to localized, on-site, on-demand soldering applications. The electronics industry faces increasing pressure to decrease device size but increase functionality; as components enter the micro- and even nano-scale, new methods of solder attachment are becoming increasingly vital. Magnetic iron oxide nanoparticles coated with solder material can be directed via magnetic field to targeted locations with greater precision than any current industrial technique. The shell of the proposed structure is composed of tin-indium solder which melts at temperatures below its eutectic point of 118 ºC; this is an important consequence of the nanomaterial’s large surface area to volume ratio and unique surface properties. Given recent steps to phase out lead-tin solder (due to health concerns of lead), a gap has been created in the electronics industry where lead-free solders have been used but with less reliability and more uncertainty. These lead-free solders require not only higher processing temperatures (around 250-260 ºC) but also make the final devices more susceptible to external stress. We propose the new solder material to enable soldering at more reasonable processing temperatures using a green-chemical approach. The synthesis of the iron oxide core and subsequent solder deposition are run with water-based reduction chemistry without toxic organics. Similarly, the final product uses a halogen-free flux material and requires less overall energy to solder than the current lead-tin standard of the industry. Detailed herein are the essential synthesis steps and subsequent characterization of the material.

Keywords: core/shell nanoparticles, solder, magnetic, synthesis, self-assembly, green electronics

“A Fiber Optic Ultrasound Transducer for Biomedical Ultrasound Imaging Applications”, Nan Wu, J. Zhou, X. Wang – Dept. of Electrical and Computer Eng., Univ. of MA Lowell, Lowell, MA

This poster presents the design, fabrication and characterization of a fiber optic ultrasound transducer based on photoacoustic (PA) ultrasound generation principle for biomedical ultrasound imaging applications. A novel material, gold nanocomposite, was synthesized by directly reducing gold nanoparticles within polydimethylsiloxane (PDMS) through a one-pot protocol. A chicken wing was used as the biomedical ultrasound imaging target. The fiber optic ultrasound transducer was fabricated by coating the gold nanocomposite on the tip of an optical fiber. A hydrophone was used as the fiber optic ultrasound receiver. The ultrasound images were obtained by scanning the transducer mechanically. This poster demonstrates the ultrasound imaging capability of the fiber optic ultrasound transducer by using a chicken wing target.

"Synthesis and Catalytic Properties of Silica-Cobalt Core-Shell Nanoparticles”, Yan Zhang, F. Gao, Z. Gu –Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA

As one of the most widely studied hybrid nanostructures, core-shell nanoparticles are attracting more and moreattention, since properties arising from either core or shell materials can be quite different. Currently, core-shellnanoparticles have been used for many applications, including catalysis, environmental remediation, informationstorage, biomedical imaging, and energy harvesting. The aim of this work is to synthesize precisely controlled silica-cobalt (SiO2-Co) core-shell nanoparticles for catalytic applications. The core material of SiO2 nanoparticles hasbeen synthesized by the Stöber method with an average size of 85 nm. Then, the SiO2 nanoparticles weresubjected to surface modification with 3-aminopropyltrimethoxysilane. The Co shell with controlled thickness wasformed by a chemical reduction method. The size and morphology of the SiO2-Co core-shell nanoparticles havebeen characterized by the field emission scanning electron microscopy (FE-SEM) and transmission electronmicroscopy (TEM). The SiO2- Co core-shell nanoparticle has been used as a catalyst to degrade methylorange, a common azo dye containing azo functional group (-N=N-). The degradation characteristics and kineticswere investigated by measurement of the absorption of the dye solution with a UV/Vis spectrometer. Kineticstudies revealed that both the surface adsorption and degradation contributed to the absorption spectra and the MO

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Afternoon Technical Program – Session Chairs

Session Chair Chair

E: Printed Electronics

Dr. Craig Armiento

Prof. & Dir. PERC

Univ. Mass. Lowell

[email protected]

James Zunino III

ARDEC Project Officer

US Army

973-724-6773James.L.Zunino.civ@mail

.mil

F:

RF and Microwave:

Innovations &Emerging

Technologies -Part II

Tom TerlizziVice President

GM Systems LLC

[email protected]

Dr. Chandra GuptaDir. Product

Development

Analog Devices

978 250-3343 [email protected]

G:Cu Wire and Advanced

Interconnect Technologies

Mike McKeown

Regional Sales Mgr.

Hesse-Mechatronics

516-353-6285michael.mckeown@hesse-

mechatronics.us

Bill Boyce

Packaging & Process Engr.

WBoyce Consulting

[email protected]

om

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a phase change material, how to design a highly efficient and cost-effective heat sink is really a challenge or even critical to the success of this type of application. In this investigation, a heat sink filled with paraffin wax was built and tested under transient heating loads. The efficiency of heat sink was studied via selecting its different inner structures. Testing results have shown that the difference between copper and aluminum as material of inner structures or fins on the performance of heat sink was negligible. Reducing the porosity of inner structures of heat sink can significantly enhance its performance especially under a transient heating load. Different types of metal foam as inner fins were investigated via testing. Experimental results have demonstrated that there is the longest length of heat penetration related to a certain transient heating load. Otherwise extra phase change materials such as paraffin wax are no help for the absorption of energy or without responses due to their poor thermal conductivity. Numerical simulation in Ansys Icepak was also performed and its results were compared with experimental results. Optimization of the design of newphase change material heat sinks based on modified models was recommended. Ansys mechanical was also used to investigate the expansion of wax on the structure of case/box of phase change material heat sink.

Session H: Poster Papers Chaired by Dr. Zhiyong Gu (University of MA Lowell) & Dr. Rita Mohanty (Enthone)

In Exhibit Hall – All Day Authors Review: 2:00 – 3:30 PM

“Robots, Robots Everywhere”, Scott Mazur – Benchmark Electronics – Nashua, NH

“Robots, Robots Everywhere” poster will detail robotics in manufacturing given their historical influence with SMT equipment, and various industries such as automotive manufacturing. Also discussed will be the advancement of Robotics in various technology sectors such as the military, medical, industrial, commercial and advanced robotics such as flying robots. With each Robot is the initial manufacturing process, details will be provided of the key attributes for a successful robotics manufacturing and validation process.

“Structural Characterization and Phase Behavior of Sn/In Nanosolders at Elevated Temperatures”, Yang Shu1,T. Ando2, Z. Gu1 – 1 Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA; 2 Dept. of Mech. & Industrial Eng., Northeastern University, Boston, MA

Low temperature soldering is required in many electronics manufacturing processes, such as flexible electronics, assembly and packaging of thermal sensitive components (e.g., LEDs). Because of the potentially low melting temperatures caused by melting temperature depression phenomenon of the nanomaterials, nanosolders have been proposed for enabling new soldering applications. Studying the phase diagrams of nanoparticles composed of solder materials is important in understanding the relationship of their melting temperatures and compositions. Coupled with structural characterization, complete structure-property relationship may be obtained, which can provide useful information on the phase evolution in the nanoscale and soldering processing conditions. Herein, we report the phase evolution of Tin/Indium (Sn/In) nanosolder particles at different elemental compositions and various temperatures. The Sn/In nanosolder particles were synthesized by a surfactant-assisted chemical reduction method in ambient conditions. They were heated up to different temperatures (still below their melting temperatures). XRD was used to determine the structures of the phases present at different compositions and temperatures, and DSC was used to measure the phase transition temperatures. The phase evolution of the Sn/In nanosolders leads to new understanding of the phase transition phenomena in a nanosystem, which provides important information for their low temperature soldering applications.

“Magnetically Assembling Nanoscale Metal Network into Phase Change Material – Percolation Threshold Reduction in Paraffin Using Magnetically Assembly of Nanowires”, Junwei Su1, X. Liu1, F. Gao2, I. Mirzaee1, M. Charmchi1, Z. Gu2, H. Sun1 – 1 Dept. of Mechanical Eng., 2 Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA

A high throughput manufacturing process to magnetically assembling nanowire (NW) network into paraffin was developed for enhancing conductivity in phase change materials (PCMs) used in energy storage applications. The prefabricated nickel NWs were dispersed in melted paraffin followed by magnetic alignment under a strong magnetic field. Measuring electrical and thermal conductivity of the nanocomposite, as well as observing cross section of the sample slice under an optical microscope characterized the alignment of NWs. As a comparison, nickel particles (NPs) based paraffin nanocomposites were also fabricated, and its electrical and thermal conductivity with and without applied magnetic field were measured. The effects of aspect ratio of fillers (particles and NWs) and volume

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Morning Session Seminar Room

8:30 – 11:05Session A: RF and Microwave - Innovations & Emerging

Technologies - Part ITom Terlizzi & Dr. Chandra Gupta – Co-Chairs

8:30 “Surface Mount Multi-Layer Ceramic Capacitors for RF Power Applications”, JohnRogers, P. Coppens, E. Bershadsky – Vishay Intertechnology Inc., Shelton, CT.

8:55 "Contract Manufacturing for the RF Microwave World”, Jim Morgan – SemiGen,Manchester, NH

9:20 "Nonlinear Effects in Active Phased Array System Performance”, Dr. Larry Williams –ANSYS Corporation, Irvine, CA

9:45 – 10:15 Coffee Break in the Exhibit Hall

10:15"Designing and Building Microwave Circuits in LTCC”, Prakash Bhartia, A. Mathur – Natel Engineering Co., Inc., Chatsworth, CA; D. Nair, J. Parisi, K. Souders - DuPont Electronics, RTP, NC

10:40"100nm GaN on Si: A Pioneering Technology to Enable High RF Power in Millimeter Wave Bands”, Dr. Fabien Robert – OMMIC, France, Speakers: Tom Terlizzi / Dr. Fabien Robert

11:45 – 1:30 Lunch & Keynote in the Exhibit Hall

Afternoon Session Seminar Room

1:00 – 2:40

Session F: RF and Microwave - Innovations and Emerging Technologies - Part II

Tom Terlizzi & Dr. Chandra Gupta – Co-Chairs

1:00“Advanced Packaging Concepts for Manufacturing”, Dr. Hormazdyar (Homi) Dalal –Analog Devices Inc., Chelmsford, MA

1:25 “Ametek Electronic Packaging S-Bend Ceramic Feedthrough”, Ken McGillivray – Ametek,New Bedford, MA

1:50“Liquid Crystal Polymer Substrates to Enable Advanced RF and Medical Applications”, Susan Bagen – Micro Systems Technologies, Inc., Mesa, AZ; E. Bihler, M. Hauer, D. Schulze -Dyconex AG, Switzerland

2:15 “Projection Welded Hermetic Ring Seals – At the Intersection of Physics and Electronic Packaging Technology”, Tom Salzer – Hermetic, Inc., Bedford, MA

3:00 Refreshments & Raffles in the Exhibit Hall

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Silver may not work for all applications but it can certainly help support many application areas where cost and performance define a product. Silver wire usage is expected to increase in the next few years in both the LED and semiconductor industry.

1:25 – 1:50 PM Cotillion Room

“Physical RF Circuit Techniques and Their Implications on Future Power Module and Power Electronic Design”, Adam Morgan – NCSU, Raleigh, NC

Power module design, now more than ever, is being thrust forward into the realm of high frequency, specifically the lower end of the RF (radio frequency) spectrum (3kHz to 100MHz). The rise of wide-band gap (WBG) semiconductors, such as SiC and GaN, has accelerated the desire to shrink the volumetric size and weight of end applications that utilize power circuits and power modules containing this WBG technology in order to drive down cost and boost overall efficiency. Applications range from DC-DC converters and power inverters to medical equipment, military radar, and satellite communications. Therefore, it is essential that power package design becomes heavily integrated with the power circuit design on all levels in order to achieve optimum results. This means lowering parasitic effects that are capable of degrading operation efficiencies when high frequency switching is present.

The goal of this project is to examine physical RF circuit design techniques, such as the use of strip lines, ground planes, co-planar wave-guides, and types of faraday cage structures, and then study their power loss performance when used under voltage and current conditions typical of WBG power electronics. These RF techniques help support transverse electro-magnetic (TEM) mode propagation of waves along a conductor, and are therefore essential for low-loss performance. 3D CAD models of these RF topologies are developed in forms typical of current generation RF circuits, along with new forms that may prove suitable within a WBG power module or power electronic system. Next, electromagnetic simulations are performed on these models to analyze the electric fields and magnetic fields that occur within each topology over a range of frequencies. Power losses for each layout are then extracted and compared in order to understand which RF TEM mode geometries, if any, prove promising in power module and power electronic design for high frequency applications.

Keywords: high frequency, power electronics, power module, RF, wide-band gap


“Accelerating Reliability Assessment with Multi-Oven Racks and Sensor Chips for Wire Bonds”, Michael Mayer – J. Gomes, University of Waterloo, ON, Canada

A multi-rack multi-oven system has been developed for the non-destructive reliability testing of hundreds of wire bonds. The system relies on 10 mini-ovens in each rack, allowing for simultaneous multiple temperature testing, and it relies on sensor chips that provide precise non-destructive data for bond quality of Au, Cu, or Ag wire bonds, recorded every few seconds. The system includes analytical equipment and software to automatically switch between hundreds of microsensors placed next to wire bonds, and record data for weeks and months. The system can also measure contact resistance of bonds.

Example results are presented involving varying aging temperatures, ball bond geometries, and bonding wire materials. Findings from the sensor chip signals include for example the slowing of Au bond aging at 200 C when the bonded ball height is increased. For this, sets of ball bonds were made with deformed ball diameter of 56 micron and bonded ball heights varying between 12 and 16 microns with critical aging times found to be 200 h and 232 h, respectively, their difference being statistically significant. This means the higher bond height resulted in a ~15 % longer life.


“Enhancement of Transient Heat Transfer of Phase Change Material for Electronics Cooling and Energy Storage”, Shibin Liang – Aavid Thermalloy, Laconia, NH

Applying phase change materials in heat sinks to absorb transient or intermittent heating load from electronics especially moveable devices has attracted attentions of many engineers and researchers. In the application of energy storage, phase change materials are also widely recognized and applied. Because of the poor thermal conductivity of

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Morning Session Colonial Room

8:30 – 11:30 Session B: Advanced Technologies for 2.5D/3D PackagingMaria Durham & Ken Araujo – Co-Chairs

8:30 “TSV Impact on Chip Package Interaction for 20nm Silicon”, Sukeshwar Kannan, S.Gao, R. Agarwal, D. Smith, L. England – GLOBALFOUNDRIES US Inc., Malta, NY

8:55 “Epoxy Underfill Challenges for Copper (Cu) Pillar Solder Bump Packages”, B.Schmaltz, Y. Abe, K. Kohara – NAMICS Technologies, San Jose, CA; Speaker: Ken Araujo

9:20“Ultralow Residue (ULR) Semiconductor Grade Fluxes for Flip-Chip and MEMs Applications”, Maria Durham, S.P. Lim, J. Chou, Dr. A. Mackie – Indium Corporation, Clinton, NY


10:15 “Void Reduction and Elimination for Reflow & Curing Processes”, Tom Nash – Heller Industries, Florham Park, NJ

10:40 “Cost Structure Advantages of 2.5D Integration”, Javier DeLaCruz – eSilicon Corporation, San Jose, CA

11:05 “Glass Enabled Systems Integration”, Jeb Flemming – 3D Glass Solutions, Albuquerque, NM


Afternoon Session Colonial Room

1:00 – 3:05Session E: Printed Electronics

Craig Armiento & James Zunino III – Co-Chairs

1:00“3D Printed Electronics Functionalizing Smart Devices which are Empowering the Industrial Internet of Things”, Mike O’Reilly – Optomec, Inc., Albuquerque , NM

1:25 “Flexible, Printed Electronics for Sensing and Energy Storage”, Dr. Erik Handy – SI2 Technologies, North Billerica, MA

1:50 “Reconfigurable Printed Phased Array Antennas”, Alkim Akyurtlu – University of Massachusetts Lowell, Lowell, MA

2:15 “Printing Functional Materials”, Dr. Scott Slimmer – Harvard School of Engineering and Applied Sciences, Cambridge, MA

2:40“Additive Manufacturing and Integration of Electronics for Military Systems and Applications”, James L Zunino III – US Army RDECOM, Picatinny Arsenal, Rockaway Township, NJ


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2:15 – 2:40 PM Seminar Room

“Projection Welded Hermetic Ring Seals – At the Intersection of Physics and Electronic Packaging Technology”, Tom Salzer – Hermetic, Inc., 24 Dunelm Rd, Bedford, MA

During the previous 75 years, resistance projection welding was the process of choice for hermetic sealing of semiconductors, RF modules, electro-optics and related devices. It has fallen out of favor with increased competition from other processes such as laser, parallel seam, brazing, soldering, etc. Yet, with all the technologies that currently compete in the sealing arena, we will demonstrate that projection welding is still an undisputed leader. The process began with the mass production of smaller parts such as TO-18 and TO-5 packages. These smaller parts could be welded with moderately powered equipment such as single phase AC welders or capacitor discharge equipment. For welding larger packages such as TO-3 components, much more robust and expensive equipment was required. This larger and more costly equipment was not considered a good investment for any but the largest manufacturers. In the 1960s industry began to search for alternative methods and processes to seal larger packages. In those days, it was assumed that larger welds required increased weld current. It has only been in the 21st century that it became clear that for sealing larger packages, more weld current was not nearly as important as lower welder impedance. This discovery has resulted in the development of a new class of weld sealing equipment. All resistance welding owes its technology to its inventor, Elihu Thompson who received a patent for the process in 1887. Since then, the most important application for the resistance welding process has been the welding of automobiles, and the overwhelming amount of research and production of equipment has been directed to this end. Depending on who you believe, the resistance of a typical automotive weld is about 200-400 micro-ohms, and for a number of reasons, this resistance has been considered the target impedance for all welding equipment. What we learned through our work is that the impedance of larger ring welds, can be roughly an order of magnitude lower than 200-400-micro-ohms. This discovery has provided the insight to develop a new class of welding equipment whose performance is more closely matched to the requirements of lower impedance welds. By matching the requirements of a welding machine with the requirements of the weld, we have significantly reduced the cost and increased the performance of the equipment. This article, will illustrate some results of our manufacturing experiences on a number of hermetic products.

Session G: Cu Wire and Advanced Interconnect TechnologiesChaired by Mike McKeown (Hesse-Mechatronics) & Bill Boyce (WBoyce Consulting)Cotillion Room - 1:00 PM – 3:05 PM


“Critical Barriers Associated with Copper Wire”, William (Bud) Crockett Jr. – Tanaka, San Francisco Bay Area, CA

The market potential for copper bonding wire is significant as IC and package designers look to reduce costs and address a number of significant interconnect challenges associated with copper bonding wire. Palladium Copper bonding wire was introduced to the industry back in 2008. Palladium copper bonding wire migration is cost savings, with secondary focus for performance and reliability improvement. The critical barriers in fine pad pitch applications associated with bare copper wire such as 2nd bond instability (NSOL), short tails, limited shelf/bonder life (wire oxidation) and high temperature/humidity reliability have been solved with the development of a Palladium coated copper bonding wire. As a result of the maturity of Palladium copper wire, some process and design limitations have been confirmed such as harder FAB (free air ball), fine pitch process issues, capillary life and advanced bonding techniques. An improvement and solution is a silver bonding wire which has been introduced as an alternative wire to overcome the limitations of the copper wire.

The advantage of switching from copper wire to silver wire is that silver wire meets ball bonding performance requirements, soft FAB and comparable loop formations while maintaining productivity requirements of other alternative bonding wires. Silver bonding wire has good elongation and breaking load properties and silver wire is ductile like gold wire with nonexistent ‘work-hardening’ process issues like copper wire.

It is relatively easy to switch from gold wire and copper wire since silver wire only requires safe and inexpensive nitrogen gas. Also silver wire has similar level of productivity as gold wire and sufficient second bond adhesion under almost the bonding conditions as gold wire. Silver wire shows good potential as it offers several advantages compared to bare copper and palladium coated copper wires; mainly, acceptable bonding performance and reliability.

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Morning Session Cotillion Room

8:30 – 11:30Session C: MEMS and Nano Technology for UAV, Energy,

Security and BiomedicalDr. Parshant Kumar & Dr. Latika Menon – Co-Chairs

8:30 “Aerodynamic Testing of MEMS Surface Sensors”, Robert D. White – Tufts University,Medford MA

8:55 “Optical Leak Testing of Small Devices – OLT Technology”, Tom Trafford – NorCom Systems Inc., Norristown, PA

9:20 “ZnO and Related Nanostructures for Electronics and Photonics”, Mehdi Anwar –University of Connecticut, Storrs, CT


10:15 “One-Dimensional Nanostructures for Energy and Electronics Applications”, Latika Menon – Dept. of Physics, Northeastern University, Boston, MA

10:40 “Advanced Fault Isolation for Microelectronic Packaging Yield and ReliabilityEnhancement”, David P. Vallett – PeakSource Analytical, LLC, Fairfax, VT

11:05“Fabrication and Application of A Novel Electrochemical Sensor based on Pt NanowireArray Coated with Au Nanoparticles”, Zhiyang Li, C. Leung, F. Gao, and Z. Gu – University of Massachusetts Lowell, Lowell, MA


Afternoon Session Cotillion Room

1:00 – 2:40

Session G: Cu Wire and Advanced Interconnect Technologies

Mike McKeown & Bill Boyce – Co-Chairs

1:00 “Critical Barriers Associated with Copper Wire”, William (Bud) Crockett Jr. – Tanaka,San Francisco Bay Area, CA

1:25 “Physical RF Circuit Techniques and Their Implications on Future Power Module and Power Electronic Design”, Adam Morgan – NCSU, Raleigh, NC

1:50 “Accelerating Reliability Assessment with Multi-Oven Racks and Sensor Chips for Wire Bonds”, Michael Mayer – J. Gomes, University of Waterloo, ON, Canada

2:15 “Enhancement of Transient Heat Transfer of Phase Change Material for Electronics Cooling and Energy Storage”, Shibin Liang – Aavid Thermalloy, Laconia, NH


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techniques. Most tools make use of ‘Data Control’ to some degree; a tool designed with proper Data Control, robotics and optical or laser controls, produces higher synergy in production and thereby, lowest cost of yielded product.

A pragmatic approach to analysis of advanced packaging technologies to meet the future needs of commercial products will be presented.


“Ametek Electronic Packaging S-Bend Ceramic Feedthrough”, Ken McGillivray – Ametek, New Bedford, MA

This is a technical presentation of Ametek Electronic Packaging's introduction of a novel high speed ceramic interconnect design (Ceramic Feedthrough) to achieve higher bandwidth signal performance in hermetic packages. Ametek's design, referred to as an "S-Bend Ceramic Feedthrough" provides a smooth, uninterrupted RF signal path from the wirebond shelf inside the package down to the printed wiring board outside the package without 90 degree via transitions. Superior performance at operating frequencies up to 80 GHz (and higher) can be achieved. This design may be applied to hermetic package applications requiring compact interconnect separation of 0.050 inch and smaller, as compared to larger SMP and SSMP designs. Vertical signal paths (0.01 to 1 inch height) connecting the internal RF devices with the external printed wiring board can be accommodated, providing a solution for mismatched "device height" to "board height" design scenarios. Ametek's "S-Bend Ceramic Feedthrough" provides a high frequency interconnect advantage by eliminating 90 degree transitions ("vertical vias" and "stair-step vias") through a package wall as compared with the "related art" disclosed in United States Patent No. 8,933. The S-Bend design eliminates the RF reflection caused by 90 degree via transitions. A bandwidth performance increase is achieved as the result of the reduced reflection coefficient (no via transitions) and the related benefits of reduced return loss and reduced transmission loss. The S-Bend Ceramic Feedthrough design may be applied to package applications utilizing HTCC as well as LTCC ceramic package manufacturing technologies.


“Liquid Crystal Polymer Substrates to Enable Advanced RF and Medical Applications”, Susan Bagen – Micro Systems Technologies, Inc., Mesa, AZ; E. Bihler, M. Hauer, D. Schulze - Dyconex AG, Switzerland

Liquid Crystal Polymer (LCP) has unique properties as compared to conventional dielectric materials, which enable its use for a range of advanced applications including RF microwave and implantable medical devices. LCP is lightweight as compared to ceramic materials, and has superior and stable electrical and mechanical characteristics across very high frequencies up to 100 GHz. Due to the very low water absorption of LCP, these properties remain nearly constant upon exposure to moisture, classifying the material as near-hermetic.[1.2] LCP is highly chemically inert, and biocompatible for direct implant into the human body.[3] While most conventional dielectric materials are thermosets, LCP is a thermoplastic which poses challenges to producing complex multilayer substrates and unique structures such as cavities and long leads. A thorough understanding of LCP material behavior under lamination processing conditions is critical to fabrication of reliable substrates. In addition, for long-term implantable medical applications, noble metal conductors must be used in lieu of potentially toxic copper and nickel, while knowledge of appropriate processing chemistries is necessary to assure biocompatibility of the final product.This paper will present results of advanced LCP processing development to establish fabrication capabilities of complex substrates for RF microwave applications as well as structures for directly implantable medical technologies. Examples of RF substrate designs are complex multilayer stackups that include cavity structures for bonding of high power die directly to heat sink materials. Multilayer structures of LCP with noble metal conductors for biocompatible medical implants are also discussed.

References:[1] A. Pham, "Liquid Crystal Polymer for Microwave and Millimeter-wave Multilayer Packages and Modules," IEEE Microwave Conference (EuMC), Paris, France, September 2010, p. 352.[2] D. Thompson, et al., "RF Characteristics of Thin Film Liquid Crystal Polymer (LCP) Packages for RF MEMS and MMIC Integration," Microwave Symposium Digest, 2005 IEEE MTT-S International.[3] D. Schulze and R. Toelke, "Noble Metal PCB Manufacturing for Direct Implants," The PCB Magazine, November 2014, pp. 12-20.

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Morning Session Directors Room

8:30 – 11:05 Session D: SMT and Electronics PackagingMichael Jansen & Tina Barcley – Co-Chairs

8:30 “An Overview of IPC Plating Specification Completions, Revisions and Future Plans”, George Milad – Uyemura International Corp., Southington, CT

8:55 “Solder Fatigue in Tin-Lead and Silver-Tin-Copper (ROHs) Solders”, Tina Barcley – TAS Consulting, Rochester, NY

9:20 “A Thermally Functionalized Structural Material for Heat Spreading in Handheld Devices”,Aaron Vodnick, R. Willis, J. Kaiser – Materion Technical Materials Inc., Lincoln RI


10:15 “Electromagnetic Compatibility Testing in an All-Electric Vehicle”, Lennart E. Long, Stephen W. Sauter, C.R. Edelson – LenLong and Associates, Inc., Waltham, MA

10:40 “The Future of Solder Joint Encapsulant”, Dr. Wusheng Yin – YINCAE Advanced Materials, LLC, Albany, NY


Exhibit HallSession H: Poster Session - Viewing All DayDr. Zhiyong Gu & Dr. Rita Mohanty – Co-Chairs

Authors Review 2:00 PM – 3:30 PM“Robots, Robots Everywhere”, Scott Mazur – Benchmark Electronics – Nashua, NH

“Structural Characterization and Phase Behavior of Sn/In Nanosolders at Elevated Temperatures”, Yang Shu1,T. Ando2, Z. Gu1 – 1 Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA; 2 Dept. of Mech. & Industrial Eng., Northeastern University, Boston, MA

“Magnetically Assembling Nanoscale Metal Network into Phase Change Material – Percolation Threshold Reduction in Paraffin Using Magnetically Assembly of Nanowires”, Junwei Su1, X. Liu1, F. Gao2, I. Mirzaee1, M. Charmchi1, Z. Gu2, H. Sun1 – 1 Dept. of Mechanical Eng., 2 Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA

“Synthesis and Characterization of Novel Magnetic Core and Solder Shell Nanoparticles”, Edward Fratto, Y. Shu, F. Gao, Z. Gu – Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA

“A Fiber Optic Ultrasound Transducer for Biomedical Ultrasound Imaging Applications”, Nan Wu, J. Zhou, X. Wang – Dept. of Electrical and Computer Eng., Univ. of MA Lowell, Lowell, MA

"Synthesis and Catalytic Properties of Silica-Cobalt Core-Shell Nanoparticles”, Yan Zhang, F. Gao, Z. Gu –Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA

“Development of Pb-free and Halogen-free Nanosolder-Enabled Solder Pastes”, Evan Wernicki1, F. Gao1,G. Morose 2, Z. Gu1 – 1 Dept. of Chemical Eng., Univ. of MA Lowell, Lowell, MA; 2 Toxics Use Reduction Institute (TURI), Lowell, MA

“Deposition Characteristics and Electrical Properties of Silver and CNT Inks Deposited by Aerosol Jet”, Peter Lewis1,2, P. Kumar2, R.D. White2, B.R. Smith2 - Tufts University1,2, Medford, MA; Draper Laboratory2, Cambridge, MA

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2:15 – 2:40 PM Colonial

“Printing Functional Materials”, Dr. Scott Slimmer – Harvard School of Engineering and Applied Sciences, Cambridge, MA

The ability to pattern functional materials in planar and three-dimensional forms is of critical importance for several emerging applications, including flexible electronics and photovoltaics, lightweight structural materials, and tissue engineering. Direct-write assembly enables one to rapidly design and fabricate materials in arbitrary forms without the need for expensive tooling, dies, or lithographic masks. Recent advances in the direct-write assembly of viscoelasticinks will be highlighted, including 3D printing of microbatteries, soft stretchable sensors, wearable electronics, pen-on-paper electronics, electrodes for flexible photovoltaics and conformal 3D antennas, printed origami metallic andceramic structures, 3D hydrogel scaffolds, and vascularized cell-laden tissue constructs. Ongoing efforts to enable high-throughput printing of large-scale architectures will also be described.

2:40 – 3:05 PM Colonial Room

“Additive Manufacturing and Integration of Electronics for Military Systems and Applications”, James L Zunino III – US Army RDECOM, Picatinny Arsenal, Rockaway Township, NJ

Recent advances in additive manufacturing have enabled the U.S. Army to design and develop numerous new processes and applications for munitions and weapons systems. Researchers at the Army's Research Development and Engineering Command (RDECOM) are working to ensure that U.S. forces continue to operate from a position of overwhelming military advantage. Additive manufacturing, including printed electronics, has allowed revolutionary changes in design, materials, and fabrication of components and sub-systems for numerous military applications. Integrating printed electronics onto/into structures and hybrid devices is shaping how the Army designs, fabricates, integrates, manufactures, and tests Fuzes, Munitions, Antennas, Power Solutions, and other systems. These capabilities are helping the Department of Defense (DoD) and its strategic partners to capitalize on these technological breakthroughs and to develop systems that are "smarter," more rapidly deployable, lighter and smaller. The current state-of-the-art and future concepts pertaining to printed technologies within the US Army will be presented.Applications and highlighted progress of several DoD and Government programs will be addressed, including printed electronics, hybrid devices, materials, and integration of printed electronics & 3D printed structures for initiation systems, antennas, sensor systems, and prognostics & diagnostics. These advances will optimize existing systems, develop new systems, and allow the DoD to maintain their decisive edge.

Session F: RF and Microwave - Innovations & Emerging Technologies - Part IIChaired by Tom Terlizzi (GM Systems) & Dr. Chandra Gupta (Analog Devices)Seminar Room - 1:00 PM – 2:15 PM


“Advanced Packaging Concepts for Manufacturing”, Dr. Hormazdyar (Homi) Dalal – Analog Devices Inc., Chelmsford, MA

IC package manufacturing spans from micro miniature implants to Peta-flops supercomputer; the common theme is smaller, lighter, cheaper and performance compliant products. There is a myriad of factors affecting these four driving forces; however, single most important controlling factor is ‘Interconnection’; whether it is on-chip, between chips, to board, between boards or between systems. IC packaging has so far mostly used electrical interconnects; wire bond, solder bumps, copper pillars, thin film interconnects and Through Silicon Vias (TSV) are used in first level packaging; Pin Through Holes (PTH), Surface Mount Technology (SMT) and Connectors are used in second level packaging. However, the increasing clock speed and wiring density inside systems require replacement of electrical interconnections with optical interconnections, just like the optical fiber which took over the task of long distance communications from electrical cables.

The second most important factor in IC packaging is ‘ process technology’; the same interconnect technology can be accomplished using different process technologies; for example, bumping can be achieved by ‘Parallel Processing’ like stencil printing or by ‘Discrete Processing’ like individual solder ball deposition technique. The low throughput of ‘Discrete Processing’ can be alleviated by the advancements in laser, optical and electro-mechanical (robotic)

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Exhibit HallVendor Exhibits – Open All Day !

iMAPS New England Chapter

Employment Center- Job Postings -

Located in the Registration Area

Please forward to:

Jeremy [email protected]

(978) 658-7274

Potential Employers - Please provide job postings as follows:

• In Microsoft Office or .pdf format• 1 posting per page• Try to limit the posting to a single page• Provide contact info on each posting for the applicant’s direct response

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Afternoon Technical ProgramSession E: Printed ElectronicsChaired by Craig Armiento (Univ. MA Lowell) & James Zunino III (US Army)Colonial Room - 1:00 PM – 3:05 PM


“3D Printed Electronics Functionalizing Smart Devices which are Empowering the Industrial Internet of Things”, Mike O’Reilly – Optomec, Inc., Albuquerque, NM

There are currently over 50 Billion connected industrial and mobile Smart Devices installed worldwide with annualgrowth predicted at >13 Billon new units per year. Connecting these devices together requires the widespread use ofboth sensors for data capture and antenna for communication of that data with systems and people that require accessto it. Sensors are finding their way into every aspect of the industrial sector be it low cost medical diagnostic devices orhigh value components such as turbine blades. Printing sensors in 2D or 3D, directly onto these target productsleveraging digitally driven sensor patterns enables mass customization and serialization. Similarly, the number ofantenna finding their way into and onto mobile and land based devices that come in many shapes and sizes areincreasing at a rapid rate. Lowering the costs associated with antenna manufacturing is a key industry driver marketdriver. Having the ability to print digitally created antenna on planar and non-planar low temperature substrates such aspolycarbonate enables lower manufacturing and equipment costs and improved antenna design. This presentationwill provide more details on Optomec’s Aerosol Jet manufacturing solutions for 3D sensors and antennas directlyprinted on preformed structures which are key components within the Industrial Internet of Things.


“Flexible, Printed Electronics for Sensing and Energy Storage”, Dr. Erik Handy – SI2 Technologies, North Billerica, MA

SI2 Technologies develops flexible/shape-conformal sensors and specialty RF structures (e.g., antennas). Thesecomponents may be incorporated into size-, weight-, power-, and cost-constrained vehicles, for example, or worn onthe body. We use a combination of conventional and digital manufacturing techniques in product development.Specifically, SI2 has considerable experience in the roll-to-roll, patterned deposition of functional inks (e.g.,conductors). These patterned inks are printed directly from an electronic drawing in an ambient environment; notooling, masks, etc. are required. Recently, we have begun developing printed components for wearable healthmonitoring sensors (e.g., to detect head trauma) and flexible, lightweight energy storage devices. This talk willprovide an overview of SI2’s printed electronics activities.


“Reconfigurable Printed Phased Array Antennas”, Alkim Akyurtlu – University of Massachusetts Lowell, Lowell, MA

This work presents a reconfigurable printed 1x4 rectangular patch antenna array at 10 GHz for two distinguishedfunctionalities. First, we investigate the effect of bending on the performance of this antenna array as a conformalantenna. Both convex and concave bending profiles are studied. The maximum gain of the array is reducedfrom the flat case level by 34.41% and 34.48% for convex and concave bending, respectively. The degraded gainis recovered using a novel tunable left handed transmission line (LHTL) phase shifter based on barium strontiumtitanate (BST)/polymer composite. Simulations indicate that the lost gain of the bent antenna array can berecovered by 63.8% and 68% for convex and concave bending, respectively. Second, we exploit this phaseshifter further to realize beam steering for the planar 1x4 patch antenna array, thus realizing a printed phased arrayantenna.

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Morning Technical ProgramSession A: RF & Microwave - Innovations & Emerging Technologies - Part IChaired by Tom Terlizzi (GM Systems) & Dr. Chandra Gupta (Analog Devices)Seminar Room - 8:30 AM – 11:05 AM

8:30 – 8:55 AM Seminar Room

“Surface Mount Multi-Layer Ceramic Capacitors for RF Power Applications”, John Rogers, P. Coppens, E. Bershadsky – Vishay Intertechnology Inc., Shelton, CT.

As a leading supplier of Multi-Layer Ceramic Capacitors (MLCC) for specialty applications, Vishay Intertechnology Inc. has developed a new series of surface mount ceramic capacitors for use in high frequency power applications. These temperature stable, high frequency capacitors are manufactured using a low loss COG dielectric material system and enhanced Noble Metal Electrode (NME) designs. The new QUAD HIFREQ series capacitors, herein referred to as QUAD have an optimized material system and electrode design to minimize Equivalent Series Resistance (ESR), and improve thermal conductivity which intern reduces power loss and MLCC surface temperature. The QUAD MLCC are available in 0505, 1111, 2525, and 3838 case sizes with extended voltage ratings up to 7.2 kVdc and capacitance range from 0.5 pF – 5100 pF.

The QUAD capacitors are benchmarked against leading competitor’s RF power MLCC. Electrical characteristics such as Series Insertion loss (S21), Equivalent Series Resistance (ESR) and Continuous Wave (CW) power loss are conducted. Most notable, Vishay’s QUAD ESR is 20 - 40 % lower than competitor’s, a significant factor improving overall thermal conductivity and power loss. Infrared temperature measurement on the MLCC surface is a good method to compare the capacitor’s power dissipation. Capacitors are connected in series with a 50 Ohm load, while 150 W of CW high frequency power is applied. With equal amounts of applied power, Vishay’s MLCC run 1.5 - 4 C cooler. The measurements presented in this paper show that QUAD capacitors are a new an exceptional alternative for high frequency power applications.


"Contract Manufacturing for the RF Microwave World”, Jim Morgan – SemiGen, Manchester, NH

The RF microwave world encompasses many facets of manufacturing. It holds true that the stigma of contract manufacturing is problematic when experiencing long lead times quality issues and delays with the inexperience that contract manufacturers have with semiconductor knowledge.

In this presentation SemiGen will explain how contract manufacturing is going to change and how we are the leaders in the landscape of adding quality inspection and knowledge of device integrity into the assemblies. We detail the challenges this presents and how to positively cultivate contract manufacturing as a plausible option for your manufacturing needs.


"Nonlinear Effects in Active Phased Array System Performance”, Dr. Larry Williams – ANSYS Corporation, Irvine, CA

Simulation of any modern, active-phased array systems will be impacted by the finite-sized array edge effects leading to uneven nonlinear operations for T/R module devices affecting the circuit-level implementation of quantized phase shifters on beam performance.

By including the antenna array, feed network and active power amplifiers that drive the elements, this webinar will examine how co-simulation using nonlinear RF circuit simulation using Harmonic Balance along with 3-Delectromagnetics can predict antenna radiation performance. Each element in the array is excited at a different power level to produce pencil- and shaped-beams, resulting in uneven gain compression among the power amplifiers. The analysis results illustrate this behavior and pattern degradation versus input overdrive is demonstrated. Finally, the

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compatibility. Conductive or radiated emissions may be caused by time varying currents, generated by any of the test vehicle subsystems.

There must be no unintended emissions identified that would pose a threat to the operation of vehicle subsystems, external non-vehicle systems or wayside neighbors. If these emissions exist, a costly system reengineering could result.

10:40 – 11:05 AM Directors Room

“The Future of Solder Joint Encapsulant”, Dr. Wusheng Yin – YINCAE Advanced Materials, LLC, Albany, NY

Solder joint encapsulant adhesives have been successfully used for many years by major electronics manufacturers to enhance the strength of solder joints. These products have proven to strengthen solder joints 5-10x over traditional methods, and have greatly improved thermal cycling during the soldering process as well as the drop performance in the finished products. The use of solder joint encapsulant adhesives can eliminate the need for underfill materials and the underfill process altogether, thus simplifying rework which results in a lower cost of ownership. Solder joint strength, however continues to be a problematic issue with increased package on package and system on package miniaturization.

Research tests were performed to compare the solder joint strength using flux in nitrogen reflow process versus solder joint encapsulant in air reflow process. Using flux in nitrogen the top PoP had a solder joint height of 11.85 mil with 0.9 mil warpage and 5.25% solder voids. In comparison, using solder joint encapsulant in air, the PoP had a solder joint height of 11.33 mil with 0.8 mil warpage and 2.93% solder voids. The pull strength of solder joint was 71 N using flux compared to 352 N using the solder joint encapsulant. The first thermal cycling failure was increased from 495 cycles using underfill to around 5000 cycles using the solder joint encapsulant. From the data it is evident that solder joint encapsulant provides a very promising solution for solder joint strength in the evolution of miniaturized electronic packaging. In this presentation we are going to discuss the details and future of solder joint encapsulant adhesives.

Lunch 11:45 – 1:30 PM in Exhibit Hall

Keynote Lunch Address “3D Technology Trends & Key Manufacturing Challenges”

Presented by Amandine Pizzagalli – Yole Développement

12:15 – 12:45 – Exhibits Hall

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presenters will demonstrate real-world, circuit-level effects of the finite quantization of the phase shifter, as well as installed performance on an aircraft.

9:45 – 10:15 Coffee Break in Exhibit Hall


"Designing and Building Microwave Circuits in LTCC”, Prakash Bhartia, A. Mathur – Natel Engineering Co., Inc., Chatsworth, CA; D. Nair, J. Parisi, K. Souders - DuPont Electronics, RTP, NC

This paper provides a short review of Low Temperature Co-Fired Ceramic (LTCC) in the design and development of Millimeter, Microwave and RF Circuits. The review is not intended to be comprehensive, but rather to provide information to capture the interest of current designers who have not been exposed to this substrate technology. The potential advantages and disadvantages of LTCC for microwave applications are discussed together with the characteristics of this medium and design rules. Recent advances in tape technology and the use of Laser ablation to obtain finer lines and spacings are presented. The later technology demonstrates significant potential in decreasing circuit size and extending the frequency range of operation for microwave and millimeter wave circuits and devices.


"100nm GaN on Si: A Pioneering Technology to Enable High RF Power in Millimeter Wave Bands”, Dr. Fabien Robert – OMMIC, France, Speakers: Tom Terlizzi / Dr. Fabien Robert

OMMIC, major European player in the development of III-V processes, epitaxy and MMIC manufacturing processes continues to improve its portfolio to address new applications of microwave power market space, military and civilian.

In order to expand its offering and offer power solutions for applications from 15 to 94GHz, OMMIC just introduced aprocess GaN on Si 100nm referred D01GH.

This all new power process has been specifically designed to address the microwave thanks to its 100GHz FT and180GHz F MAX. The VDD is 15V and the proposed power density of 3.3W / mm is three time higher than the equivalent gate length D01PH GaAs process.


Session B: Advanced Technologies for 2.5D/3D PackagingChaired by Maria Durham (Indium Corp.) & Ken Araujo (NAMICS USA)Colonial Room - 8:30 AM – 11:30 AM

8:30 – 8:55 AM Colonial Room

“TSV Impact on Chip Package Interaction for 20nm Silicon”, Sukeshwar Kannan, S. Gao, R. Agarwal, D. Smith, L. England – GLOBALFOUNDRIES US Inc., Malta, NY

Chip packaging interaction (CPI) has garnered tremendous interests in advanced technology nodes mainly due to the introduction of low-K (LK) and ultra-low-K (ULK) material in the back end of line (BEOL) and Cu pillar in chip-package interconnect [1]. In addition to these advances in the silicon technology nodes emerging packaging integrating solutions like 3D integration using through silicon via (TSV) technology are expected to pose additional CPI challenges and risk due to new process flow and materials used. This paper presents GLOBALFOUNDRIES’s activity in CPI study on 3D 20nm silicon which includes CPI test structure design, BEOL process control and characterization, and assembly process optimization and reliability tests. The key CPI challenges/risks were identified, analyzed and mitigated through DOE studies.

As with standard 2D flipchip packaging, warpage due to overmolding plays a crucial part in overall CPI reliability for 3D packages as well. Experiments were completed with various encapsulating mold compounds (EMC), molding configuration, and top die thickness to minimize package warpage. Package level reliability evaluation was performed on all DOE splits, with results clearly showing that an exposed top die solution is optimum for warpage control. In

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compared to 352 N using the solder joint encapsulant. The first thermal cycling failure was increased from 495 cycles using underfill to around 5000 cycles using the solder joint encapsulant. From the data it is evident that solder joint encapsulant provides a very promising solution for solder joint strength in the evolution of miniaturized electronic packaging. In this presentation we are going to discuss the details and future of solder joint encapsulant adhesives.


“Solder Fatigue in Tin-Lead and Silver-Tin-Copper (ROHs) Solders”, Tina Barcley – TAS Consulting, Rochester, NY

Solder fatigue damage is a creep phenomenon. It can be caused by large or small temperature deltas, power cyclingand low power standby modes. For solder fatigue caused by drastic temperature changes, matching thermal coefficients assures meeting military specifications. However, it can cause non-representative material concerns. For industries where power cycles and/or smaller temperature variations; the damage is due to cyclic warpage or increased cyclic strains on the solder joints. These deformations and strains are in-plane shear strains. Both of these phenomena can be calculated analytically or experimentally reproduced. However, if not analyzed or tested correctly, the in-plane stresses and strains are likely to underestimate the “effective strain” on the solder joints by 25%.

While all the above is true for both tin-lead and silver-tin-lead solders, there are other differences that are due to the material composition differences in the ROHs silver-tin-lead solders. It is generally accepted that high Ag SAC alloys (SAC305/405) have good thermal fatigue resistance and actually perform better than the popular SnPb solders. However, in environments where drop shocks are involved, failures are more common.

This paper will show why the differences occur and how to analyze both large and small temperature delta environments, as well as power cycling and standby modes.


“A Thermally Functionalized Structural Material for Heat Spreading in Handheld Devices”, Aaron Vodnick, R.Willis, J. Kaiser – Materion Technical Materials Inc., Lincoln RI

New Technology for clad metals will be described which enables thermal functionalization of structural componentsfor use as thermal management materials in consumer and handheld devices. By selectively replacing under-utilized structural space with highly conductive materials, thermal heat spreading performance in these devices can be substantially improved. A new composite material system utilizing conventional metals will be presented toserve both structural and heat spreading purposes, utilizing high stiffness stainless steel skins clad over a lowdensity, highly conductive Aluminum 1100 core. This configuration melds the best properties of each material,creating a fully formable composite structure with excellent mechanical (153 GPa bending modulus) and bulkthermal transport properties (160 W/mK). Manufactured in a reel-to-reel cladding process, the composite material isfully formable allowing it to be efficiently stamped into high volume components using existing tooling. It will beshown that the bulk thermal transport in the thick aluminum core can provide improved heat spreading compared tocommon micron-scale carbon based materials. Using conventional materials, thermal functionalization of structuralcomponents with the new Stainless - Aluminum clad composite has the potential to (1) streamline devicemanufacturing by reducing the bill of materials, (2) improve heat dissipation, and (3) reduce material costs byelimination of specialty heat spreaders.



“Electromagnetic Compatibility Testing in an All-Electric Vehicle”, Lennart E. Long, Stephen W. Sauter, C.R. Edelson – LenLong and Associates, Inc., Waltham, MA

Electromagnetic compatibility testing is important to determine if there are any unintended emissions that could pose a threat to the operation of the vehicle subsystems or interfere with external non-vehicle systems or wayside neighbors.

Conductive and radiated testing were performed in accordance with UMTA recommended test practices (the only testing practices that are written for moving vehicles) to determine electromagnetic interference, susceptibility and

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addition to reduced warpage and improved CPI performance, the exposed top die results in better thermal dissipation. Full experimental descriptions and results are provided.


“Epoxy Underfill Challenges for Copper (Cu) Pillar Solder Bump Packages”, B. Schmaltz, Y. Abe, K. Kohara –NAMICS Technologies, San Jose, CA; Speaker: Ken Araujo

From Eutectic, to Lead Free, to Copper Pillar Bumping Technologies. As technology progresses to smaller process generations, new packaging applications are being demanded. The standard solder ball reflow process is being pushed by advancements in Copper (Cu) pillar capped bumps, which in turn allows for high density lead free IO counts at sub 40um bump pitches. Even so, low CTE epoxy materials are still needed in order to dissipate stress concentrations seen during thermal cycling. What epoxy challenges await this next technological revision? This presentation will centralize around the latest advancements in epoxy materials for Advanced Packaging Technology; Capillary Underfill (CUF) for narrow pitch Lead Free Copper (Cu) Pillar Solder Bump packages.

9:20 –9:45 AM Colonial Room

“Ultralow Residue (ULR) Semiconductor Grade Fluxes for Flip-Chip and MEMs Applications”, Maria Durham,S.P. Lim, J. Chou, Dr. A. Mackie – Indium Corporation, Clinton, NY

Copper pillars topped with solder microbumps are emerging as a standard flip-chip solder bump replacement in the semiconductor assembly industry. The relentless drive towards finer pitch, combined with reduced copper pillar height, makes aqueous cleaning of flip-chip flux residues more difficult. An emergent failure mode is joint damage and subsequent yield loss during aqueous jet impingement. The move towards semiconductor grade ultralow residue no-clean fluxes and away from cleaning processes is therefore inevitable for both flip-chip and MEMS applications to meet industry roadmap challenges. The low residue also optimizes underfill adhesion and decreases possible outgassing during underfill cure. This paper discusses the variety of new and emerging failure modes for new packing processes using thinned die with copper-pillar/microbumps. The testing of assembly materials for this purpose will also be discussed.



“Void Reduction and Elimination for Reflow & Curing Processes”, Tom Nash – Heller Industries, Florham Park, NJ

One other key challenge facing the global Semiconductor packaging industry is the reduction and/or elimination of voids in both the soldering and epoxy curing processes. To address the challenge of eliminating voids in the soldering process a vacuum chamber has been integrated directly in the reflow zone of a conventional reflow system. This vacuum chamber reflow process has delivered actual customer results that has reduced soldering voids to <1%.

The key to this design approach is that this system configuration provides significant void reduction while maintaining the highest possible UPH. The second application to be discussed is the elimination of voids in epoxy during the curing process. For this application a pressure cure system has been developed. This batch cure system utilizes pressure to drives the voids out during the curing process. In addition, an optional integrated vacuum process step is can be implemented to further increase void reduction. Customers typically utilize the vacuum step before the pressure curing process step begins.


“Cost Structure Advantages of 2.5D Integration”, Javier DeLaCruz – eSilicon Corporation, San Jose, CA

Various market dynamics are influencing the adoption of 2.5D integration. Recent developments have enabled 2.5D to provide feature enhancements, but if applied well may also provide significant cost benefits over what can be executed otherwise

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EOTPR greatly enhances the estimation of the distance to discontinuities within package conductors. With faster pulse delivery and lower jitter electronics, open-circuits are localized with a resolution of microns (vs. millimeters with conventional TDR). Lock-in thermography uses a pulsed power source to minimize thermal diffusion to localize short circuits to single microns with sensitivity down to microwatts. The phase between the power and resulting signal is also used to estimate depth. MCI uses a SQUID (superconducting quantum interference device) to image current from buried conductors and defects by the magnetic fields generated. Leakages, shorts, and opens are localized with resolution to microns and sensitivity to femtoWatts.

This presentation briefly discusses operating principles, illustrates examples including 3D, comparatively summarizes key attributes and limitations, and describes benefits to package manufacturers, buyers, and integrators.

11:05 – 11:30 AM Cotillion Room

“Fabrication and Application of A Novel Electrochemical Sensor based on Pt Nanowire Array Coated with Au Nanoparticles”, Zhiyang Li, C. Leung, F. Gao, and Z. Gu – University of Massachusetts Lowell, Lowell, MA

In recent years, various types of nanomaterials have been explored for the development of next-generation electrochemical sensors and devices. Due to the unique properties such as high surface area to volume ratio, nanomaterials have shown enhanced electrochemical performances in many research areas. However, most of the electrochemical sensors based on nanomaterial modified electrodes do not possess sufficient electrochemical properties because of the limitation of their structures and electrode modification methods. In our research, a highly sensitive electrochemical sensor based on vertical nanowire array/nanoparticle hybrid electrode has been developed. The vertical Pt nanowire array has been prepared by an electrodeposition method; then Au nanoparticles are coated onto the surface of the vertical Pt nanowire array by electroless plating. This new sensor structure can overcome several shortcomings of conventional nanowire electrode modification method. First, there is no severe bubble generation problem because no coating layer (such as Nafion) is needed to hold the nanowires on the electrode surface; second, the well aligned array minimizes the overlap of nanowires and provides the maximum surface area of nanowires to react with the analytes. Including the large surface area of Pt nanowires and high density of Au nanoparticles, this novel structure shows excellent electrochemical performances, such as high sensitivity and low limit of detection. The vertical Pt nanowire array/Au nanoparticle hybrid structure can be used as a promising platform for enzyme immobilization and electrochemical/biosensors for quantitative measurement of analytes, such as H2O2,glucose, and other biomolecules.


Session D: SMT and Electronics PackagingChaired by Michael Jansen (Textron Systems) & Tina Barcley (TAS Consulting)Directors Room - 8:30 AM – 11:05 AM


“An Overview of IPC Plating Specification Completions, Revisions and Future Plans”, George Milad – Uyemura International Corp., Southington, CT

Solder joint encapsulant adhesives have been successfully used for many years by major electronics manufacturers to enhance the strength of solder joints. These products have proven to strengthen solder joints 5-10x over traditional methods, and have greatly improved thermal cycling during the soldering process as well as the drop performance in the finished products. The use of solder joint encapsulant adhesives can eliminate the need for underfill materials and the underfill process altogether, thus simplifying rework which results in a lower cost of ownership. Solder joint strength, however continues to be a problematic issue with increased package on package and system on package miniaturization.

Research tests were performed to compare the solder joint strength using flux in nitrogen reflow process versus solder joint encapsulant in air reflow process. Using flux in nitrogen the top PoP had a solder joint height of 11.85 mil with 0.9 mil warpage and 5.25% solder voids. In comparison, using solder joint encapsulant in air, the PoP had a solder joint height of 11.33 mil with 0.8 mil warpage and 2.93% solder voids. The pull strength of solder joint was 71 N using flux

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“Glass Enabled Systems Integration”, Jeb Flemming – 3D Glass Solutions, Albuquerque, NM

Interposer technologies are gathering more importance in IC packaging as the industry continues miniaturization trends in microfabrication nodes and IC packaging to meet design and utility needs in consumer electronics. Furthermore, IC packaging is widely seen as a method to prolong Moore’s law. Historically, laminates and silicon has been the materials of interest for interposer materials given their prevalence in IC production; however, they present many limitations in material and technical capabilities. In contrast, glass is becoming viewed as an economically and technically viable option for RF-based IC packaging. In this publication we present a novel photo-definable glass ceramic material for the wafer level packaging of RF electronics. Furthermore, we present on our efforts to leverage this materials unique processing capabilities to create High-Q passive devices, such as inductors through an undercutting manufacturing process.

Index Terms - Glass, packaging, dielectric material, through-glass-vias.


Session C: MEMS and Nano Technology for UAV, Energy, Security and BiomedicalChaired by Dr. Parshant Kumar (Draper Laboratory & Dr. Latika Menon (Northeastern Univ.)Cotillion Room - 8:30 AM – 11:30 AM


“Aerodynamic Testing of MEMS Surface Sensors”, Robert D. White – Tufts University, Medford MA

In aerodynamic flow testing, pressure and skin friction (surface shear stress) are the forcing functions that create lift, drag, and structural vibration. Knowledge of the steady and unsteady pressures and shear forces at a surface are needed for predicting and measuring total drag, flow separation, external acoustic generation, and internal acoustics due to structural vibrations. Work at Tufts over the last few years, in collaboration with NASA, Draper Labs, Spirit Aerosystems, and, more recently, Bombardier Aerospace, has resulted in the development of two MEMS sensor technologies targeted at subsonic wind tunnel environments, with a future goal of extending the technologies to flight testing on subsonic aircraft. The first sensor is a 64 element capacitive microphone array surface micromachined from polysilicon. The second is a 16 element surface shear array micromachined using a LIGA-like electroplated nickel process. In terms of packaging challenges, a key issue is surface topology; in order to have little impact on the flow, peak to peak surface topology for the types of tests we are conducting should be kept below 25 microns. In this paper, experiences with system design and packaging for wind tunnel measurement will be described. Specific tests to be described include: (1) Turbulence spectral measurement with the MEMS microphone array in both the Spirit Aerosystems 6” boundary layer flow duct and the NASA Ames 14” inflow tunnel, at speeds up to Mach 0.6, and (2) surface shear measurements in the NASA Ames 15” indraft tunnel, at flow speeds up to Mach 0.2.


“Optical Leak Testing of Small Devices – OLT Technology”, Tom Trafford – NorCom Systems Inc., Norristown, PA

Optical Leak Testing (OLT) is a proven technique for fine leak testing of electronic packages for space applications and implantable devices such as pace makers and hearing implants. The hearing implant can be inserted in the skull of a toddler and is expected to last 80+ years.

OLT has been used for wafer level MEMS devices with a 5 mm square internal cavity. However customer demand is driving down the size of electronic packages. OLT utilizes a full field interferometer that measures lid deflection downto nanometers. As the package size gets smaller the lids get stiffer which push the limits of the technology. This paper discusses recent advances to leak test a 3 mm device and a 1.2 mm diameter tube with a 4 micron membrane. The technique will be explored in detail, with leak test data being presented.

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“ZnO and Related Nanostructures for Electronics and Photonics”, Mehdi Anwar – University of Connecticut, Storrs, CT

Zinc oxide (ZnO) and its associated nanostructures have been vigorously pursued for application in advanced electronics, UV detectors, chemical sensors and source for white light. The material with a bandgap of 3.37eV, that could be tailored by the addition on Mg or Co, is unique in being biocompatible and exhibiting both semiconducting and piezoelectric properties that grows in a diverse group of nanostructure morphologies. Highly ordered vertical arrays of ZnO nanowires (NWs) have been grown on substrates including silicon, SiO2, GaN, and sapphire using a metal organic chemical vapor deposition (MOCVD) growth process. Co-axial core-shell nanostructures demonstrating unique properties with enhanced detectability of chemical species has been demonstrated. In this talk, we will present a comparison of the different growth techniques for the growth of Zn1-xMgxO nanorods and nanowires. Sonochemical growth that provides a low temperature technique for enhanced Mg incorporation will be discussed. Structural and optical properties of the grown vertically aligned ZnO NW arrays characterized by scanning electron microscopy (SEM), X-ray diffraction (XRD), and photoluminescence (PL) will be presented and discussed. The talk will conclude by highlighting some electronic/photonic device/system demonstration.



“One-Dimensional Nanostructures for Energy and Electronics Applications”, Latika Menon – Dept. of Physics, Northeastern University, Boston, MA

One-dimensional nanostructures such as nanowires and nanotubes are expected to have tremendous potential applications in next-generation energy and electronic devices. Our laboratory has carried out extensive work on synthesis and characterization of one-dimensional nanostructures of the type GaN nanowires and titania nanotube arrays. In the case of GaN nanowires, we have used a simple, scalable chemical vapor deposition process to demonstrate GaN nanowires in unique morphologies such as epitaxial nanowires in the cubic zinc blende structure with superior optical properties and serrated nanowires in wurtzite structure with enhanced effective surface area. While the epitaxial nanowires have direct application in nanoelectronic and optical devices, the serrated nanowires with their unique morphology and large effective surface area will have tremendous applications in sensors and lighting devices and p-njunction solar cells. Extensive research has also been carried out in our lab on the inexpensive and large-scale electrochemical synthesis of titania nanotube arrays. The nanotubes may be produced in the form of arrays (either free-standing or attached to Ti) or bundles or even single nanotubes. Due to remarkable properties such as high effective surface area and desirable current carrying capacity, the nanotubes have numerous applications in energy such as in photoanodes for cost-effective, third generation photovoltaic systems such as sensitized solar cells, portable photovoltaic devices, automobile/building integrated photovoltaics; photocatalytic applications such as in the production of hydrogen; and as robust supports for catalysts for chemical conversion applications such as CO to CO2. More recently, our laboratory has been exploring commercialization venues for the titania nanotubes in high-performance filtration applications of relevance to the energy industry such as in oil-water separation, processed water treatment, etc.


“Advanced Fault Isolation for Microelectronic Packaging Yield and Reliability Enhancement”, David P. Vallett – PeakSource Analytical, LLC, Fairfax, VT

Microelectronics development and manufacturing depend on rapid, accurate, high-confidence root-cause defect identification. ‘Brute-force’ inspection of large-areas by acoustic or x-ray microscopy is time-consuming, lacks sufficient resolution, and most importantly cannot definitively pinpoint electrically active defects, and time-domain reflectometry (TDR) is limited primarily to open circuits and can only estimate location to within millimeters. Three new techniques -EOTPR (electro-optical teraHertz pulsed reflectometry), LIT (lock-in thermography), and MCI (magnetic current imaging) – can localize buried, electrically-active defects in thick densely populated matrices and in some cases determine depth, especially critical with the emergence of highly integrated 3D package schemes.

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Photos of the 41st Symposium & Expo – May 6th, 2014

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Photos of the 41st Symposium & Expo – May 6th, 2014

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Symposium’s Technical Chairs Welcome Lettergmsystems.com/uploads/3/4/4/4/34441255/new-england-imaps-sym-2015.pdfInternational Microelectronics and ... Symposium’s Technical Chairs

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