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ANALOG INTEGRATED CIRCUITS Summary of the Lectures by Prof. Dr. Q. Huang Lukas Cavigelli, December 2011 [email protected] BASIC EQUATIONS & SMALL SIGNAL CIRCUITS Small Signal Model: Only model differential behavior, use derivatives for all currents and voltages many ground-connections & short circuits. Use small letters. BIPOLAR Collector current: ( ) Transconductance: Amplification: for this lecture Hybrid- (small signal) model: at a certain operation point for low frequencies: | [] | [] | [] : bias current, : thermal voltage, : Early voltage Frequency Response: for low frequencies, -10dB/dec after , |( )| , more on foils MOSFET (HERE: N-TYPE) Triode/lin./ohmic region: if and (NMOS) then [( ) ] Active/saturation region: if and (NMOS) ( ) ( ) { condition for saturation with PMOS: !! Cut-off/subth./weak-inversion region: if Pinch-Off point: and [] [] [] [] [] (√| [] | √| [] | ) [] ( [] ) [] [] [ ] , , TYPICAL VALUES MOS-TECHNOLOGY for AMS C35 FETs: (): for and 3.3V NFET 3.3V PFET Unit () () , Reasonable values: BJT: , MOS: , , , Capacitors: MOS Capacitor: 5-12 fF/□, , cheap MIM Cap: 1-5 fF/□, highly linear, ±20%, 1μm Resistors: Silicided Poly-Si Resistor 5-20 Ω/□ (cheap) , ±20% Unsilicided Poly-Si Resistor 50-400 Ω/□, ±20% but more accurate relations can be used ANALOG SUBCIRCUITS CURRENT MIRRORS Simple CM: ( ⁄) MOS: ( ⁄) ( ⁄) ( ) BJT: and if from COMMON-EMITTER & COMMON-SOURCE AMPLIFIERS C-E, C-S Amplifier with resistive load: , C-E, C-S Amplifier with Active Load: ideal current source instead of resistor Common-Emitter Amplifier with non-ideal current source: ( ) ( ) (√ ) ( ) ( ) ( ) EMITTER & SOURCE DEGENERATION Emitter Degeneration: increases input & output resistance, but reduces input resistance: | ( ) ( ), if output resistance: | ( ( )) { ( ) ( ) Source Degeneration: same setup with MOSFET instead of BJT. increases output resistance, but reduces . CASCODE STRUCTURE Basic Cascode: Cascode = cascade to cathode For FET: For BJT: ( ) ( ) Regulated Cascode: REFERENCES Simple Current Source: Widlar Current Source: for very small currents (μA) using only moderate resistor sizes for BJT: ( ) for FET: (not widely used) ( ⁄) , ( ⁄) Wilson Current Source:
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Summary Analog Integrated Circuits ITET Lukas Cavigelli.pdf

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Page 1: Summary Analog Integrated Circuits ITET Lukas Cavigelli.pdf

ANALOG INTEGRATED CIRCUITS

Summary of the Lectures by Prof. Dr. Q. Huang

Lukas Cavigelli, December 2011

[email protected]

BASIC EQUATIONS & SMALL SIGNAL CIRCUITS

Small Signal Model: Only model differential behavior, use derivatives for all currents and voltages many ground-connections & short circuits. Use small letters.

BIPOLAR

Collector current: (

) ⁄

Transconductance:

Amplification: ⁄ for this lecture Hybrid- (small signal) model: at a certain operation point

for low frequencies:

|

[ ]

|

[ ]

|

[ ]

: bias current, : thermal voltage, : Early voltage Frequency Response: for low frequencies, -10dB/dec after ⁄ , | ( )| , more on foils

MOSFET (HERE: N-TYPE)

Triode/lin./ohmic region: if and (NMOS)

then ⏞

[ ( )

]

Active/saturation region: if and (NMOS)

( )

( )⏟

condition for saturation with PMOS: !! Cut-off/subth./weak-inversion region:

if

Pinch-Off point: and

[ ] [ ]

[ ] [ ] [ ] (√| [ ] | √| [ ]|)

[ ]

( [ ])⏟

√ [ ]

[ ]

[ ]

,

,

TYPICAL VALUES

MOS-TECHNOLOGY

for AMS C35 FETs: ( ): for and

3.3V NFET 3.3V PFET Unit

( ) ( )

⁄ ,

Reasonable values: BJT: , MOS: ⁄ , ⁄ , ,

Capacitors: MOS Capacitor: 5-12 fF/, , cheap MIM Cap: 1-5 fF/, highly linear, ±20%, 1µm

Resistors: Silicided Poly-Si Resistor 5-20 Ω/ (cheap) , ±20% Unsilicided Poly-Si Resistor 50-400 Ω/, ±20% but more accurate relations can be used

ANALOG SUBCIRCUITS

CURRENT MIRRORS

Simple CM:

→ √

( ⁄ )

MOS:

( ⁄ )

( ⁄ ) (

)

BJT:

and

⁄ if

from ⁄

COMMON-EMITTER & COMMON-SOURCE AMPLIFIERS

C-E, C-S Amplifier with resistive load:

, ⁄ ⁄

C-E, C-S Amplifier with Active Load: ideal current source instead of resistor

Common-Emitter Amplifier with non-ideal current source:

( )

(

)

( √ ⁄ )

( )

⁄ ⁄

( ) ( )

EMITTER & SOURCE DEGENERATION

Emitter Degeneration: increases input & output resistance, but reduces input resistance:

|

( ) ( ), if

output resistance:

|

(

(

))

( )

( )

Source Degeneration: same setup with MOSFET instead of BJT. increases output resistance, but reduces .

CASCODE STRUCTURE

Basic Cascode: Cascode = cascade to cathode

For FET:

For BJT: ( ) ( )

Regulated Cascode:

REFERENCES

Simple Current Source:

Widlar Current Source: for very small currents (µA) using only moderate resistor sizes

for BJT:

( ⁄ )

for FET: (not widely used)

( ⁄ )

,

( ⁄ )

√ √

Wilson Current Source:

Page 2: Summary Analog Integrated Circuits ITET Lukas Cavigelli.pdf

Simple Voltage Source:

The bulk off all PFETs are connected to .

TRICKS

STUFF FROM THE EXERC ISE

High Swing Cascode Current Mirror:

usually , blabla

BASIC AMPIFIERS

UNSORTED

PMOS: , small-signal model accordingly flipped

ADMINISTRATIVE

Testing:

start: icdesign ams-hk3.70 -tech c35b3 & user: aic04 pass: 7qf-D3Lr user: aic20 pass: afto1]Xb

IMAGE ARCHIVE

sophisticated small-signal bjt

MOSFET hybrid-pi

MOSFET physical model

supply independent biasing

Single-Ended Amplifier

Page 3: Summary Analog Integrated Circuits ITET Lukas Cavigelli.pdf

Emitter-Coupled pair

Source-Coupled pair

Differential Input to Single-Ended Output

Page 4: Summary Analog Integrated Circuits ITET Lukas Cavigelli.pdf

SINGLE-STAGE OTA

AC ANALYSIS

mit ( ) , :

( ) [ (

)]

( ) [

( )⏟

]

Basic Idea: Stability problem in feedback conf., if gain>1 where 180°, because

DESIGN CONSTRAINTS

DC Gain:

| ( ) √

( ⁄ )

Output Swing:

( ⁄ )

, √

( ⁄ )

Slew Rate:

GBP: (gain-BW-prod)

| |

UGBW: (unity-gain-BW)

|| | ( )

( )

Phase Margin: (

| |)

( )

SINGLE-STAGE CASCODE OTA

Comparison to non-cascode OTA: higher gain, higher output resistance, smaller output swing Additional pole of M9/M10-cascode at much higher frequency Gain Function:

( ) (

) (

)

with

DESIGN CONSTRAINTS

( ) ( )

( | |) ( | |)

mit

( ) und

:

o

( ), if | | | |

o (

| |)

(

| |)

⁄ Noise consideration: , because noise-power

, PMOS less noisy Typical performance of single-stage cascade OTA in 0.5µm CMOS process:

FOLDED CASCODE CMOS OTA

⁄ ⁄

( ) (

)

( ( ) )

Folded Cascode BiCMOS OTA: Difference: Replace M3,M4,M5,M6 with npn Q3,Q4,Q5,Q6 Comparison: improves by 6 dB, higher for npn BJTs, can be higher fastre OpAmp TODO: 2

nd Order Amplifier Model

Page 5: Summary Analog Integrated Circuits ITET Lukas Cavigelli.pdf

REGULATED CASCODE

Principle:

NORTON-EQUIVALENT

( ) |

( ( ) ( )⁄ )

( ) ( ) | ( )

( )

SMALL-SIGNAL ANALYSIS

Applying KCL and simplifying with and and | | | | | |:

( ) (

)

FULLY DIFFERENTIAL O TA

SIMPLE FULLY DIFFERE NTIAL OTA

COMMON-MODE (CM) FEEDBACK

FULLY DIFFERENTIAL T ELESCOPIC CASCODE OTA

SWITCHED CM FEEDBACK

Example:

FULLY DIFFERENTIAL V S. SINGLE ENDED

Adv. of fully differential Amps Adv. of single ended Amps

Better PSRR (power supply rejection) Better CMRR (common mode reject.)

= diff. gain / common mode gain Double output swing for low volt. Higher SNR No extra diff. to single ended conv.

Less area consumption No extra common-mode feedback Requires less effort to design

Page 6: Summary Analog Integrated Circuits ITET Lukas Cavigelli.pdf

TWO STAGE AMPLIFIERS

COMPARATORS