Subthreshold SRAM Designs Subthreshold SRAM Designs for for Cryptography Security Cryptography Security Computations Computations Adnan Gutub The Second International Conference on Software Engineering and Computer Systems (ICSECS2011) University Pahang Malaysia Umm Al-Qura University, Makkah Saudi Arabia
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Subthreshold SRAM Designs for Cryptography Security Computations
Umm Al-Qura University, Makkah Saudi Arabia. Subthreshold SRAM Designs for Cryptography Security Computations. Adnan Gutub The Second International Conference on Software Engineering and Computer Systems (ICSECS2011) University Pahang Malaysia 27-29 June 2011. Outline. Introduction - PowerPoint PPT Presentation
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Subthreshold SRAM Designs Subthreshold SRAM Designs for for
The Second International Conference on Software Engineering and Computer
Systems (ICSECS2011)
University Pahang Malaysia27-29 June 2011
Umm Al-Qura University, Makkah Saudi Arabia
OutlineOutlineIntroductionBackgroundcrypto-system complexityCMOS SRAM for Crypto DesigningSRAM Potential & Power reductionReliability of Low-Power SRAMlow power SRAM designsRemarks
portable small devices (i.e. notebooks, mobiles, smartcards…etc) = subthreshold CMOS transistors in crypto hardware design and operation is getting important
CMOS SRAM for Crypto CMOS SRAM for Crypto DesigningDesigning
Standard 6T SRAM Cell
SRAM Potential & Power SRAM Potential & Power reductionreduction
Keep: 6T SRAM cell structureModify:
◦voltages Increasing VDD & VTH (shifting the voltage
swing) more speed reduce leakage power consumption
◦transistors sizes & design it self transistor sizing and adding a sleep
transistor before connecting the cell to ground
SRAM Potential & Power SRAM Potential & Power reductionreduction
SRAM Potential & Power SRAM Potential & Power reductionreduction
Reliability of Low-Power Reliability of Low-Power SRAMSRAM
low power SRAM designs save energy = transistors become more sensitive to soft errors
Soft errors can change values of bits stored leading to functionality failures = very serious in crypto applications.
RemarksRemarks All hardware architecture power reduction is lacking
consistency cryptography and security hardware designing low-
power consideration resulted in the need to develop specific energy-efficient algorithm-flexible hardware.
Reconfigurable Domain-specific SRAM memory designs are what is needed to provide the required flexibility.
it may not payback without gaining the high overhead costs related to the generic reprogrammable designs resulting implementations capable of performing the entire suite of cryptographic primitives over all crypto arithmetic operations.
The technology is moving toward ultra-low-power mode where the hardware processors power consumption should be reduced much.
Measured performance and energy efficiency indicate a comparable level of performance to most reported dedicated hardware implementations, while providing all of the flexibility of a software-based implementation