StudentLec12-13

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Lecture 12-13 Designing Controllers Using Root Locus Method

Topics covered:

1. Dominant Poles

2. P-Controller Design

3. Lag Compensator Design

4. Lead Compensator Design

5. Lead-Lag Compensator Design

6. Learn to use MATLAB design tool: rltool

Dominant Poles

The closed-loop poles that have a dominant effect on the system’s transient response are

called dominant poles.

In design, the dominant poles are used to control the dynamic performances of the

system, whereas the insignificant poles are used for the purpose of ensuring that the

controller TF can be implemented by physical components economically.

Concept Design

A general guideline: |Re(insignificant poles)|>(5~10)*|Re(dominant poles)|

D

σ

jω Insignificant

pole region

Dominant

pole region jω

σ

Dominant

pole region

Insignificant

pole region

450

D

(ζ, ωn)

2

Proportional Controller Design

Recall the effects of P-control on tr, Mp, ts, ess, and stability.

CL TF: )(1

)(

)(

)(

sGK

sGK

sR

sY

P

P

+= CL CE in root locus form: 0)(1 =+ sGKP

Design steps:

1. Specify performance requirements: tr, ts, Mp and ess etc.

2. Decide a pair of dominant poles that satisfy the requirements

3. Write the CL CE into root locus form 0)(1 =+ sGKP

4. Plot the root locus of the CL CE using rlocus or rltool

5. Select a value of gain Kp to satisfy 2. (If no such K value exists, a more

sophisticated controller is needed.)

6. Check time response to see if the designed system performs satisfactorily.

Note: We can move the closed-loop poles around, but cannot place these

poles arbitrarily in the s-plane with just P-control.

EX. Use root locus method to re-design a P-controller for your project #1

%10≤pM , str 2.0≤ for the unit step response

Solution:

Step1:

R(s) Y(s) _

+

)88.16(

778.3

+ss PK

R(s) Y(s) _

+ PK

)(

)()(

sa

sbsG =

3

Step 2: plot the root locus to select a value for the gain Kp

>>num = 3.778;

>>den = [1 16.88 0];

>>L = tf(num,den); %Loop TF without the gain Kp

>>rltool(L) % A very cool & convenient MATLAB interactive graphical design

% tool using the root locus method

You can check the time response simultaneously to see if it satisfies design requirements.

The results will be updated in “real time” while the gain Kp is changed. Test it out…

Do you observe that the settling time ts does not change too much for this system with Kp

changed? Why not?

How does the rise time tr change with the gain Kp changed?

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Phase-Lag Compensator Design

Consider a first order phase-lag compensator

0pz ,)( >>+

+=

ps

zsKsC

R(s) Y(s) _

+ )(sG

ps

zsKsC

+

+=)(

5

Procedure for designing a phase-lag compensator

Step1: Determine the desired dominant poles 1s and 1s from the performance

specifications: tr, ts, Mp

Step 2: Plot the root locus with loop TF = KG(s)

Step 3: Find the desired dominant poles 1s and 1s on the root locus that will give the

desired transient response and read the corresponding K value, say 0K . (If you cannot find

such a K value, then phase-lag control will not satisfy design requirements.)

Step 4: Calculate the value of Ks =C(0) required to yield the desired steady-state error

Step 5: Pick z and p that is much smaller than 1s (so that 11

1≈

+

+

ps

zs) and let

sK

zKp 0

=

Step 6: Verify the control design by simulation with ps

zsKsC

+

+= 0)(

The proper way of applying phase-lag control is to place the pole and zero close

together. For type 0 and type 1 systems the combination should be located near

the origin in the s-plane. Phase-lag control should not be applied to a type 2

system.

EX. Consider a control system as shown

Design a phase-lag compensator such that

• %20≤PM and %)2( 4 =∆≤ sts for a unit step input

• 05.0≤sse for a ramp input

R(s) Y(s) _

+

ps

zsKsC

+

+=)(

)10)(5(

10)(

++=

ssssG

6

Solution:

>>C=zpk(-0.05,-0.0065,13); >>G= zpk([],[0 -5 -10],10); >>CLTF=feedback(C*G,1)

>> t=[0:0.001:10]'; u=t; %define a ramp input

>>lsim(CLTF,u,t); [y,t]=lsim(CLTF,u,t); plot(t,u-y)

%or you can use simulink to do the same simulation

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Graphical results of one possible lag-controller design

Step 3: K0=13 dominant poles jsjs 89.266.1&89.266.1 11 −−=+−=

Result with the Phase-lag compensator 0065.0

05.013)( 0

+

+=

+

+=

s

s

ps

zsKsC

Final CL poles:

Phase-Lead Compensator Design

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Consider a first-order phase-lead compensator

pz0 ,)( <<+

+=

ps

zsKsC

One possible design procedure for phase-lead compensator (geometric method)

R(s) Y(s) _

+ )(sG

ps

zsKsC

+

+=)(

9

Step1: Determine the desired dominant poles 1s and 1s from the performance

specifications: tr, ts, Mp

Step 2: Plot the root locus with loop TF = KG(s): rltool(G)

Step 3: Calculate the required compensation angle such that the desired dominant pole 1s

is on the root-locus

)(180)(180)()( 11

0

11 sGsCsGsC ∠−=∠==>=∠+∠ θ

>>G = tf(num,den)

>>Gs1=evalfr(G,s1) %calculate the value of G(s1)

>>angleGs1=angle(Gs1) %calculate the phase angle of G(s1)

Step 4: Find z and p such that θ=+∠−+∠=∠ )()()( 11 pszssC

(e.g. pick a value for z first and then determine the value of p from the geometric relation)

Step 5: Find the value 0K such that 1)()()( 1

1

10110 =

+

+= sG

ps

zsKsGsCK

i.e.

+

+= )(/1 1

1

10 sG

ps

zsK Matlab command: abs( )

Step 6: Verify the control design by simulation with ps

zsKsC

+

+= 0)(

Ex. Consider a control system as shown

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Design a phase-lead compensator such that

%20≤PM and %)2( 1 =∆≤ sts for a unit step input

Solution:

R(s) Y(s) _

+

ps

zsKsC

+

+=)(

)10)(5(

10)(

++=

ssssG

11

Design a phase-lead compensator using trial and error method

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Step 1: Determine the desired dominant poles 1s and 1s from the performance

specifications: Mp, ts, tr. (i.e. define the design region in s-plane)

Step 2: Plot the root locus without the compensator: rltool(G)

Step 3: Add a LHP zero -z and pole -p (p>z) to the system and adjust their locations such

that the root locus is moved toward the left into the design region.

Step 5: Select a value of K such that the dominant poles are in the design region. Make

sure that the design poles 1s and 1s are true dominant poles.

Step 6: Check the simulation to see if the results are satisfied. If not, repeat step 3.

Some general guidelines (not always true)

1. Moving the zero –z toward the origin should improve rise time and settling times.

But if the zero is moved too close to the origin, the maximum overshoot may

again increase

2. Moving the pole –p farther away from zero and the origin should reduce the

maximum overshoot. But if p is too large, rise and settling times will again

increase

When designed properly, phase-lead controller can increase damping of the system;

improve rise and settling times.

Ex: Design a lead controller the same example above using trial & error method.

Use rltool command.

Lead-Lag Compensator

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In some cases, a pure phase-lag or phase-lead controller alone may not provide

enough design freedom to satisfy design specifications. In such cases, a

combination of phase-lag and phase-lead compensator is necessary. The basic

idea is to use a phase-lead to satisfy the transient response and a phase-lag to

satisfy the steady-state error requirement.

Lead-Lag Compensator

, , )( 2211

2

2

1

1 pzpzps

zs

ps

zsKsC ><

+

+

+

+=

A lead compensator is designed first. Then a lag compensator is added.

Ex. For the same plant,

Design a lead-lag controller such that

• %20≤PM and %)2( 1 =∆≤ sts for a unit step input

• 05.0≤sse for a ramp input

Solution:

Step1: Design a lead controller first.

R(s) Y(s) _

+ )(sG

2

2

1

1)(ps

zs

ps

zsKsC

+

+

+

+=

R(s) Y(s) _

+ )(sG

2

2

1

1)(ps

zs

ps

zsKsC

+

+

+

+=

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