STMicroelectronics Dr. Kaushik Saha Smart Card ICs Smart Card ICs Dr. Kaushik Saha STMicroelectronics CSME –2002 (Chandigarh, India)

STMicroelectronics

Smart Card ICs

Dr. Kaushik SahaSTMicroelectronics

CSME –2002 (Chandigarh, India)

ST Products & Solutions

Agenda

� Smart cards market overview

� Issues in the Smartcard Business

� ST Solutions

TAM EvolutionMillion Units

Mobile application - Smart cards IC’s increase.

A second boom –– banking schemes – ID & authentication – Pay-TV

0

100200300

400500

600700

800900

1998 1999 2000 2001 2002

Mobile FinancialPay tv & IT Govern. & IDOthers

E-Purse

Débit/Credit

Multi-appli.

Loyalty

Present Financial Cards market split

� Standard : CEPS NS*• Proprietary : GeldKarte – Proton - Moneo 37

� Standard : EMV - UKis 11� Proprietary: B0' 30

� Standard : Open platform -Multos - WfSC 2� Proprietary : MPCOS - Payflex - TIBC 9

Market split in Mu(%)

� Proprietary solution only 11

NS : Non Significant

Source ST

Multi-application focus

Multi-application means several things :– By segment of market

� Multi-application within the same market� Multi-application inter segment

– Through technical implementation� Application in hardware (ROM)� Download of applet in memory (eeprom / flash)

StandardizationSmart card standardization is driven from two sides:

� the international standards organizations (ISO, ANSI,CEN, etc.).

w the industry based on emerging markets and products.� Eg. Visa, Mastercard and Europay jointly defined standards for

debit/credit applications - EMV standard.� Eg. industry driven standards PC/SC and the OpenCard

Framework � define guidelines and interface definitions for smart card

applications.

Interoperability

Ability to support the same functionality using different smart cards with

� different protocols and� different data organisation.

High-level abstraction of data objects and access mechanisms is required,

� using a common interface and� with card-specific details hidden from application.

� Security of a Smart Card chip results from the combination of :

�Technology

�design (hardware features)

�firmware (embedded software)

�manufacturing environments

�application software

� At each level, the concern is to achieve a maximum level of performance in terms of confidentiality, integrity and availability of confidential information

� The highest level of coherence has to be reached between various security mechanism

Security

Common Technical Standards

XxXxPoorNOMulti-Sourcing

XxxxNONOPost Issuance Writing

XXXNOInteroperability

?XxXxXxxSecurity

xxxXMulti applications

WindowsJava Card 2.1.1MULTOSOS

�Any card project has to be compliant to:–ISO7816 (1 to 4) for contact.–ISO14443 (Part A or B) for Contactless.

Market Requirements for Smart cards

HigherPerformance

IncreasedSecurity

MemoryPartitioning

LargerMemory Sizes

CryptoCapability

Cost effectiveTechnologies

Contact lessSolutions

Secure Single Chip Layout

STM Product Portfolio

� EEPROM: 512B - 16KB� ROM: 6Kb - 22Kb� RAM: 128B - 512B� Crypto, RF

ST16 Family

� EEPROM: 2Kb - 66Kb� ROM: 23Kb - 96Kb� RAM: 1Kb - 4Kb � Crypto, RF, MMU � Custom logic

ST19/X Family

ST22 Family

� 32 bit RISCcore� Direct JAVA byte code interpretation� Fast crypto software computation� RF capability

90 019997 03 05

Performance

Productstailored to market needs

Conventional EDP System architecture

OS Service Calls(OS Specific)

H/W (CPU, Memory, Peripherals

OS Kernel(Win, Unix)

Applications (m/c specific executable code)

•Application must be tailored & targetted to CPU and OS.•Long Development Cycle, Non-Portability, Non-OPEN

JAVA Virtual Machine

OS Service Calls(OS Specific) OS Kernel

Java Apps (m/c independent executable code)

H/W (CPU, Memory, Peripherals

Abstract Virtual MachineGeneric ServiceCalls

Java Benefits and IssuesJava benefits– Application code portability across platforms

Write once, Run everywhere®

– Security mechanisms– Adapted to downloading

• Java issues– Slow execution when implemented fully in

software, 10 to 50 x slower than compiled code– Memory large footprint– Standardisation

ExecutionUnit

SPPC

HSI

JavaCard Runtime Env.

JavaCard API

ClassLoader

GC,…

Java

Car

dVM

NativeDecoder

SmartJ™ JVM

JavaCardDecoder JSP

JPC

LongBytecodeInterpreter

Standard JVM

NativeDecoder SP

ExecutionUnit

HSI

JavaCard Runtime Env.

JavaCardBytecodeInterpreter

PC

JSPJPCJavaCard

Decoder

JavaCard API

ClassLoader

GC,…

HA

RD

WA

RE

Java

Car

dVM

JavaCard™ Hardware Execution

Data

ROM

EEPROM

RAM

ASIISO7816

…

Native instructions ST22CPU core

MPU

JavaCardDecoder

JavaCard bytecodes

SmartJ™ Architecture

CLOCKMGMT

ST2232-bitCPU

POWERMGMT

MPU

EEPROMROM

ROM BUS

TIM

ER

SE

CU

RIT

Y

RA

ND

OM

CIC

RAM

PERIPHERALS

RAM BUS

AS

I

ISO7816Serial

SmartJ™ FeaturesCPU– 32-bit RISC microprocessor architecture,

24-bit linear memory addressing– Hardware JavaCard™-2.1 execution– 21 MIPS @ 33 MHz

• SECURITY– DES cryptography– RSA and Elliptic Curve cryptography– Memory Protection Unit and instruction-set security

features for code/data firewalling– large ROM up to 128 Kbytes– large EEPROM up to 64 Kbytes

SmartJ™ SecurityIC hardware security– DPA / SPA countermeasures– Memory observation

countermeasures

– Up to 40 MHz on-chip generation internal clock

– Large power supply range with on-chip regulator

• 2.7 to 5.5 V in 0.35 µm process• 1.6 to 5.5 V in 0.18 µm process

– Dual execution mode Supervisor / User– Specific asynchronous reset and clear

all registers instructions