Statistical Modelling of Analog Circuits for Test Metrics Computation

Statistical Modelling of Analog Circuits for TestMetrics Computation

Kamel Beznia†, Ahcène Bounceur†, Salvador Mir‡, Reinhardt Euler††Lab-STICC Laboratory - European University of Britanny - University of Brest

20, Avenue Victor Le Gorgeu29238, Brest, France

Email: {Kamel.Beznia, Ahcene.Bounceur, Reinhardt.Euler}@univ-brest.fr‡TIMA Laboratory

46, Avenue Félix Viallet38031, Grenoble Cedex, FranceEmail: [email protected]

Abstract—Analog Built-In Test (BIT) techniques should beevaluated at the design stage, before the real production, byestimating the analog test metrics, namely Test Escapes (TE) andYield Loss (YL). Due to the lack of comprehensive fault models,these test metrics are estimated under process variations. Inthis paper, we estimate the joint cumulative distribution function(CDF) of the output parameters of a Circuit Under Test (CUT)from an initial small sample of devices obtained from MonteCarlo circuit simulation. We next compute the test metrics in ppm(parts-per-million) directly from this model, without samplingthe density as in previous works. The test metrics are obtainedvery fast since the computation does not depend on the size ofthe output parameter space and there is no need for densitysampling. An RF LNA modeled with a Gaussian copula is usedto compare the results with past approaches.

Index Terms—Analog test, mixed-signal test, RF test, testmetrics estimation, theory of Copulas, statistical model.

I. INTRODUCTION AND PREVIOUS WORK

Analog BIT techniques must be evaluated at the designstage before the real production in order to estimate test errors.These test errors include the Test Escapes TE , or proportionof faulty circuits that pass the test, and the Yield Loss YL, orproportion of circuits that fail the test within those that arefunctional.

The approaches used to evaluate analog BIT techniquesat the design stage are based on simulation. The approachbased on fault simulation allows the injection of typicallya few hundred catastrophic or parametric faults [1][2] andthey require the use of analog circuit-level fault simulators[3]. This approach is extremely time consuming and often notrealistic because of the lack of relevant fault models. A secondapproach is based on statistical simulation (typically MonteCarlo) of the circuit process variations. The inconvenientof this technique is that potential structural defects are notconsidered. Instead, it is assumed that BIT techniques thatare efficient for detecting parametric deviations will also beefficient for the detection of real defects.

In [4], it is proposed to extract the joint probability densityfunction (PDF) of the output parameters (performances andtest measures) of a CUT from an initial sample of about one

thousand circuits obtained from Monte Carlo circuit simulation(e.g. Spice or Spectre simulation). Next, a larger sample ofmillions of circuits having the same statistical model canbe generated by sampling the PDF model. From this newlarge sample, the estimation of the test metrics can be doneaccurately by computing relative frequencies.

Different multivariate probability density estimation tech-niques have been considered to generate a statistical model ofthe CUT, including a multivariate Gaussian approach [4], theuse of Copulas Theory [5] or the use of a non-parametricmethod [6]. Once this model has been obtained, all theseprevious techniques generate a large sample of several mil-lion instances. For example, for circuits having 20 outputparameters, a set of at least 20 million circuits must begenerated. In a more recent work, [7] considered the use ofExtreme Value Theory. Only circuits having extreme valuesof their output parameters are simulated by making use of thestatistical blockade technique [8] in order to discriminate theprocess parameters that generate extreme circuits from thosethat generate the non-extreme ones. However, the approach isnot multivariate.

In this paper, we consider the estimation of the joint CDF ofthe output parameters which will allow us to directly computethe test metrics without the need of sampling a PDF. To seehow, let us assume that we have a sample of a circuit thathas one performance P and one test measure T . Let s be aspecification and l a test limit. By definition, the functionalcircuits are the ones for which (P ≤ s) and the circuits thatpass the test are the ones for which (T ≤ l). Thus, the TestEscapes can be calculated as Pr(P > s/T ≤ l) = 1−Pr(P ≤s/T ≤ l) = 1 − FPT (s, l), where FPT (.) is the joint CDFof the performance and the test measure. We can directlycalculate the test metric if the mathematical form of the CDFis known.

The paper is structured as follows. Section II presents thetest metrics and their computation based on their probabilisticdefinition. The statistical model using copula distributions ispresented in Section III. Section IV shows how to estimate thetest metrics using a known statistical model. As a case study, in

Section V we evaluate a BIT technique for a 1.9 GHz cascodeLNA designed in a 0.25 µm BiCMOS ST Microelectronicstechnology. The obtained results are compared with the onespresented in [5]. Finally, Section VI concludes the paper.

II. TEST METRICS

In this section we will present the definitions of the testmetrics and their computation. First, we introduce the termi-nology used and then we explain how to estimate these testmetrics theoretically.

A. Terminology

• Performance: is an output parameter used to decide if thecircuit is functional or not.

• Specification: is the interval of the acceptable values ofthe corresponding performance.

• Test measure: is an output parameter used to decide ifthe circuit passes the test or not.

• Test limit: is the interval of the acceptable values of thecorresponding test measure.

• Functional circuit: a circuit is functional if all its perfor-mances are verified (i.e. inside the specifications).

• Faulty circuit: a circuit is faulty if at least one of itsperformances is not verified.

• Circuit that passes the test: is the one for which all itstest measures are verified (i.e. inside the test limits).

• Circuit that fails the test: is the one for which at leastone of its test measures is not verified.

B. Computation of Test Metrics

Analog test metrics are presented in [1]. In this paper wewill consider Test Escapes TE (also called Defect Level) andYield Loss YL since they are used to set the test limits of aBIT technique.

In terms of probability, TE is the probability that a circuit isfaulty knowing that it passes the test and YL is the probabilitythat a circuit fails the test knowing that it is functional. Byapplying Bayes’ theorem we can then define TE as the ratioof the probability that a circuit is functional and passes the testover the probability that a circuit passes the test, and the YLas the ratio of the probability that a circuit is functional andpasses the test over the probability that a circuit is functional.

Let us consider a circuit with n performances P =(P1, P2, . . . , Pn) and n specifications s = (s1, s2, . . . , sn).This circuit is designed such that each performance Pi satisfiesthe specification si (i.e. Pi ≤ si). For this circuit we considera set of m test measures T = (T1, T2, . . . , Tm) and m testlimits l = (l1, l2, . . . , lm). The circuit passes the test if eachtest measure Ti satisfies the test limit li (i.e. Ti ≤ li).

For simplicity, henceforth we will write P ≤ s to specifyP1 ≤ s1, . . . , Pn ≤ sn and T ≤ l to specify T1 ≤l1, . . . , Tm ≤ lm. Then, the test metrics can be written in

a probabilistic form as follows:

TE = 1− Pr(P ≤ s, T ≤ l)Pr(T ≤ l)

(1)

YL = 1− Pr(P ≤ s, T ≤ l)Pr(P ≤ s)

(2)

⇒

TE = 1− FPT (s, l)

FT (l)(3)

YL = 1− FPT (s, l)

FP (s)(4)

⇒

TE = 1− FPT (s1, s2, . . . , sn, l1, l2, . . . , lm)

FT (l1, l2, . . . , lm)(5)

YL = 1− FPT (s1, s2, . . . , sn, l1, l2, . . . , lm)

FP (s1, s1, . . . , sn)(6)

where FT (.) is the joint CDF (Cumulative Distribution Func-tion) of the test measures, FP (.) is the joint CDF of the per-formances, and FPT (.) is the joint CDF of the performancesand the test measures.

III. CDF ESTIMATION USING COPULAS

In the previous section, we have shown how to write thetest metrics using the CDFs of the performances and thetest measures. In this section we will present a mathematicaldescription of these CDFs. In particular we will show thatSklar’s theorem [9] allows to describe any joint CDF if themarginal distributions and the dependence structure, calledCopula, of the output parameters are known. First, let us recallthe concept of Copula.

A. Copulas

A copula is a multivariate distribution with uniformmarginal distributions on [0, 1]. For an n-dimensional randomvector U = (U1, U2, . . . , Un) on the unit cube, a copula C isa multivariate CDF such that:

C(u1, u2, . . . , un) = Pr(U1 ≤ u1, . . . , Un ≤ un). (7)

By applying Sklar’s theorem [9], we can easily derivethe expression of the joint CDF F (x1, . . . , xn) associatedwith a copula C. Let X1, X2, . . . , Xn be n random variableswith CDFs F1(x1), F2(x2), . . . , Fn(xn), respectively. Sklar’stheorem states that there exists a copula C such that ∀x =(x1, x2, . . . , xn) ∈ Rn

F (x1, . . . , xn) = C(F1(x1), . . . , Fn(xn)). (8)

B. The Gaussian Copula

The Gaussian copula is given by:

C(u1, u2, . . . , un) =

∫ u1

−∞

∫ u2

−∞· · ·∫ un

−∞

1√det Σ

×

exp

(−1

2wT · (Σ−1 − I) ·w

)∂w1∂w2 . . . ∂wn (9)

where Σ is the correlation matrix and w = (w1, . . . , wn).Figure 1 shows an example of the CDF of a bivariate GaussianCopula C(u1, u2).

0.0

0.2

0.4

0.6

0.8

1.0

0.0

0.2

0.4

0.6

0.8

1.00.0

0.2

0.4

0.6

0.8

1.0

u1

C(u

1,u2)

u2

Fig. 1. Bivariate Gaussian Copula distribution.

As we can see, the Gaussian copula given by Equation (9)has not an analytical form because of the presence of multipleintegrals in the formula. In [4][5] it is proposed to estimateit using Monte Carlo techniques by generating a large sampleof this copula from which it will be estimated. In this paper,we use an efficient algorithm presented in [10][11] to calculateaccurately this copula function. This algorithm is implementedunder the R software ([12]) which is a powerful open sourcestatistical software.

IV. PROCEDURE FOR TEST METRICS COMPUTATION

The procedure for computing test metrics, illustrated inFigure 2, is as follows:

Initial Population (Monte Carlo circuit

simulation)

Statistical model estimation

Estimation of the

marginal

distributions

Estimation of the

Copulas

Test metrics

calculation

Fig. 2. Approach to estimate test metrics.

1) Start with a small sample of circuits generated usingMonte Carlo circuit simulation,

Fig. 3. LNA schematic.

2) Estimate the marginal distribution FPi(xi) = Pr(Pi ≤xi) of each performance Pi where i = 1, . . . , n,

3) Estimate the marginal distribution FTj(yj) = Pr(Tj ≤

yj) of each test measure Tj where, j = 1, . . . ,m,4) Estimate the copulas: CP of the performances, CT of

the test measures, and CPT of the performances and thetest measures,

5) Then, the statistical model is written as follows :a) FP (x1, . . . , xn) = CP (FP1(x1), . . . , FPn(xn))b) FT (y1, . . . , ym) = CT (FT1

(y1), . . . , FTm(ym))

c) FPT (x1, . . . , xn, y1, . . . , ym) =CPT (FP1

(x1), . . . , FPn(xn), FT1

(y1), . . . , FTm(ym))

6) Based on the theory of copulas presented in the previoussection (Section III-B) and using Equations (5) and (6)the Test Escapes and the Yield Loss, respectively, canbe calculated as follows :

TE = 1− CPT (FP (s), FT (l))

CT (FT1(l1), . . . , FTm

(lm))(10)

YL = 1− CPT (FP (s), FT (l))

CP (FP1(s1), . . . , FPn

(sn))(11)

where FP (s) = FP1(s1), . . . , FPn

(sn) and FT (l) =FT1

(l1), . . . , FTm(lm)).

The theory of Copulas is an efficient method to estimatejoint CDFs, which can then be used to estimate the statisticalmodel in order to calculate the test metrics. However, if thejoint CDFs are estimated with other methods, the procedureto compute test metrics is of course still the same.

V. CASE STUDY

In this section we will evaluate a BIT technique for an RFLNA and we will compare the obtained test metrics with theprevious approach in [5].

A. Test Vehicle

The case-study is a 1.9 GHz cascode LNA designed ina 0.25 µm BiCMOS ST Microelectronics technology. Theschematic of the LNA is shown in Figure 3. Table I sum-marizes the performances of the LNA and its specifications.

The considered test measure is the DC signature obtained bycomputing the RMS value of the cross-correlation between theoutput voltage and the power supply current of the LNA whena 1.9 GHz sinusoidal stimulus with magnitude −30 dBm isapplied at its input [13]. The output parameter includes thefive circuit performances (e.g. P1=NF, P2 = S11, P3=Gain,P4=1-dB CP, and P5=IIP3) and the test measures (T1=BIT).

TABLE ILIST OF THE PERFORMANCES AND THE SPECIFICATIONS OF THE LNA.

i Performance Specifications si1ower limit upper limit

1 P1= NF −∞ 1.3dB2 P2=S11 −∞ −9dB3 P3=Gain 17dB +∞4 P4=1-dB CP −11.3dBm +∞5 P5=IIP3 −5.1dBm +∞

B. BIT EvaluationTo evaluate the BIT technique for the LNA we use the

procedure described in Section IV.1) Initial circuit sample: We have performed a Monte Carlo

circuit-level simulation of 1000 instances. The matrix plotof Figure 4 shows in the diagonal the histograms of eachoutput parameter. The rest of the matrix shows the bivariatedistributions of each pair of output parameters.

Fig. 4. Initial sample of LNA circuits obtained from the Monte Carlo circuitlevel simulation.

2) CDFs of the performances: Using the classical univari-ate goodness of fit test1, we have estimated the CDF of eachperformance (P1=NF, P2 = S11, P3=Gain, P4=1-dB CP, andP5=IIP3) of the LNA. The obtained distributions and theirstatistical parameters are shown in Figure 5(a) to (e) and inTable II.

3) CDFs of the Test Measures: In the same way as theprevious step, we have estimated by use of the classicalunivariate goodness of fit test the CDF of the test measure(T1=BIT). The obtained values are presented in Figure 5(f)and in Table II.

1The Kolmogorov-Smirnov test.

TABLE IIPARAMETERS OF THE FITTED MARGINAL DISTRIBUTIONS.

CDF Fitted ParametersCDF µ σ Bandwidth ξ

FP1 (x1) Gauss 1.15 0.03 — —FP2

(x2) NP — — 0.4 —FP3

(x3) GEV 17.46 0.12 — -0.34FP4 (x4) NP — — 0.089 —FP5

(x5) Gauss -1.12 1.014 — —FT1

(y1) GEV 0.36 0.034 — -0.049

4) Performances and Test Measure Copulas: In this step,by transforming each sample in Figure 4 via the CDF F̂Pi

(xi)and the CDF F̂Ti

(yi) of each marginal we obtain the empiricalcopula of Figure 6. The resulting distribution has an ellipticalform typical of a gaussian dependence. Using a goodness offit test of copulas [5] we conclude that the empirical copulaof the performances and the test measures is Gaussian.

Fig. 6. Empirical copula of the initial data of the LNA.

Therefore, the copulas CP and CPT are Gaussian. Theyhave the same form as Equation (9). Note that any univari-ate copula C(F (x)) is by definition equal to the univariateCDF F (x) (i.e. C(F (x)) = F (x)). In our case study thecopula CT (FT1(y1)) distribution of the test measure T1 is thesame as the CDF of this test measure. That is to say thatCT (FT1

(y1)) = FT1(y1) which follows, from Table II, the

generalized extreme value distribution.5) The Statistical Model: The statistical model is given by:

FP (x1, . . . , x5) = CP (FP1(x1), . . . , FP5(x5))

FT1(y1) = exp

{−[1 + ξ

(y1 − µ

σ

)]−1/ξ}

FPT (x1, . . . , x5, y1) = CPT (FP1(x1), . . . , FP5(x5), FT1(y1))

where µ ∈ R is the location parameter, σ > 0 the scaleparameter and ξ ∈ R the shape parameter.

6) Test Metrics Estimation: Based on these previous stepsand equations (5) and (6), the test metrics of our case studyare written as follows:

TE = 1− CPT (FP1(s1), . . . , FP5(s5), FT1(l1))

FT1(l1)(12)

YL = 1− CPT (FP1(s1), . . . , FP5(s5), FT1(l1))

FP1(s1), . . . , FP5(s5)(13)

(a) (b) (c)

(d) (e) (f)

Fig. 5. Fitted CDFs of the performances (a) NF, (b) S11, (c) Gain, (d) 1-dB CP and (e) IIP3 and (f) the test measure (BIT).

C. Setting test limits

In order to fix the values of the test limits, we vary the valueof the test limit l1 from 0.40V to 0.80V with a step of 0.01Vand then we use equations (12) and (13) to calculate the testmetrics. The black curves with triangle symbols of Figure 7show the obtained values for the test metrics.

Test limits l1 Test limits l1

Test Escapes(TE)

Yield Loss (YL)

Fig. 7. The Test Metrics YL and TE obtained (1) from the Copula-basedestimation [5] in red circles and (2) from the proposed method in blacktriangles.

The test limits can be fixed, for example, to the values wherethe YL is equal to TE . For this case, the obtained test limit isYL = TE = 198ppm.

Using the proposed statistical model we have then comparedthe results of the directly estimated test metrics with thoseestimated from a large sample of 1 million generated bycopula-based simulation [5]. The resulting test metrics areshown in Figure 7. As we can see, the values obtained byeach method are very close.

Both approaches start from estimating the statistical modelfrom the Monte Carlo circuit simulation. The main differencebetween them is that in the first one, which is based on densitysimulation, another large sample of circuits is generated withthe same statistical model as the one obtained by MonteCarlo. The problem with this approach is that it is timeconsuming: the number of samples that need to be generatedto guarantee ppm precision for the test metrics grows with thedimensionality, and the samples must be examined to computerelative frequencies.

However, in the new approach, once the statistical model isdetermined, the test metrics are computed directly using themodel. Even if the number of performances and test measuresis very important, the computation of test metrics is simple.Indeed, in this paper the model of the case study is based ona Gaussian copula which does not have an analytical form.However, an algorithm has been developed by [12], whichallows a fast and accurate computation.

VI. CONCLUSION

The estimation of analog test metrics (Test Escapes andYield Loss) at the design stage is important to evaluate BITtechniques. At the design stage, there are no fabricated circuits,and test metrics must be estimated from a statistical modelof the CUT. This model is obtained from a small sample ofcircuits obtained by Monte Carlo circuit-level simulation. Inthis paper, we have described an approach to directly calculatethe test metrics from such a model. This approach is fasterthan previous ones and the complexity does not grow withthe dimensionality of the output parameter space of the CUT.The obtained results using an RF LNA of ST Microelectronicsshow good accuracy in comparison with previous approaches.

REFERENCES

[1] S. Sunter and N. Nagi. Test metrics for analog parametric faults. In Proc.VLSI Test Symposium (VTS), 1999, pp. 226-234.

[2] Y. Lechuga, A. Bounceur, R. Mozuelos, M. Martínez, S. Bracho and S.Mir. Test limits evaluation for an ADC Design-for-Test approach by usinga CAT platform. 23rd International Conference on Design of Circuits andIntegrated Systems, Grenoble, France, November 2008.

[3] A. Bounceur, S. Mir, L. Rolíndez and E. Simeu. CAT platform foranalogue and mixed-signal test evaluation and optimization, 2007, inIFIP International Federation for Information Processing, Volume 249,VLSI-SoC : Research trends in VLSI and Systems on Chip, eds. DeMicheli, G., Mir, S., Reis, R., (Boston : Springer), pp. 281-300.

[4] A. Bounceur, S. Mir, E. Simeu, and L. Rolíndez, Estimation of test metricsfor the optimisation of analogue circuit testing, Journal of ElectronicTesting: Theory and Applications, vol.23, no. 6, pp. 471-484, 2007.

[5] A. Bounceur, S. Mir and H-G. Stratigopoulos. Estimation of analogparametric test metrics using copulas. IEEE Transactions Computer-AidedDesign of Integrated Circuits and Systems, September 2011, volume 30,number 09, ITCSDI, ISSN 0278-0070

[6] H. Stratigopoulos, S. Mir, and A. Bounceur. Evaluation of analog/RFtest measurements at the design stage. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(4), April 2009, pp.582-590.

[7] H. Stratigopoulos and S. Mir. Analog test metrics estimates with PPMaccuracy. IEEE International Conference on Computer-Aided Design(ICCAD), San Jose, USA, November 2010, pp. 241 - 247.

[8] A. Singhee and R. A. Rutenbar, "Statistical blockade: Very fast statisticalsimulation and modeling of rare circuit events and its application tomemory design," IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems, 2009.

[9] A. Sklar. Fonctions de répartition à n dimensions et leurs marges. Publ.Inst. Statist. Université de Paris 8, 1959, pp. 229-231.

[10] Alan Genz. Numerical Computation of Multivariate Normal Probabili-ties. Journal of Computational and Graphical Statistics, 1992, 1: 141-150.

[11] Miwa, Tetsuhisa and Hayter, A. J. and Kuriki, Satosh. The evaluation ofgeneral non-centred orthant probabilities. Journal of the Royal StatisticalSociety Series B, 2003, 65: 223-234.

[12] Xuefei Mi, Tetsuhisa Miwa and Torsten Hothorn, mvtnorm: New Nu-merical Algorithm for Multivariate Normal Probabilities , The R Journal,May 2009, vol. 1/1, 37-39.

[13] J. Machado da Silva, Low-power in-circuit testing of an LNA, In IEEEInternational Mixed-Signals Testing Workshop, 2005, pp. 206-210.