-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
184
MITIGATION OF POWER QUALITY PROBLEMS IN THREE PHASE THREE WIRE
DISTRIBUTION SYSTEMS USING DYNAMIC VOLTAGE
RESTORER (DVR)
B.Karthick1, S.Kalaivanan2 and N.Amarabalan3
1Depatment of Electrical and Electronics Engineering, Alpha
College of Engineering & Technology, Puducherry (ACET),
INDIA,
2Department of Electrical and Electronics Engineering, Alpha
College of Engineering & Technology, Pudhucherry (ACET),
INDIA,
3Department of Electrical and Electronics Engineering, Manakula
Vinayagar Institute of Technology, Puducherry (MIT), INDIA,
ABSTRACT
The growth of power electronic technology is the field of
electric power sector has caused a greater awareness on the power
quality of distribution systems. This paper investigates the
problems of voltage sag, swell and its severe impact on nonlinear
loads nor sensitive loads. That problem can be mitigated with
voltage injection method using custom power device Dynamic Voltage
Restorer (DVR). The control strategy for extracting the
compensation voltages in DVR is based on synchronous reference
frame theory (SRF) along with PI controller. The control of the DVR
is implemented through derived reference load terminal voltages.
Simulation has been carried out to evaluate the performance of DVR
based Synchronous reference frame theory (SRF) for the mitigation
of voltage sag, swell with the help of Matlab/SIMULINK
environment.
Keywords: Dynamic Voltage Restorer (DVR), Synchronous Reference
Frame theory, Power Quality, Voltage Sag/Swell
I. INTRODUCTION
Power Quality has serious economic implications for customers,
utilities and electrical equipment manufacturers. Modern industrial
equipments are more sensitive to power quality problems such as
voltage sag, swell, interruption, harmonic flickers and impulse
transients. Failures due to such disturbances create impact on
production cost. So now-a-days, high quality is became basic needs
of highly automated industries. Power electronics and advanced
control technologies have made it possible to mitigate the power
quality problems and maintain the operation of sensitive loads.
There are number of voltage sag/swell mitigating methods available
but the use of custom
INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY
(IJEET)
ISSN 0976 6545(Print) ISSN 0976 6553(Online) Volume 4, Issue 5,
September October (2013), pp. 184-195 IAEME:
www.iaeme.com/ijeet.asp Journal Impact Factor (2013): 5.5028
(Calculated by GISI) www.jifactor.com
IJEET I A E M E
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
185
power device is considered to be the most efficiency method.
Dynamic Voltage Restorers (DVRs) [1]-[4] are a very effective
series compensation device for mitigating voltage sag/swell.
Dynamic Voltage Restorer (DVR) is a voltage source inverter (VSI)
which is inserted in series between the supply and a critical load.
The basic operating principle of the DVR is to inject appropriate
voltage in series with the supply through an injection transformer
to mitigate the power qulaity problems [5].
The voltage injection schemes and design of the self-supported
DVR and the different control strategies for the controllers of the
DVR have been discussed in [6]-[7]. E.g, adaline based fundamental
extraction have been implemented in [8]. Instantaneous symmetrical
component theory [9], space vector modulation, synchronous
reference frame theory (SRFT) [10]-[11] based control techniques
for a DVR are reported in this literature. In this paper, a new
control algorithm is suggested based on SRF theory which includes
P-I Controller for the generation of reference Vd and Vq. Reference
load signal generation involves the conversion from three-phase to
two-phase and vice versa. Moreover low pass filters are essential
part of this algorithm which has slow dynamic response of the
compensator.
The establishment of the paper are as follows. The basic
introduction of the power qulaity problems and its remedies is
discussed in the above section. The basic configuration of DVR and
its components are enlighted in Section II. The operating principle
and the voltage injection capabilities of the DVR is discussed in
section III. The Control algorithm based on Synchronous Reference
Frame Theory (SRF) is enumerated in Section IV. The Simulation
results of the designed model are analyzed in Section V. Finally
the Conclusion of the paper finds a place in Section VI.
II. DYNAMIC VOLTAGE RESTORER
A. Basic Functioning of DVR Among the power quality problems
(sags, swells, harmonics) voltage sags are the most
severe disturbances. In order to overcome these problems the
concept of custom power devices is introduced recently. One of
those devices is the Dynamic Voltage Restorer (DVR), which is the
most efficient and effective modern custom power device used in
power distribution networks. The function of the DVR will inject
the missing voltage in order to regulate the load voltage from any
disturbance due to immediate distort of source voltage. A dynamic
voltage restorer (DVR) is a solid state inverter based on injection
of voltage in series with a power distribution system. The DC side
of DVR is connected to an energy source or an energy storage
device, while its ac side is connected to the distribution feeder
by a three-phase inter facing injection transformer. A single line
diagram of a DVR connected power distribution system is shown in
the Fig.1.Since DVR is a series connected device, the source
current, is same as load current. DVR injected voltage in series
with line such that the load voltage is maintained at sinusoidal
nominal value. It is normally installed in a distribution system
between the supply and the critical load feeder at the point of
common coupling (PCC).
Figure1. Dynamic voltage restorer operation
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
186
B. Components of DVR
The DVR can be divided into four components namely:
i) Voltage Source PWM Inverter PWM inverter using IGBT switches
is used in the model. IGBT switches are commonly used
in series connected circuits. The insulated gate bipolar
transistor or IGBT is a three-terminal power semiconductor device,
noted for high efficiency and fast switching. Pulse-width
modulation (PWM) is a very efficient way of providing intermediate
amounts of electrical power between fully on and fully off. The
voltage source converter is used to convert the DC to AC and then
supply the voltage to distribution feeder through an injection
transformer.
Figure2. Basic three phase inverter
ii) Injection Transformers The injection transformers connect
the DVR to the distribution network via the high voltage
windings. They transform and couple the injected compensating
voltages generated by the VSI to the incoming supply voltage.
Basically injection transformers used in the model presented in
this paper are three single phase transformers. The high voltage
side of the injection transformer is connected in series to the
distribution line, while the low voltage side is connected to the
DVR power circuit. For a three-phase DVR, three single-phase or
three-phase voltage injection transformers can be connected to the
distribution line, and for single phase DVR one single-phase
transformer is connected. The transformers not only reduce the
voltage requirement of the inverters, but also provide isolation
between the inverters.
iii) Energy Storage The energy storage unit supplies the
required power for compensation of load voltage during voltage sag.
A dc battery is used for this purpose.
iv) DC charging Circuit The dc charging circuit has two main
tasks.
(i) The first task is to charge the energy source after a sag
compensation event. (ii) The second task is to maintain dc link
voltage at the nominal dc link voltage. Excess d.c link voltage
rise will damage the d.c storage capacitor and switching device.
Moreover the rise in d.c link voltage will nonlinearly increase
switching loss and lower the DVR system efficiency. Thus aborting
the reverse flow of energy is an important issue that needs to be
restored. Many research studies in recent year focused on DVR
energy optimization.
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
187
III. OPERATING PRINCIPLE OF DVR
The schematic diagram of a self-supported DVR is shown in Fig.3
Three phase source voltages (Vsa, Vsb, and Vsc) are connected to
the 3-phase critical load through series impedance (Za, Zb, Zc) and
an injection transformer in each phase. The terminal voltages (Vta,
Vtb, Vtc) have power quality problems and the DVR injects
compensating voltages (VCa, VCb, VCc) through an injection
transformer to get undistorted and balanced load voltages (VLa,
VLb, VLc). The DVR is implemented using a three leg voltage source
inverter with IGBTs along with a dc capacitor (Cdc). A ripple
filter (Lr, Cr) is used to filter the switching ripple in the
injected voltage. The considered load, sensitive to power quality
problems is a three-phase balanced lagging power factor load. A
self-supported DVR does not need any active power during steady
state because the voltage injected is in quadrature with the feeder
current.
Figure 3. Schematic diagram of self-supported DVR
The DVR operation for the compensation of sag, swell in supply
voltages is shown in Fig.4. Before sag the load voltages and
currents are represented as VL (presag) and Isa as shown in
Fig.4(a). After the sag event, the terminal voltage (Vta) is gets
lower in magnitude and lags the presag voltage by some angle. The
DVR injects a compensating voltage (VCa) to maintain the load
voltage (VL) at the rated magnitude. VCa has two components, VCad
and VCaq. The voltage in-phase with the current (VCad) is required
to regulate the dc bus voltage and also to meet the power loss in
the VSI of DVR and an injection transformer. The voltage in
quadrature with the current (VCaq) is required to regulate the load
voltage (VL) at constant magnitude. During swell event, the
injected voltage (VCa) is such that the load voltage lies on the
locus of the circle as shown in Fig.4(b).
Figure 4. Phasor Diagram for (a) Voltage Sag (b) Voltage
Swell
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
188
IV. CONTROL ALGORITHM BASED SYNCHRONOUS REFERENCE FRAME THEORY
(SRF)
The basic functions of a controller in a DVR are the detection
of voltage sag/swell events in the system; computation of the
correcting voltage, generation of trigger pulses to the PWM based
DC-AC inverter, correction of any abnormalities in the series
voltage injection and termination of the trigger pulses when the
event has passed.
The compensation for voltage sags using a DVR can be performed
by injecting/absorbing reactive power or real power. When the
injected voltage is in quadrature with the current at the
fundamental frequency, compensation is achieved by injecting
reactive power and the DVR is self-supported with dc bus. But, if
the injected voltage is in phase with the current, DVR injects real
power and hence a battery is required at the dc side of VSI. The
control technique adopted should consider the limitations such as
the voltage injection capability (inverter and transformer rating)
and optimization of the size of energy storage [12]
Fig.5 shows the control algorithm based on the comparison
between reference load voltage and original load voltage. This is a
closed loop system which requires DC link voltage of DVR and
amplitude of load voltage to generate direct axis and quadrature
axis voltages. When the load voltage drops or increases 10% of its
reference load voltage in one or three phases of the system then
the error signal generated by the DVR controller to create the PWM
waveform for 6-pulse IGBT device.
Figure 5. Control Algorithm for DVR Controller
Fig.5 shows the control algorithm based on the comparison
between reference load voltage and original load voltage. This is a
closed loop system which requires DC link voltage of DVR and
amplitude of load voltage to generate direct axis and quadrature
axis voltages. When the load voltage drops or increases 10% of its
reference load voltage in one or three phases of the system then
the error signal generated by the DVR controller to create the PWM
waveform for 6-pulse IGBT device.
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
189
Figure 6. Control Block of DVR using SRF method of Control
Fig.6 shows the control block of the proposed DVR in which the
synchronous reference frame (SRF) theory is used for the control of
self-supported DVR. The voltages at PCC (Vt) are converted to the
rotating reference frame using the abc-dqo conversion. The
harmonics and the oscillatory components of voltages are eliminated
using low pass filters (LPF). The components of voltages in d-axis
and q-axis are,
)()()()(
acVdcVVacVdcVV
sqsqsq
sdsdsd
+=
+=
The compensating strategy for compensation of voltage quality
problems considers that the load terminal voltage should be of
rated magnitude and undistorted. The sag and swell in terminal
voltages are compensated by controlling the DVR and the proposed
algorithm inherently provides a self-supporting dc bus for the DVR.
Three-phase reference supply voltages (VLa*,VLb*,VLc*) are derived
using the sensed load voltages (VLa,VLb,VLc), terminal voltages
(Vta, Vtb,Vtc) and dc bus voltage (Vdc) of the DVR as feedback
signals.
The synchronous reference frame theory based method is used to
obtain the direct axis (Vd) and quadrature axis (Vq) components of
the load voltage. The load voltages in the three-phases are
converted into the d-q-0 frame using the Parks transformation [6].
A three-phase PLL (phase locked loop) is used to synchronize these
signals with the terminal voltages (Vta, Vtb, and Vtc). The d-q
components are then passed through low pass filters to extract the
dc components of Vd* and Vq*.
In order to maintain the DC bus voltage of the self-supported
DVR, the error between the reference dc capacitor voltage (Vdc*)
and the sensed dc bus voltage (Vdc) of DVR is given to a PI
controller of which output (Vcad) is considered as the loss
component of voltage and is added to the dc component of Vd` to
generate Vd*. The reference d-axis load voltage is therefore
as,
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
190
losssdld VdcVV = )(*
Similarly, a second PI controller is used to regulate the
amplitude of the load voltage (VL). The amplitude of load vol-tage
(VL) at point of common coupling is calculated from the ac voltages
(VLa, VLb, VLc) as,
)(32 222
LcLbLaL VVVV ++=
The amplitude of the load terminal voltage (VL) is employed over
the reference amplitude (VL*) and the output of PI controller is
considered as the reactive component of vol-tage (Vqr) for voltage
regulation of load terminal voltage add-ed with the dc component of
Vq` to generate Vq*.The refer-ence q-axis load voltage is therefore
as,
qrsqLq VdcVV += )(*
The resultant voltages (Vd*, Vq*, Vo) are again converted into
the reference supply currents using the reverse Parks
transformation. Reference supply voltages (VLa*, VLb*, VLc*) and
the sensed load voltages (VLa, VLb, VLc) are used in PWM current
controller to generate gating pulses for the switches.
V. SIMULATION RESULTS AND DISCUSSION
The performance of the DVR is demonstrated for different supply
voltage disturbances such as sag and swells at terminal voltages.
The DVR is modeled and simulated using the MATLAB and its Simulink
and Sim Power System toolboxes. The MAT-LAB model of the DVR
connected system is shown in fig.7. The Specification and
parameters of the system were listed in the below Table I.
TABLE I PARAMETERS OF THE SYSTEM SPECIFICATIONS AND
SYSTEM PARAMETERS VALUES
AC Line Voltage 415 V, 50Hz Load 10 KVA, 0.80 pf Lag
PI Controller KP=5 Ki=120 DC Voltage 300 V
Harmonic Filter Lr = 2.0mH, Cr=10F, Rr = 4.8 PWM Switching
Frequency 1080 Hz
Injection Transformer Turns Ratio 1:1 DC bus Capacitance of DVR
1000F
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
191
Figure 7. MATLAB Model of DVR Connected System
A. Mitigation of balanced voltage sags In the simulation model,
the voltage sags are generated by switching on impedance to the
ground at the Point of Common Coupling (PCC), upstream the DVR.
This situation is equivalent to a remote short-circuit fault which
results in voltage dips with a phase angle jump. The result for
situation is equivalent to a remote short-circuit fault which
results in voltage dips with a phase angle jump. The result for
simulation of voltage is shown in Fig.8 (a-c). The 70% of Voltage
sag is initiated for 5 cycles at the PCC is shown in Fig.8 (b). The
injected and the load voltage is shown in Fig. 8 (b, c). A zoom on
the load voltage at the sag starts shown in Fig.8 (d) while zoom at
the sag end is shown in Fig.8 (e).
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
192
Figure 8. a) Grid voltage; b) Injected voltage; c) Load voltage;
d) Zoom at sag start in load voltage waveform and e) Zoom at sag
end in load voltage waveform
B. Mitigation of unbalanced voltage sags An Unbalance sag is
programmed to generate the grid voltage at the PCC as show in
Fig.
9(a). One phase stays at 1 p.u. during the dip the other phases
drop to 0.75 p.u. The injected voltage by the DVR and restored load
voltage as shown in fig 9(b, c). When positive sequence of the grid
voltage drops
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
193
C. Mitigation of balanced and unbalanced voltage swells From the
control point of view, the DVR should handle voltage swells in the
same way it
handles voltage sags. In either case, the reference of the
injected voltage the stepped and actual voltage has to track its
reference. But it is a different perspective from the energy handle
capability. In the case of voltage sags, the DVR delivers an active
power to the load but in the case of voltage swells, the DVR may
absorb the power from the grid. Since normally, the DVR is operated
at the standby and the required energy is available in its energy
storage, the power absorption may be dangerous unless the
dissipative element is installed and the power dissipation is
controlled.
The control of power dissipation in this context is referred to
as the online over voltage protection. Therefore, the capability of
the DVR to cope with voltage swells is strongly related to the
online over voltage protection. However in some cases the voltage
swells, may not causes an over voltage at the dc link. The voltage
swell characteristics and the loading conditions are the main
issues that determine the energy transfer of status from the grid
to the DVR. Two cases of measured voltage swells are presented
here. The 10% balanced voltage swell as programmed and measured at
the PCC. The grid voltage as show in Fig. 10(a) where the swell of
10% has made for 5 fundamental voltage as shown in Fig 10(b-c).
From Fig. 9(a-c) it is noted that the DVR as successfully kept at 1
p.u. load voltage.
Figure 10. a) Grid Voltage; b) Injected Voltage; Figure 11. a)
Grid Voltage; b) Injected Voltage; c) Load Voltage c) Load
Voltage
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
194
Fig.(11) shows the case of unbalanced swell where the voltages
of the supply programmed to have 10% voltage swells. The grid
voltage is depicted as Fig 11a where the swell of 10% is made for 5
fundamental cycles. Injected voltage and the load voltage as shown
in fig 10(b-c). From Fig 11(a-c) it is noted that the DVR has
successfully kept the load voltage at 1 p.u.
Although, the swell is unbalanced the DVR can keep the load
voltage balanced. During experiments, VSI was fed by a separate dc
source and thus the dc voltage was fixed at 480V (0.8 p.u.) swells
not influenced dc voltage.
VI. CONCLUSION
The modeling and simulation of a DVR using MATLAB/SIMULINK has
been presented. From the Simulation analysis, the DVR based
Synchronous Reference Frame theory (SRF) is able to detect
different types of power quality problems without an error and
injects the appropriate voltage component to correct immediately
any abnormality in the terminal voltage to keep the load voltage
balanced and constant at the nominal value. Simulation and
experimental results show that, the proposed DVR successfully
protects the most critical load against balanced and unbalanced
voltage sags and swell. Moreover it has been found that DVR is
capable of pro-viding a self-support to its dc bus by taking active
power from the ac line.
REFERENCE
[1] Power Quality Problems and New Solutions by A. de Almeida,
L. Moreira. J. Delgado [2] Math H.J. Bollen, Understanding power
quality problems: voltage sags and interruptions,
IEEE Press, New York, 2000 [3] Performance of DVR under
different voltage sag and swell conditions by T. Devaraju, V.
C.
Reddy and M. Vijaya Kumar [4] Voltage Quality Improvement Using
DVR by Chellali BENACHAIBA, Bra-him FERDI [5] Adeline-Based Control
of Capacitor Supported DVR for Distribution System Bhim Singh*,
P. Jayaprakash, and D. P. Kothari [6] Control of three level
inverter based DVR by 1S.LEELA, S.DASH [7] Rating and Design Issues
of DVR Injection Transformer by Sasitharan S., Mahesh K.
Mishra,
Member, IEEE, B. Kalyan Kumar, and Jayashankar V.,member, IEEE
[8] Particle Swarm Optimization based Dynamic Voltage Restorer [9]
Power Quality Enhancement Using Custom Power Devices by A. Ghosh
and G. Ledwich.
2002. Kluwer Academic Publishers. [10] FACTS controllers in
power transmission and distribution by K. R. Padiyar. [11] Modeling
and simulation for voltage sags/swells mitigation using DVR by
Rosli omar,
Nasrudin Abd Rahim, Marizan Sulaiman. [12] A. Ziane-Khodja, M.
Adli, S. Bacha ,Y. Zebboudj and A. Khireddine, Control of
Voltage
Sensitive Load using a Dynamic Voltage Restorer Commanded in
Current, International Journal of Electrical Engineering &
Technology (IJEET), Volume 3, Issue 1, 2012, pp. 167 - 179, ISSN
Print : 0976-6545, ISSN Online: 0976-6553.
[13] Neha Kaushik, Power Quality, Its Problem and Power Quality
Monitoring, International Journal of Electrical Engineering &
Technology (IJEET), Volume 4, Issue 1, 2013, pp. 46 - 57, ISSN
Print : 0976-6545, ISSN Online: 0976-6553.
[14] M. Vishnu Vardhan, N.M.G.Kumar and Dr. P. Sangameswararaju,
Unified Power Quality Conditioner for Compensating Power Quality
Problem: Adaptive Neuro-Fuzzy Interference System (ANFIS),
International Journal of Electrical Engineering & Technology
(IJEET), Volume 4, Issue 4, 2013, pp. 74 - 92, ISSN Print :
0976-6545, ISSN Online: 0976-6553.
-
International Journal of Electrical Engineering and Technology
(IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4,
Issue 5, September October (2013), IAEME
195
BIOGRAPHIES
B.KARTHICK was born in 8th September 1988. He received his
B.Tech Degree in Electrical & Electronics Engineering in 2010
from Pondicherry University, INDIA and M.Tech in 2012 from
Pondicherry Engineering College, Pondicherry University, INDIA with
the specialization in Electrical Drives & Control (EDC).
Currently he is working as an Assistant Professor, in Electrical
& Electronics Engineering Department (EEE), in Alpha College of
Engineering & Technology (ACET), Pondicherry University, INDIA.
His area of interests includes Power System, Power Quality and
Power Electronics.
S.KALAIVANAN This author born in Pondicherry, INDIA on 16th
February, 1980. He received graduation in 2004 from Pondicherry
Engineering College, Pondicherry University, INDIA and M.E from
Mailam Engineering College, Anna University, Chennai, Tamil Nadu,
INDIA with the specialization in Power Electronics and Drives (PED)
in the year 2012. He is having more than 6 years in Industrial
Experience. His area of interests includes Power System, Power
Quality and Power Electronics. Currently he is working as an
Assistant Professor, in Electrical & Electronics Engineering
department (EEE), Alpha College of Engineering & Technology
(ACET), Pondicherry, Pondicherry University, INDIA.
N.AMARABALAN was born in 17th April 1981. He received his B.Tech
Degree in Electrical & Electronics Engineering in 2004 from
Pondicherry Engineering College, Pondicherry University, INDIA and
M.E from Mailam Engineering College, Anna University, Chennai,
Tamil Nadu, INDIA with the specialization in Power Electronics and
Drives (PED) in the year 2009. His area of interests includes Power
System and Power Quality. Currently he is working as an Assistant
Professor, in Electrical & Electronics Engineering department
(EEE), Manakula Vinayagar Institute of Technology (MIT),
Pondicherry, Pondicherry University, INDIA.