Spring 08, Apr 22 Spring 08, Apr 22 ELEC 7770: Advanced VLSI Design (Ag ELEC 7770: Advanced VLSI Design (Ag rawal) rawal) 1 ELEC 7770 ELEC 7770 Advanced VLSI Design Advanced VLSI Design Spring 2008 Spring 2008 Mixed-Signal and RF Test Mixed-Signal and RF Test Vishwani D. Agrawal Vishwani D. Agrawal James J. Danaher Professor James J. Danaher Professor ECE Department, Auburn University ECE Department, Auburn University Auburn, AL 36849 Auburn, AL 36849 [email protected][email protected]http://www.eng.auburn.edu/~vagrawal/COURSE/E7770_Spr08/ http://www.eng.auburn.edu/~vagrawal/COURSE/E7770_Spr08/ course.html course.html
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Spring 08, Apr 22 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2008 Mixed-Signal and RF Test Vishwani D. Agrawal James.
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Mixed-Signal CircuitsMixed-Signal Circuits Operational amplifier (analog) Programmable gain amplifier (mixed-signal) Filters, active and passive (analog) Comparator (mixed-signal) Voltage regulator (analog or mixed-signal) Analog mixer (analog) Analog switches (analog) Analog to digital converter (mixed-signal) Digital to analog converter (mixed-signal) Phase locked loop (PLL) (mixed-signal)
Operational/Timing Spec.Operational/Timing Spec.ParameterParameter Test conditionsTest conditions For VDD = 5 VFor VDD = 5 V
Linearity errorLinearity error ±0.5 LSB±0.5 LSB
Gain errorGain errorMeasured using the internal Measured using the internal feedback resistor. Normal full feedback resistor. Normal full scale range (FSR) = Vref – 1 scale range (FSR) = Vref – 1 LSBLSB
±2.5 LSB±2.5 LSB
Settling time to ½ LSBSettling time to ½ LSBOUT1 load = 100 OUT1 load = 100 ΩΩ, , Cext = 13 pF, etc.Cext = 13 pF, etc.
100 ns100 ns
Prop. Delay, digital input to Prop. Delay, digital input to 90% final output current90% final output current 80 ns80 ns
set VI1 = 2.5 V; /* Set the DAC voltage reference to 2.5 V */ start digital pattern = “dac_full_scale”; /* Set DAC output to
+full scale (2.5 V) */ connect meter: DAC_OUT /* Connect voltmeter to DAC output */ fsout = read_meter(), /* Read voltage level at DAC_OUT pin */ test fsout; /* Compare the DAC full scale output to data sheet limit */
Method of ATPG Using SensitivitiesMethod of ATPG Using Sensitivities Compute analog circuit sensitivities Construct analog circuit bipartite graph From graph, find which output parameters
(performances) to measure to guarantee maximal coverage of parametric faults Determine which output parameters are most sensitive
to faults
Evaluate test quality, add test points to complete the analog fault coverage
N. B. Hamida and B. Kaminska, “Analog Circuit Testing Based on Sensitivity Computation and New Circuit Modeling,” Proc. ITC, 1993.
Waveform synthesizerWaveform synthesizer Waveform digitizerWaveform digitizer High frequency clock with dividers for synchronizationHigh frequency clock with dividers for synchronization
Analog test methodsAnalog test methods Specification-based functional testingSpecification-based functional testing Model-based analog testingModel-based analog testing
Analog test bus allows static analog tests of Analog test bus allows static analog tests of mixed-signal devicesmixed-signal devices Boundary scan is a prerequisiteBoundary scan is a prerequisite
References: Analog & RF TestReferences: Analog & RF Test A. Afshar, A. Afshar, Principles of Semiconductor Network TestingPrinciples of Semiconductor Network Testing, Boston: Butterworth-, Boston: Butterworth-
Heinemann, 1995.Heinemann, 1995. M. Burns and G. Roberts, M. Burns and G. Roberts, Introduction to Mixed-Signal IC Test and MeasurementIntroduction to Mixed-Signal IC Test and Measurement, , New New
York: Oxford University Press, 2000.York: Oxford University Press, 2000. M. L. Bushnell and V. D. Agrawal, M. L. Bushnell and V. D. Agrawal, Essentials of Electronic Testing for Digital, Memory Essentials of Electronic Testing for Digital, Memory
and Mixed-Signal VLSI Circuitsand Mixed-Signal VLSI Circuits, Boston: Springer, 2000. Chapters 10, 11 and 17., Boston: Springer, 2000. Chapters 10, 11 and 17. D. Gizopoulos, editor, D. Gizopoulos, editor, Advances in Electronic Testing Challenges and MethodologiesAdvances in Electronic Testing Challenges and Methodologies, ,
Springer, 2006. Chapters 9 and 10.Springer, 2006. Chapters 9 and 10. J. L. Huertas, editor, J. L. Huertas, editor, Test and Design-for-Testability in Mixed-Signal Integrated Test and Design-for-Testability in Mixed-Signal Integrated
CircuitsCircuits, Boston: Springer, 2004., Boston: Springer, 2004. P. Kabisatpathy, A Barua, and S. Sinha, P. Kabisatpathy, A Barua, and S. Sinha, Fault Diagnosis of Analog Integrated CircuitsFault Diagnosis of Analog Integrated Circuits, ,
Springer, 2005.Springer, 2005. R. W. Liu, editor, R. W. Liu, editor, Testing and Diagnosis of Analog Circuits and SystemsTesting and Diagnosis of Analog Circuits and Systems, , New York: New York:
Van Nostrand Reinhold, 1991.Van Nostrand Reinhold, 1991. M. Mahoney, M. Mahoney, DSP-Based Testing of Analog and Mixed-Signal CircuitsDSP-Based Testing of Analog and Mixed-Signal Circuits, , Los Alamitos, Los Alamitos,
California: IEEE Computer Society Press, 1987.California: IEEE Computer Society Press, 1987. A. Osseiran, A. Osseiran, Analog and Mixed-Signal Boundary ScanAnalog and Mixed-Signal Boundary Scan, , Boston: Springer, 1999.Boston: Springer, 1999. T. Ozawa, editor, T. Ozawa, editor, Analog Methods for Computer-Aided Circuit Analysis and Analog Methods for Computer-Aided Circuit Analysis and
DiagnosisDiagnosis, , New York: Marcel Dekker, 1988.New York: Marcel Dekker, 1988. K. B. Schaub and J. Kelly, K. B. Schaub and J. Kelly, Production Testing of RF and System-on-a-Chip Devices for Production Testing of RF and System-on-a-Chip Devices for
Wireless CommunicationsWireless Communications, Boston: Artech House, 2004., Boston: Artech House, 2004. B. Vinnakota, editor, B. Vinnakota, editor, Analog and Mixed-Signal TestAnalog and Mixed-Signal Test, , Upper Saddle River, New Jersey: Upper Saddle River, New Jersey: