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Can IC testing Go Wireless? Introduction to the HOY tester Soumalya Ghosh (1304792) University of Alberta Electrical and Computer Engineering [email protected] ECE 512 Fall 2012 Presentation
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Soumalya-HOY tester-University of Alberta (ECE 512)

Jun 29, 2015

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Page 1: Soumalya-HOY tester-University of Alberta (ECE 512)

ECE 512 Fall 2012 Presentation

Can IC testing Go Wireless? Introduction to the HOY tester

Soumalya Ghosh(1304792)

University of AlbertaElectrical and Computer Engineering

[email protected]

Page 2: Soumalya-HOY tester-University of Alberta (ECE 512)

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Outline

• Motivation• IC testing strategies vs. VLSI technology• Wireless testing – the new standard– Introduction to wireless testing

• Types of wireless testing techniques– RF Communication technique– NF Communication technique– Optical Communication technique

contd. …

Page 3: Soumalya-HOY tester-University of Alberta (ECE 512)

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Outline (2)

• The new platform – HOY– Introduction to the HOY tester

• The HOY approach• HOY operation• Advantages of HOY• Test flow (HOY)• Future work

Page 4: Soumalya-HOY tester-University of Alberta (ECE 512)

Motivation

• Probe card costs• Probe card alignment issues• Contact causes wear and tear in the chip• Maintenance and cleaning issues of cards• Testing is the only category of cost which

doesn’t decrease with advanced fabrication1

• Increased pin count, speed, timing accuracy requirements

1. Semiconductor Industry Association, ITRS Report, 2003 Edition, 2003

Page 5: Soumalya-HOY tester-University of Alberta (ECE 512)

IC testing strategies vs. VLSI technology

Fig. 1: Microprocessor clock rates2

2. Bushnell, Michael, and Vishwani Agrawal. Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits. Vol. 17. Springer, 2000.

Page 6: Soumalya-HOY tester-University of Alberta (ECE 512)

The scenario

Table 1: VLSI Chips – present and future3

3. D. Herrell, "Power to the Package," IEEE Spectrum, vol. 36, no. 7, pp. 46-53, July 1999

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Wireless testing – the new standard

• Replaces conventional i/o pins in probe cards with wireless links

• Specially suitable when pin density is very high in the DUT

• Higher reliability due to reduced mechanical stress

• No creation of debris• Faster data rates possible than with cards

Page 8: Soumalya-HOY tester-University of Alberta (ECE 512)

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RF Communication technique

• Also called as ‘Far Field’ communication technique

• Transceivers are placed on the wafer• Size overhead may result• Provides long range• Power supply considerations

Page 9: Soumalya-HOY tester-University of Alberta (ECE 512)

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NF Communication technique

• Energy transmitted through varying EM field (quasi-static EM field)

• Consumes low power• Eliminates reflection issues• More efficient than RF technology for shorter

distances

Fig. 2: Near and far fields around RF source

Page 10: Soumalya-HOY tester-University of Alberta (ECE 512)

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Optical Communication Technique

• High frequency EM fields• Almost immune to interference• Exploited using LDT (Laser Direct Testing)– Laser – metal interaction– Photoelectron emission, etc

Page 11: Soumalya-HOY tester-University of Alberta (ECE 512)

The new platform – HOY

Developers are:Cheng Wen Wu, Shi-Yu Huang, Po-Chiun Huang, Tsin-Yuan Chang and Yu-Tsao Hsing,Dept. of Computer Science, National Tsing Hua University, Taiwan

and

Chih-Tsun HuangDept. of Electrical Engineering, National Tsing Hua University, Taiwan

contd. …Wu, Cheng-Wen, et al. "The HOY tester-Can IC testing go wireless?." VLSI Design, Automation and Test, 2006 International Symposium on. IEEE, 2006.

Page 12: Soumalya-HOY tester-University of Alberta (ECE 512)

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Introduction to the HOY tester

• A novel wireless test system with enhanced embedded test features

• Conceived in 2003, launched in 2005, called HOY – (Hypothesis, Odyssey and Yield)

• Provides test solutions for wafer test, final test after packaging and field tests and diagnostics

• Reduced capital investment, simplified test flow and increased parallelism reduces cost

Page 13: Soumalya-HOY tester-University of Alberta (ECE 512)

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The HOY approach

HOY

HypothesisOdyssey

Yield

Fig. 3: The HOY approach

Page 14: Soumalya-HOY tester-University of Alberta (ECE 512)

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Hypothesis

It is getting harder for the ATE :i. to keep up with the pin count, speed and timing

accuracyii. to maintain reasonable cost level and satisfy

above requirementsiii. to maintain quality and yield for wafers bare dies

and packaged chips According to the HYPOTHESIS, we can solve

all these issues with wireless test

Page 15: Soumalya-HOY tester-University of Alberta (ECE 512)

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Odyssey

• HOY is a long term project with some key technologies still immature

• We expect the technological expertise required for the implementation of HOY be available sometime in the recent future

• Within 10 years time significant portion of IC testing to go wireless

Page 16: Soumalya-HOY tester-University of Alberta (ECE 512)

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Odyssey (2)

Fig. 4: HOY applications:

a) Wafer test

b) Chip test

c) Field diagnosis

Page 17: Soumalya-HOY tester-University of Alberta (ECE 512)

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Yield

1. It performs wafer-level test and burn-in 2. It supports at-speed testing (by BIST)3. It greatly improves the defect level before the

dies are packagedHowever,4. Complete BIST (and BISR) solutions5. Stable and low cost wireless communication6. Contactless power supply, security, pin/pad test

Page 18: Soumalya-HOY tester-University of Alberta (ECE 512)

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HOY operation

Fig. 5: The HOY test system with contactless power supply

Page 19: Soumalya-HOY tester-University of Alberta (ECE 512)

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Advantages of HOY

• It performs wafer level test and burn-in• It supports at-speed testing (by BIST)• It greatly improves the defect level before the

dies are packaged• In conventional test flow there are redundant

tests• Wafer level burn-in and test can be done in a

more cost-effective way• Bottleneck in pin count is removed

Page 20: Soumalya-HOY tester-University of Alberta (ECE 512)

Greatly simplified test runs:• Burn-in is done at the wafer level• Both burn-in and wafer level tests are by BIST• Further tests depend on packaging needs– If packaged, final tests are done after packaging– If not, KGD (known-good-die) should be guaranteed

up to the allowable defect level• Final test contains pin test, basic functional

test, AC test and speed sort

Test flow (HOY)

Wu, Cheng-Wen, et al. "The HOY tester-Can IC testing go wireless?." VLSI Design, Automation and Test, 2006 International Symposium on. IEEE, 2006.

Page 21: Soumalya-HOY tester-University of Alberta (ECE 512)

• For non-packaged dies all tests are completed at the wafer level

• BISR repairs after the BIST detects any fault• CUTs have their own BISR module in-built

Test flow (HOY) (2)

Wu, Cheng-Wen, et al. "The HOY tester-Can IC testing go wireless?." VLSI Design, Automation and Test, 2006 International Symposium on. IEEE, 2006.

Page 22: Soumalya-HOY tester-University of Alberta (ECE 512)

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Future work

Proposed technologies for HOY:

A. Enhanced Embedded Test FeaturesB. Wireless Transmission and Contactless PowerC. Test Interface and TestersD. Protocols, ID and Security

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References

1. Semiconductor Industry Association, ITRS Report, 2003 Edition, 2003

2. Bushnell, Michael, and Vishwani Agrawal. Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits. Vol. 17. Springer, 2000.

3. D. Herrell, "Power to the Package," IEEE Spectrum, vol. 36, no. 7, pp. 46-53, July 1999

4. Wu, Cheng-Wen, et al. "The HOY tester-Can IC testing go wireless?." VLSI Design, Automation and Test, 2006 International Symposium on. IEEE, 2006.

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Questions