STR-W555 AEP Model UK Model E Model Australian Model Chinese Model Tourist Model SPECIFICATIONS SERVICE MANUAL FM STEREO/FM-AM RECEIVER STR-W555 is the tuner and amplifier section in MHC-W555. MICROFILM Photo : E model
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– 1 –
STR-W555AEP Model
UK ModelE Model
Australian ModelChinese Model
Tourist Model
SPECIFICATIONS
SERVICE MANUAL
FM STEREO/FM-AM RECEIVER
STR-W555 is the tuner and amplifiersection in MHC-W555.
MICROFILM
Photo : E model
– 23 – – 24 –
STR-W555
5-3. SCHEMATIC DIAGRAM – TUNER SECTION – (AEP, UK model)• See page 22 for Waveforms.• See page 52 for IC Block Diagrams.
(Page 32)
– 27 – – 28 –
STR-W555
5-6. SCHEMATIC DIAGRAM – TUNER SECTION – (East European, CIS model)• See page 14 for Waveforms.• See page 53 for IC Block Diagrams.
(Page 32)
– 31 – – 32 –
STR-W555
5-8. SCHEMATIC DIAGRAM – MAIN (1/2) SECTION –• See page 54 for IC Block Diagrams.
(Page 35)
(Page 33) (Page 33) (Page 34) (Page 34)
(Page 41)
(Page 23, 32)
– 33 – – 34 –
STR-W5555-9. SCHEMATIC DIAGRAM – MAIN (2/2) SECTION –
• See page 29 for Printed Wiring Board.• See page 54 for IC Block Diagrams.
(Page 46)
(Page 51) (Page 35) (Page 46) (Page 38)
(Page 38)
(Page 37)
(Page 32)(Page 32)(Page 31)(Page 31)
– 35 –
5-10. SCHEMATIC DIAGRAM – AV/MIC SECTION –• See page 54 for IC Block Diagrams.
(Page 33)
(Page 41)
(Page 32)
(Page 38)
5-12. SCHEMATIC DIAGRAM – POWER AMP SECTION –
– 37 – – 38 –
STR-W555
(Page 34)
(Page 34)
(Page 34)
(Page 35)
5-12. SCHEMATIC DIAGRAM – DISPLAY SECTION –• See page 54 for IC Block Diagrams.
– 41 – – 42 –
STR-W555
(Page 46)
(Page 32) (Page 45)
(Page 35)
– 45 – – 46 –
STR-W555
5-16. SCHEMATIC DIAGRAM – SLIDING PANEL SECTION –• See page 54 for IC Block Diagrams.
(Page 42)
(Page 33)
(Page 41)
(Page 33)
– 51 –
STR-W555
5-19. SCHEMATIC DIAGRAM – TRANS SECTION –
(Page 33)
– 52 –
• Tuner section
IC21 LC72130
5-20. IC BLOCK DIAGRAMS
IC41 LA1838
PHASE DETECTORCHARGE PUMP
SWALLOW COUNTER1/16, 1/17 4BITS
12BITS PROGRAMMABLEDRIVER
UNIVERSALCOUNTER
REFERENCEDIVIDER
POWERON
RESET1/2
C2BI/F
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13
1211
21222324
XOUT
VSS
AOUT
2
AIN2
PD2
PD1
AIN1
AOUT
1
VDD
FMIN
AMIN
IO2
XIN D0CLD1CEBO5
BO1
BO2
BO3
BO4
IO1
IFIN
UNLOCKDETECTOR
DATA SHIFT REGISTER LATCH
ALC
BUFF
AMOSC
AMMIX
AMRF. AMP
AGC
IF DET
S-CURVE
AM/FMIF
BUFF
REG
TUNINGDRIVE
GND VCC
PILOTDET
VCO
FF
STEREODRIVE
STEREOSW
MUTE
FF FF
FMIF
FMDET
DECODERANTI BIRDIE
1 2 3 4 5 6 7 98
20 19 18 17 16
15141110
212223242527 262930
OSC.
BUFF
FM-S
D.AD
J
AM-O
SC
REG
FM-A
FC
AM-R
F-IN
AGC
MPX
-IN
FM-D
ET O
UT
AM-D
ET O
UT
OUT
L
OUT
R
AMP-
IN L
AMP-
IN R
AMP
OUT
R
AMP
OUT
L
VCO-
STOP
STER
EO
AM/F
M
AM. S
D
FM. S
D
AM. S
D AD
J
IF-B
UFF
MUT
E
VCC
FM D
ET
FM-IN
AM-M
IXFM
-IF
AM-IF
GND
TUNE
D
S METERFM S METER
AM
COMPSD
AM
12 13
PHASEDET
28
– 53 –
IC1701 IR3R42
IC1702 MC14053BCP IC1751 NJM4558D
IC1752 BU1922
OSC1/21/2
PHASE
WAVEFORMSEP.
GATESAMPLE& HOLDBUFFER
REGULATOR
PHASECOMPARATOR
PHASECOMPARATOR 2
MUTE
TRIGGER
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
AMP
AMP
AMP
LAM
P
VCO
STOPST
LOUT
ROUTLH
C
RHC
POUTIN
VCC
GND
VCO
LPF1
A
LPF1
B
DETI
N
LPF2
A
LPF2
B
SUBI
N
SUBO
UTM
ON
1
2
3
4
5
6
7
8
B1
B0
C.COM
CO
INH
VEE
VSS
VDD
B.COM
A.COM
A1
A0
A
B
C
C1
9
10
11
12
13
14
15
16
OPEN
OPEN
OPEN
QUALITY BITGENERATOR
DEFFERENTIALDECODER
BIPHASESYMBOLDECODER
OSCILLATORAND
DIVIDER
57kHzBANDPASS
(8th ORDER)
CONTAS LOOPVARIABLE ANDFIXED DIVIDER
REFERENCEVOLTAGE
ANTI-ALIASING
FILTER
CLOCKEDCOMPARATOR
TEST LOGIC AND OUTPUTSELECTOR SWITCH
RECONSTRUCTIONFILTER
141516 13 12 11 10 9
321 4 5 6 7 8
CLOCK REGENERATIONAND SYNC
VP1
RDCL
TS7
OSCO
OSCI
VDDD
VSSD
TEST
TSTL
D
QUAL
RDDA Vref
MUX
V DDA
VSSA CIN
SCOU
T
+ –6
7
5
8
B
+–2
1
3
4
A
A OUT
A IN–
A IN+
VEE
VCC
B OUT
B IN–
B IN+
– 54 –
• Main (2/2) section
IC112 MC14052BCP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2X0
X2
VDD
X1
XCOM
X0
X3
A
BVSS
VEE
INH
2X1
2X3
2XCOM
2X2
IC402 MC14053BCP
1
2
3
4
5
6
7
8
B1
B0
C.COM
CO
INH
VEE
VSS
VDD
B.COM
A.COM
A1
A0
A
B
C
C1
9
10
11
12
13
14
15
16
OPEN
OPEN
OPEN
• Main (1/2) section
IC401 M65850P
OSCILLATOR
1/2 VCC
AUTORESET
LPF1
MAINCONTROL
A/D
20KBITSRAM
LPF2D/A
1 2 3 4 5 6 7
891014 13 12 11
CLOCK
RESETMO
MID1 DO0
DO1
VCC
CLOC
K
REF
OP2I
N
OP2O
UT
LPF2
IN
LPF2
OUT
LPF1
IN
LPF1
OUT
OP1O
UT
OP1I
N
CC1
CC2
GND
1 2 3 4 5 6 7 8
OVER LOAD DET
F/FOFFSET DET
LATCH/AUTORESET
VCC ONMUTE
AC OFFDET
VCC
IC851 uPC1237HA
• MIC/ECHO section
IC6002 M65850P
OSCILLATOR
1/2 VCC
AUTORESET
LPF1
MAINCONTROL
A/D
20KBITSRAM
LPF2D/A
1 2 3 4 5 6 7
891014 13 12 11
CLOCK
RESETMO
MID1 DO0
DO1
VCC
CLOC
K
REF
OP2I
N
OP2O
UT
LPF2
IN
LPF2
OUT
LPF1
IN
LPF1
OUT
OP1O
UT
OP1I
N
CC1
CC2
GND
– 55 –
• Display section
IC505 MC14053BCP
2
3
14
1
f04
13 f
12 VCC
11 NC
10 NC
15 f03
5GND
6BIASC
7NC
8NC
9NC
4
16 f02
17 f01
18 RESETRESETC
PREF
LINENF
LINEIN
REFFERENCECURRENT
BPF DET
BPF DET
BPF DET
BPF DET
DET
RESET
Bias
1
2
3
4
5
6
7
8
B1
B0
C.COM
CO
INH
VEE
VSS
VDD
B.COM
A.COM
A1
A0
A
B
C
C1
9
10
11
12
13
14
15
16
OPEN
OPEN
OPEN
• Panel/Motor section
IC891 LB1641
IC506 BA3833F
1 2 3 4 5 6 7 8 9 10
GND
MOT
ORDR
IVE
NOIS
EFI
LTER
CLAM
P
FWD.
IN
REV.
IN
VCC
1
VCC
2
NOIS
EFI
LTER
MOT
ORDR
IVE
MOTORDRIVE
MOTORDRIVE
T.S.D O.C.P
FWD/REV/STOPCONTROL LOGIC
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